2024-10-25 12:40:26 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.96.20:5700'
2024-10-25 12:40:26 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.96.20:5802)
2024-10-25 12:40:26 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.96.20:5801)
2024-10-25 12:40:26 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.96.22:6700'
2024-10-25 12:40:26 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.96.22:6802)
2024-10-25 12:40:26 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.96.22:6801)
2024-10-25 12:40:26 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.96.20:5700/1'
2024-10-25 12:40:26 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.96.20:5804)
2024-10-25 12:40:26 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.96.20:5803)
2024-10-25 12:40:26 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.96.20:5700/2'
2024-10-25 12:40:26 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.96.20:5806)
2024-10-25 12:40:26 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.96.20:5805)
2024-10-25 12:40:26 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.96.20:5700/3'
2024-10-25 12:40:26 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.96.20:5808)
2024-10-25 12:40:26 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.96.20:5807)
2024-10-25 12:40:26 [INFO] fake_trx.py:423 Init complete
2024-10-25 12:40:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:40:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:40:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:40:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:40:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:40:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:40:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:40:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 0 -> 1
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:40:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:40:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 0 -> 1
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:40:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:40:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 0 -> 1
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:40:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:40:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 0 -> 1
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:40:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:40:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:31 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:40:31 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:40:31 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:40:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:40:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:32 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:40:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:40:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:40:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:40:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:40:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:40:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:40:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:40:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:32 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:40:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:40:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:40:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:40:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:33 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:40:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:40:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:40:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:40:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:40:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:40:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:40:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:40:33 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:40:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:34 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:40:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:40:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:40:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:40:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:40:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:40:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:40:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:40:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:34 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:40:35 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:40:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:40:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:40:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:40:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:40:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:40:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:40:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:40:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:35 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:40:36 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:40:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:40:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:40:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:40:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:36 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:40:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:40:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:40:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:40:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:40:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:36 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:40:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:37 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:40:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:40:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:40:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:40:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:37 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:40:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:38 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:40:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:40:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:40:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:40:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:40:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:38 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:40:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:39 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:40:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:40:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:40:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:40:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:39 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:40:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:40 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 12:40:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:40:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:40:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:40:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:40 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 12:40:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:40:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:40:41 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:40:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:41 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:40:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:40:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:42 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 12:40:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:40:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:40:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:40:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:42 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 12:40:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:40:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:40:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:40:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:43 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 12:40:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:40:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:40:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:40:43 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 12:40:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:40:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:40:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:40:44 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 12:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:40:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:40:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:40:44 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 12:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:40:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:40:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:40:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:40:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:40:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:40:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:40:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:40:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:40:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:40:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:40:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:40:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2957 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:40:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:40:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:40:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2957 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:40:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2957 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:40:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2957 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:40:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2957 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:40:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2957 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:40:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:40:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:40:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:40:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:40:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:40:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:40:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:40:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:40:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:40:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:40:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:40:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:40:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:40:50 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:40:50 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:40:50 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
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2024-10-25 12:40:51 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:40:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
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2024-10-25 12:40:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:40:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:40:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:40:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:40:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
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2024-10-25 12:40:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
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2024-10-25 12:40:51 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:40:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
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2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
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2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
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2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:40:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:40:52 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:40:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:40:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:40:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:40:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:40:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:40:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:40:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:40:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:40:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:40:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:40:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:40:57 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:40:57 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:40:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:40:57 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:40:57 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:40:57 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:40:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:40:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:40:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:40:57 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:40:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:40:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:40:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:40:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:40:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:40:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:41:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:41:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:41:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:41:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:41:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:41:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:41:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:41:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:41:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:41:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:41:02 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:41:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:41:02 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:41:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:41:03 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:41:03 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:41:03 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:41:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:41:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:41:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:41:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:41:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:41:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:41:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:41:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:41:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:41:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:41:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:41:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:41:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:41:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:41:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:41:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:41:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:41:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:41:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:41:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:41:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:41:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:41:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:41:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:41:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:41:08 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:41:09 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:41:09 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:41:09 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:41:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:41:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:41:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:41:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=143 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:41:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=143 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:41:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=143 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:41:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=143 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:41:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=143 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:41:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=143 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:41:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:41:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:41:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:41:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:41:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:41:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:41:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:41:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:41:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:41:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:41:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:41:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:41:14 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:41:14 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:41:14 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:41:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:41:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:41:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:41:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:41:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:41:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:41:15 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:41:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:41:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:41:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:41:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:41:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:41:16 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:41:17 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:41:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:41:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:41:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:41:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:41:17 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:41:18 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:41:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:41:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:41:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:41:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:41:18 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:41:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:41:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:41:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:41:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:41:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:41:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:41:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:41:18 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:41:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:41:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:41:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:41:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:41:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:41:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:41:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:41:19 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:41:19 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:41:20 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:41:20 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:41:21 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:41:21 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:41:22 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:41:22 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:41:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:41:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:41:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:41:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:41:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:41:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:41:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:41:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:41:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:41:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:23 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 12:41:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:41:23 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 12:41:24 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 12:41:24 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 12:41:25 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 12:41:25 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 12:41:26 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 12:41:26 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 12:41:27 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 12:41:27 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 12:41:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:41:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:41:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:41:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:41:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:41:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:41:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:41:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:41:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:41:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:41:27 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 12:41:28 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 12:41:28 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 12:41:29 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 12:41:29 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 12:41:30 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 12:41:30 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 12:41:31 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 12:41:31 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 12:41:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:41:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:41:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:41:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:41:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:41:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:41:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:41:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:41:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:41:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:32 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 12:41:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:41:32 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 12:41:33 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 12:41:33 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 12:41:34 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 12:41:34 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 12:41:35 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 12:41:35 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 12:41:36 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 12:41:36 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 12:41:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:41:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:41:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:41:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:41:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:41:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:41:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:37 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 12:41:37 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 12:41:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:41:37 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 12:41:38 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 12:41:38 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 12:41:39 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 12:41:39 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 12:41:40 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 12:41:40 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 12:41:41 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 12:41:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:41:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:41:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:41:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:41:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:41:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:41:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:41:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:41:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:41:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:41 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 12:41:42 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 12:41:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:41:42 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 12:41:43 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 12:41:43 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 12:41:44 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-25 12:41:44 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-25 12:41:45 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-25 12:41:45 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-25 12:41:46 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-25 12:41:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:41:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:41:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:41:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:41:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:41:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:41:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:41:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:41:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:41:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:41:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:46 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-25 12:41:46 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-25 12:41:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:41:47 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-25 12:41:47 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-25 12:41:48 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-25 12:41:48 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-25 12:41:49 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-25 12:41:49 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-25 12:41:50 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-25 12:41:50 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-25 12:41:51 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-25 12:41:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:41:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:41:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:41:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:41:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:41:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:41:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:41:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:41:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:41:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:51 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-25 12:41:52 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-25 12:41:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:41:52 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-25 12:41:53 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-25 12:41:53 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-25 12:41:54 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-25 12:41:54 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-25 12:41:55 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-25 12:41:55 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-25 12:41:55 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-25 12:41:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:41:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:41:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:41:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:41:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:41:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:41:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:41:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:41:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:41:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:41:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:41:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:41:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:41:56 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-25 12:41:56 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-25 12:41:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:41:57 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-25 12:41:57 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-25 12:41:58 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-25 12:41:58 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-25 12:41:59 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-25 12:41:59 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-25 12:42:00 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-25 12:42:00 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-25 12:42:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:42:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:42:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:42:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:01 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-25 12:42:01 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-25 12:42:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:02 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-25 12:42:02 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-25 12:42:03 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-25 12:42:03 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-25 12:42:04 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-25 12:42:04 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-25 12:42:05 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-25 12:42:05 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-25 12:42:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:42:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:42:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:42:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:05 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-25 12:42:06 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-25 12:42:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:06 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-25 12:42:07 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-25 12:42:07 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-25 12:42:08 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-25 12:42:08 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-25 12:42:09 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-25 12:42:09 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-25 12:42:10 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-25 12:42:10 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-25 12:42:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:42:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:42:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:42:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:11 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-25 12:42:11 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-25 12:42:12 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-25 12:42:12 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-25 12:42:13 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-25 12:42:13 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-25 12:42:14 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-25 12:42:14 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-25 12:42:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:42:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:42:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:42:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:14 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-25 12:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:15 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-25 12:42:15 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-25 12:42:16 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-25 12:42:16 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-25 12:42:17 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-25 12:42:17 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-25 12:42:18 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-25 12:42:18 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-25 12:42:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:42:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:42:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:42:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:19 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-25 12:42:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:19 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-25 12:42:20 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-25 12:42:20 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-25 12:42:21 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-25 12:42:21 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-25 12:42:22 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-25 12:42:22 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-25 12:42:23 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-25 12:42:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:42:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:42:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:42:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:23 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-25 12:42:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:23 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-25 12:42:24 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-25 12:42:24 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-25 12:42:25 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-25 12:42:25 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-25 12:42:26 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-25 12:42:26 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-25 12:42:27 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-25 12:42:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:42:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:42:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:42:27 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-25 12:42:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:28 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-25 12:42:28 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-25 12:42:29 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-25 12:42:29 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-25 12:42:30 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-25 12:42:30 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-25 12:42:31 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-25 12:42:31 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-25 12:42:32 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-25 12:42:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:42:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:42:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:42:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:32 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-25 12:42:32 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-25 12:42:33 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-25 12:42:33 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-25 12:42:34 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-25 12:42:34 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-25 12:42:35 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-25 12:42:35 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-25 12:42:36 [DEBUG] clck_gen.py:102 IND CLOCK 17646
2024-10-25 12:42:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:42:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:42:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:42:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:36 [DEBUG] clck_gen.py:102 IND CLOCK 17748
2024-10-25 12:42:37 [DEBUG] clck_gen.py:102 IND CLOCK 17850
2024-10-25 12:42:37 [DEBUG] clck_gen.py:102 IND CLOCK 17952
2024-10-25 12:42:38 [DEBUG] clck_gen.py:102 IND CLOCK 18054
2024-10-25 12:42:38 [DEBUG] clck_gen.py:102 IND CLOCK 18156
2024-10-25 12:42:39 [DEBUG] clck_gen.py:102 IND CLOCK 18258
2024-10-25 12:42:39 [DEBUG] clck_gen.py:102 IND CLOCK 18360
2024-10-25 12:42:40 [DEBUG] clck_gen.py:102 IND CLOCK 18462
2024-10-25 12:42:40 [DEBUG] clck_gen.py:102 IND CLOCK 18564
2024-10-25 12:42:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:42:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:42:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:42:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:41 [DEBUG] clck_gen.py:102 IND CLOCK 18666
2024-10-25 12:42:41 [DEBUG] clck_gen.py:102 IND CLOCK 18768
2024-10-25 12:42:42 [DEBUG] clck_gen.py:102 IND CLOCK 18870
2024-10-25 12:42:42 [DEBUG] clck_gen.py:102 IND CLOCK 18972
2024-10-25 12:42:42 [DEBUG] clck_gen.py:102 IND CLOCK 19074
2024-10-25 12:42:43 [DEBUG] clck_gen.py:102 IND CLOCK 19176
2024-10-25 12:42:43 [DEBUG] clck_gen.py:102 IND CLOCK 19278
2024-10-25 12:42:44 [DEBUG] clck_gen.py:102 IND CLOCK 19380
2024-10-25 12:42:44 [DEBUG] clck_gen.py:102 IND CLOCK 19482
2024-10-25 12:42:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:42:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:42:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:42:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:42:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:42:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:42:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:42:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:42:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:42:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=19523 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:42:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:42:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:42:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=19523 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:42:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=19523 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:42:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=19523 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:42:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=19523 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:42:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=19524 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:42:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=19524 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:42:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=19524 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:42:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=19524 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:42:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=19524 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:42:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=19524 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:42:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=19524 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:42:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=19524 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:42:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:42:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:42:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:42:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:42:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:42:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:42:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:42:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:42:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:42:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:42:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:42:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:42:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:42:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:42:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:42:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:42:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:42:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:42:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:42:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:42:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:42:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:42:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:42:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:42:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:42:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:42:55 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:55 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:42:55 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:42:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:42:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:56 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:42:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:42:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:42:56 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:57 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:42:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:42:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:42:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:42:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:42:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:42:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:42:57 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:42:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:42:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:57 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:42:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:58 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:42:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:58 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:42:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:59 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:42:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:42:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:42:59 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:43:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:43:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:43:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:43:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:43:00 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:43:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:00 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:01 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:01 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:02 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:43:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:02 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:43:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:03 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:03 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:43:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:04 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 12:43:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:04 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 12:43:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:43:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:43:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:43:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:43:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:43:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:43:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:43:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:43:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:43:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:43:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:43:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:43:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:43:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:43:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:43:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:43:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:43:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:43:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:43:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:43:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:43:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:43:10 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:43:10 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:43:10 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:10 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:11 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:43:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:43:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:43:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:43:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:43:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:11 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:43:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:11 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:43:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:43:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:43:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:43:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:43:12 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:12 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:43:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:43:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:43:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:43:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:43:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:13 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:43:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:13 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:43:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:43:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:43:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:43:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:14 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:14 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:43:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:43:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:43:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:43:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:43:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:15 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:43:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:15 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:43:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:16 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:43:16 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:43:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:17 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:43:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:17 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:43:18 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:43:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:18 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:43:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:19 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 12:43:19 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 12:43:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:20 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 12:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:43:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:20 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 12:43:20 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 12:43:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:21 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 12:43:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:21 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 12:43:22 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 12:43:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:22 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 12:43:23 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 12:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:23 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 12:43:24 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 12:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:24 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 12:43:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:25 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 12:43:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:25 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 12:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:26 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 12:43:26 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 12:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:27 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 12:43:27 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 12:43:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:28 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 12:43:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:28 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 12:43:29 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 12:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:29 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 12:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:30 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 12:43:30 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 12:43:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:30 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 12:43:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:31 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 12:43:31 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 12:43:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:32 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 12:43:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:32 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 12:43:33 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 12:43:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:33 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 12:43:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:34 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 12:43:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:34 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 12:43:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:35 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 12:43:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:35 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 12:43:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:36 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 12:43:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:36 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 12:43:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:37 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 12:43:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:37 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 12:43:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:38 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 12:43:38 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 12:43:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:39 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 12:43:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:43:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:43:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:43:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:43:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:43:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:43:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:43:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:43:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:43:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:43:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:43:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6324 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:43:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6324 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:43:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6324 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:43:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6324 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:43:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6324 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:43:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6324 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:43:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6324 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:43:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6324 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:43:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:43:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:43:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:43:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:43:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:43:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:43:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:43:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:43:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:43:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:43:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:43:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:43:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:43:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:43:45 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:43:45 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:43:45 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:43:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:43:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:43:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:43:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:43:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:43:46 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:43:46 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:43:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:43:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:43:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:43:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:43:46 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:43:47 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:43:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:43:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:43:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:43:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:43:47 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:43:48 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:43:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:43:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:43:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:43:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:43:48 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:43:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:49 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:43:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:43:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:43:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:43:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:43:49 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:43:50 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:43:50 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:43:51 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:43:51 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:43:52 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:43:52 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:43:53 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:43:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:53 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 12:43:54 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 12:43:54 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 12:43:55 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 12:43:55 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 12:43:55 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 12:43:56 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 12:43:56 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 12:43:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:43:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:43:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:43:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:43:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:43:57 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 12:43:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:43:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:43:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:43:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:43:57 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 12:43:58 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 12:43:58 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 12:43:59 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 12:43:59 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 12:44:00 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 12:44:00 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 12:44:01 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 12:44:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:44:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:44:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:44:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:44:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:44:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:44:01 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 12:44:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:44:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:44:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:44:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:44:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:44:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:44:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:44:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:02 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 12:44:02 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 12:44:03 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 12:44:03 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 12:44:04 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 12:44:04 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 12:44:05 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 12:44:05 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 12:44:05 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 12:44:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:44:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:44:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:44:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:44:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:44:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:44:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:44:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:44:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:44:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:44:06 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 12:44:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:44:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:44:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:44:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:06 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 12:44:07 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 12:44:07 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 12:44:08 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 12:44:08 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 12:44:09 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 12:44:09 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 12:44:10 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 12:44:10 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 12:44:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:44:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:44:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:44:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:44:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:44:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:44:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:44:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:44:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:44:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:44:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:44:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:44:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:44:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:11 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 12:44:11 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 12:44:12 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 12:44:12 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 12:44:13 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 12:44:13 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 12:44:14 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 12:44:14 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-25 12:44:15 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-25 12:44:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:44:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:44:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:44:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:44:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:44:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:44:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:44:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:44:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:44:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:44:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:44:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:44:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:44:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:44:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:15 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-25 12:44:15 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-25 12:44:16 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-25 12:44:16 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-25 12:44:17 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-25 12:44:17 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-25 12:44:18 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-25 12:44:18 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-25 12:44:19 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-25 12:44:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:44:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:44:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:44:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:44:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:44:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:44:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:44:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:44:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:44:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:44:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:44:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:44:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:44:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:19 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-25 12:44:20 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-25 12:44:20 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-25 12:44:21 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-25 12:44:21 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-25 12:44:22 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-25 12:44:22 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-25 12:44:23 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-25 12:44:23 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-25 12:44:24 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-25 12:44:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:44:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:44:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:44:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:44:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:44:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:44:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:44:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:44:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:44:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:44:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:44:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:44:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:44:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:44:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:24 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-25 12:44:24 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-25 12:44:25 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-25 12:44:25 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-25 12:44:26 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-25 12:44:26 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-25 12:44:27 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-25 12:44:27 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-25 12:44:28 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-25 12:44:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:44:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:44:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:44:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:44:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:44:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:44:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:44:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:44:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:44:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:44:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:44:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:44:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:44:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:28 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-25 12:44:29 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-25 12:44:29 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-25 12:44:30 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-25 12:44:30 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-25 12:44:31 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-25 12:44:31 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-25 12:44:32 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-25 12:44:32 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-25 12:44:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:44:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:44:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:44:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:44:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:44:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:44:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:44:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:44:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:44:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:44:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:44:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:44:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:44:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:33 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-25 12:44:33 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-25 12:44:34 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-25 12:44:34 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-25 12:44:34 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-25 12:44:35 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-25 12:44:35 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-25 12:44:36 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-25 12:44:36 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-25 12:44:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:44:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:44:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:44:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:44:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:44:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:44:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:44:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:44:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:44:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:44:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:44:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:44:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:44:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:37 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-25 12:44:37 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-25 12:44:38 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-25 12:44:38 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-25 12:44:39 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-25 12:44:39 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-25 12:44:40 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-25 12:44:40 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-25 12:44:41 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-25 12:44:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:44:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:44:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:44:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:44:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:44:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:44:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:44:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:44:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:44:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:44:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:44:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:44:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:44:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:41 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-25 12:44:42 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-25 12:44:42 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-25 12:44:43 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-25 12:44:43 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-25 12:44:43 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-25 12:44:44 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-25 12:44:44 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-25 12:44:45 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-25 12:44:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:44:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:44:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:44:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:44:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:44:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:44:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:44:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:44:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:44:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:44:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:44:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:44:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:44:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:45 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-25 12:44:46 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-25 12:44:46 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-25 12:44:47 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-25 12:44:47 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-25 12:44:48 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-25 12:44:48 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-25 12:44:49 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-25 12:44:49 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-25 12:44:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:44:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:44:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:44:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:44:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:44:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:44:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:44:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:44:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:44:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:44:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:44:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:44:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:44:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:50 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-25 12:44:50 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-25 12:44:51 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-25 12:44:51 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-25 12:44:52 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-25 12:44:52 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-25 12:44:53 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-25 12:44:53 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-25 12:44:53 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-25 12:44:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:44:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:44:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:44:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:44:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:44:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:44:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:44:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:44:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:44:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:44:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:44:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:44:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:44:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:54 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-25 12:44:54 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-25 12:44:55 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-25 12:44:55 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-25 12:44:56 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-25 12:44:56 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-25 12:44:57 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-25 12:44:57 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-25 12:44:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:44:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:44:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:44:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:44:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:44:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:44:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:44:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:44:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:44:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:44:58 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-25 12:44:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:44:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:44:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:44:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:44:58 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-25 12:44:59 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-25 12:44:59 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-25 12:45:00 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-25 12:45:00 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-25 12:45:01 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-25 12:45:01 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-25 12:45:02 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-25 12:45:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:45:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:45:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:45:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:45:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:45:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:45:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:45:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:45:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:45:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:45:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:45:02 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-25 12:45:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:45:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:45:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:03 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-25 12:45:03 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-25 12:45:03 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-25 12:45:04 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-25 12:45:04 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-25 12:45:05 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-25 12:45:05 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-25 12:45:06 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-25 12:45:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:45:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:45:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:45:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:45:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:45:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:45:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:45:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:45:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:45:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:45:06 [DEBUG] clck_gen.py:102 IND CLOCK 17646
2024-10-25 12:45:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:45:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:45:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:45:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:07 [DEBUG] clck_gen.py:102 IND CLOCK 17748
2024-10-25 12:45:07 [DEBUG] clck_gen.py:102 IND CLOCK 17850
2024-10-25 12:45:08 [DEBUG] clck_gen.py:102 IND CLOCK 17952
2024-10-25 12:45:08 [DEBUG] clck_gen.py:102 IND CLOCK 18054
2024-10-25 12:45:09 [DEBUG] clck_gen.py:102 IND CLOCK 18156
2024-10-25 12:45:09 [DEBUG] clck_gen.py:102 IND CLOCK 18258
2024-10-25 12:45:10 [DEBUG] clck_gen.py:102 IND CLOCK 18360
2024-10-25 12:45:10 [DEBUG] clck_gen.py:102 IND CLOCK 18462
2024-10-25 12:45:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:45:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:45:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:45:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:45:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:45:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:45:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:45:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:45:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:45:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:45:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:45:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=18563 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:45:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:45:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:45:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:45:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=18563 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:45:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=18563 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:45:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=18563 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:45:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=18563 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:45:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:45:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:45:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:45:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:45:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:45:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:45:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:45:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:45:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:45:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:45:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:45:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:45:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:45:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:45:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:45:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:45:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:45:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:45:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:45:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:45:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:45:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:45:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:45:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:45:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:45:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:45:21 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:45:21 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:45:21 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:45:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:45:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:22 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:45:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:45:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:45:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:45:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:45:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:45:23 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:45:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:45:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:45:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:45:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:45:23 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:45:24 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:45:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:45:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:45:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:45:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:45:24 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:45:24 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:45:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:45:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:45:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:45:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:45:25 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:45:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:45:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:45:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:45:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:45:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:45:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:45:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:45:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:45:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:45:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:45:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:45:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:45:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:45:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:25 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:45:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:45:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:45:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:45:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:45:26 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:45:26 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:45:27 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:45:27 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:45:28 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:45:28 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:45:29 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:45:29 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:45:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:45:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:45:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:45:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:45:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:45:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:45:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:45:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:45:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:45:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:45:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:45:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:45:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:45:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:30 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 12:45:30 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 12:45:31 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 12:45:31 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 12:45:32 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 12:45:32 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 12:45:33 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 12:45:33 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 12:45:33 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 12:45:34 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 12:45:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:45:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:45:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:45:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:45:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:45:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:45:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:45:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:45:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:45:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:45:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:45:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:45:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:45:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:34 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 12:45:35 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 12:45:35 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 12:45:36 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 12:45:36 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 12:45:37 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 12:45:37 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 12:45:38 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 12:45:38 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 12:45:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:45:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:45:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:45:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:45:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:45:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:45:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:45:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:45:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:45:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:45:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:45:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:45:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:45:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:39 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 12:45:39 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 12:45:40 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 12:45:40 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 12:45:41 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 12:45:41 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 12:45:42 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 12:45:42 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 12:45:43 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 12:45:43 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 12:45:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:45:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:45:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:45:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:45:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:45:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:45:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:45:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:45:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:45:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:45:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:45:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:45:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:45:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:43 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 12:45:44 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 12:45:44 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 12:45:45 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 12:45:45 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 12:45:46 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 12:45:46 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 12:45:47 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 12:45:47 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 12:45:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:45:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:45:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:45:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:45:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:45:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:45:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:45:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:45:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:45:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:45:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:45:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:45:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:45:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:48 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 12:45:48 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 12:45:49 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 12:45:49 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 12:45:50 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 12:45:50 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 12:45:51 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-25 12:45:51 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-25 12:45:52 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-25 12:45:52 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-25 12:45:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:45:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:45:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:45:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:45:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:45:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:45:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:45:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:45:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:45:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:45:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:45:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:45:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:45:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:45:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:53 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-25 12:45:53 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-25 12:45:53 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-25 12:45:54 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-25 12:45:54 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-25 12:45:55 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-25 12:45:55 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-25 12:45:56 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-25 12:45:56 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-25 12:45:57 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-25 12:45:57 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-25 12:45:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:45:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:45:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:45:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:45:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:45:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:45:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:45:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:45:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:45:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:45:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:45:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:45:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:45:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:45:58 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-25 12:45:58 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-25 12:45:59 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-25 12:45:59 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-25 12:46:00 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-25 12:46:00 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-25 12:46:01 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-25 12:46:01 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-25 12:46:02 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-25 12:46:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:46:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:46:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:46:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:46:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:46:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:46:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:46:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:46:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:46:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:46:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:46:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:46:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:46:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:46:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:02 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-25 12:46:03 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-25 12:46:03 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-25 12:46:03 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-25 12:46:04 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-25 12:46:04 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-25 12:46:05 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-25 12:46:05 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-25 12:46:06 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-25 12:46:06 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-25 12:46:07 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-25 12:46:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:46:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:46:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:46:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:46:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:46:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:46:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:46:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:46:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:46:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:46:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:46:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:46:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:46:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:07 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-25 12:46:08 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-25 12:46:08 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-25 12:46:09 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-25 12:46:09 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-25 12:46:10 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-25 12:46:10 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-25 12:46:11 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-25 12:46:11 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-25 12:46:12 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-25 12:46:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:46:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:46:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:46:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:46:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:46:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:46:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:46:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:46:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:46:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:46:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:46:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:46:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:46:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:12 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-25 12:46:13 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-25 12:46:13 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-25 12:46:13 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-25 12:46:14 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-25 12:46:14 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-25 12:46:15 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-25 12:46:15 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-25 12:46:16 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-25 12:46:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:46:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:46:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:46:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:46:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:46:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:46:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:46:16 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-25 12:46:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:46:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:46:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:17 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-25 12:46:17 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-25 12:46:18 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-25 12:46:18 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-25 12:46:19 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-25 12:46:19 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-25 12:46:20 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-25 12:46:20 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-25 12:46:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:46:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:46:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:46:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:46:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:46:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:46:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:46:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:46:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:46:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:46:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:46:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:46:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:46:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:21 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-25 12:46:21 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-25 12:46:22 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-25 12:46:22 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-25 12:46:22 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-25 12:46:23 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-25 12:46:23 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-25 12:46:24 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-25 12:46:24 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-25 12:46:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:46:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:46:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:46:25 [WARNING] transceiver.py:250 (MS@172.18.96.22:6700) RX TRXD message (fn=13743 tn=2 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:46:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:46:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:46:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:46:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:46:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:46:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:46:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:46:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:46:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:46:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:46:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:25 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-25 12:46:25 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-25 12:46:26 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-25 12:46:26 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-25 12:46:27 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-25 12:46:27 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-25 12:46:28 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-25 12:46:28 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-25 12:46:29 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-25 12:46:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:46:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:46:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:46:29 [WARNING] transceiver.py:250 (MS@172.18.96.22:6700) RX TRXD message (fn=14661 tn=1 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:46:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:46:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:46:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:46:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:46:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:46:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:46:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:46:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:46:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:46:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:46:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:29 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-25 12:46:30 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-25 12:46:30 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-25 12:46:31 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-25 12:46:31 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-25 12:46:31 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-25 12:46:32 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-25 12:46:32 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-25 12:46:33 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-25 12:46:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:46:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:46:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:46:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:46:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:46:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:46:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:46:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:46:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:46:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:46:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:46:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:46:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:46:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:33 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-25 12:46:34 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-25 12:46:34 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-25 12:46:35 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-25 12:46:35 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-25 12:46:36 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-25 12:46:36 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-25 12:46:37 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-25 12:46:37 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-25 12:46:38 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-25 12:46:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:46:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:46:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:46:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:46:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:46:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:46:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:46:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:46:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:46:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:46:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:46:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:46:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:46:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:38 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-25 12:46:39 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-25 12:46:39 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-25 12:46:40 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-25 12:46:40 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-25 12:46:41 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-25 12:46:41 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-25 12:46:41 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-25 12:46:42 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-25 12:46:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:46:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:46:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:46:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:46:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:46:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:46:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:46:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:46:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:46:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:46:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:46:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:46:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:46:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:42 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-25 12:46:43 [DEBUG] clck_gen.py:102 IND CLOCK 17646
2024-10-25 12:46:43 [DEBUG] clck_gen.py:102 IND CLOCK 17748
2024-10-25 12:46:44 [DEBUG] clck_gen.py:102 IND CLOCK 17850
2024-10-25 12:46:44 [DEBUG] clck_gen.py:102 IND CLOCK 17952
2024-10-25 12:46:45 [DEBUG] clck_gen.py:102 IND CLOCK 18054
2024-10-25 12:46:45 [DEBUG] clck_gen.py:102 IND CLOCK 18156
2024-10-25 12:46:46 [DEBUG] clck_gen.py:102 IND CLOCK 18258
2024-10-25 12:46:46 [DEBUG] clck_gen.py:102 IND CLOCK 18360
2024-10-25 12:46:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:46:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:46:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:46:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:46:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:46:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:46:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:46:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:46:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:46:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:46:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:46:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:46:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:46:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:47 [DEBUG] clck_gen.py:102 IND CLOCK 18462
2024-10-25 12:46:47 [DEBUG] clck_gen.py:102 IND CLOCK 18564
2024-10-25 12:46:48 [DEBUG] clck_gen.py:102 IND CLOCK 18666
2024-10-25 12:46:48 [DEBUG] clck_gen.py:102 IND CLOCK 18768
2024-10-25 12:46:49 [DEBUG] clck_gen.py:102 IND CLOCK 18870
2024-10-25 12:46:49 [DEBUG] clck_gen.py:102 IND CLOCK 18972
2024-10-25 12:46:50 [DEBUG] clck_gen.py:102 IND CLOCK 19074
2024-10-25 12:46:50 [DEBUG] clck_gen.py:102 IND CLOCK 19176
2024-10-25 12:46:51 [DEBUG] clck_gen.py:102 IND CLOCK 19278
2024-10-25 12:46:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:46:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:46:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:46:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:46:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:46:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:46:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:46:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:46:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:46:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:46:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:46:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:46:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=19307 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:46:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:46:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:46:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:46:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=19307 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:46:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=19307 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:46:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=19307 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:46:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=19307 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:46:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=19307 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:46:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=19307 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:46:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=19307 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:46:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:46:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:46:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:46:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:46:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:46:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:46:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:46:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:46:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:46:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:46:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:46:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:46:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:46:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:47:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:47:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:47:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:47:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:47:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:47:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:47:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:47:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:47:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:47:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:47:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:47:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:47:01 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:47:01 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:47:01 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:47:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:02 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:47:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:47:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:47:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:47:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:47:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:47:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:47:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:47:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:47:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:03 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:47:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:47:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:47:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:47:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:47:03 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:47:04 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:47:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:47:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:47:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:47:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:47:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:47:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:47:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:47:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:04 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:47:05 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:47:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:47:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:47:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:47:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:47:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:47:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:47:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:47:05 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:47:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:05 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:47:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:47:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:47:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:47:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:47:06 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:47:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:47:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:47:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:47:06 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:47:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:07 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:47:07 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:47:08 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:47:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:47:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:47:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:47:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:08 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:47:09 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:47:09 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:47:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:47:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:47:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:47:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:10 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 12:47:10 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 12:47:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:47:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:47:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:47:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:47:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:11 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 12:47:11 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 12:47:12 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 12:47:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:47:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:47:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:47:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:12 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 12:47:13 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 12:47:13 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 12:47:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:13 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 12:47:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:47:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:47:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:14 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 12:47:14 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 12:47:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:47:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:47:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:47:15 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 12:47:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:15 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 12:47:16 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 12:47:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:16 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 12:47:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:47:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:47:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:47:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:17 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 12:47:17 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 12:47:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:47:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:47:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:47:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:18 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 12:47:18 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 12:47:19 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 12:47:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:47:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:47:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:47:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:19 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 12:47:20 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 12:47:20 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 12:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:47:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:47:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:47:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:21 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 12:47:21 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 12:47:22 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 12:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:47:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:47:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:47:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:22 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 12:47:23 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 12:47:23 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 12:47:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:47:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:47:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:47:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:23 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 12:47:24 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 12:47:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:47:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:47:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:47:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:24 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 12:47:25 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 12:47:25 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 12:47:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:47:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:47:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:47:26 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 12:47:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:26 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 12:47:27 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 12:47:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:47:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:47:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:47:27 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 12:47:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:28 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 12:47:28 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 12:47:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:47:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:47:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:47:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:47:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:47:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:47:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:47:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:47:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:47:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:47:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:47:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6017 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:47:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6017 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:47:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6017 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:47:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6017 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:47:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:47:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:47:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:47:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:47:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:47:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:47:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:47:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:47:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:47:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:47:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:47:34 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:47:34 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:34 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:47:34 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:47:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:35 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:47:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:47:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:47:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:47:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:47:35 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:47:36 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:47:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:47:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:47:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:47:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:47:36 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:47:37 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:47:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:47:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:47:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:47:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:47:37 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:47:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:38 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:47:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:47:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:47:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:47:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:47:38 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:47:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:47:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:47:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:39 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:47:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:47:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:47:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:47:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:47:39 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:47:39 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:47:40 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:47:40 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:47:41 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:47:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:41 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:47:42 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:47:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:47:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:47:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:47:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:47:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:42 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:47:43 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 12:47:43 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 12:47:44 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 12:47:44 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 12:47:45 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 12:47:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:45 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 12:47:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:47:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:47:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:47:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:47:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:46 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 12:47:46 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 12:47:47 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 12:47:47 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 12:47:48 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 12:47:48 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 12:47:48 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 12:47:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:49 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 12:47:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:47:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:47:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:47:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:49 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 12:47:50 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 12:47:50 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 12:47:51 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 12:47:51 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 12:47:52 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 12:47:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:52 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 12:47:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:47:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:47:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:47:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:47:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:53 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 12:47:53 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 12:47:54 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 12:47:54 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 12:47:55 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 12:47:55 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 12:47:56 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 12:47:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:47:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:47:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:47:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:47:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:47:56 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 12:47:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:47:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:47:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:47:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:47:57 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 12:47:57 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 12:47:57 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 12:47:58 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 12:47:58 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 12:47:59 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 12:47:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:47:59 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 12:48:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:48:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:48:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:48:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:48:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:48:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:48:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:00 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 12:48:00 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 12:48:01 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 12:48:01 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 12:48:02 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 12:48:02 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 12:48:03 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 12:48:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:48:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:48:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:48:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:48:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:48:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:48:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:48:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:48:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:48:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:48:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:48:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:48:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:48:03 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6311 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:48:03 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6311 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:48:03 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6311 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:48:03 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6311 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:48:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:48:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:48:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:48:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:48:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:48:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:48:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:48:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:48:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:48:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:48:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:48:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:48:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:48:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:48:09 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:48:09 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:48:09 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:48:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:48:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:48:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:48:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:48:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:48:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:48:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:09 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:48:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:48:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:48:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:48:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:48:10 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:48:10 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:48:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:48:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:48:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:48:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:48:11 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:48:11 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:48:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:48:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:48:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:48:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:48:11 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:48:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:12 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:48:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:48:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:48:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:48:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:48:12 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:48:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:48:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:48:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:48:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:48:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:13 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:48:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:48:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:48:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:48:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:48:13 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:48:14 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:48:14 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:48:15 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:48:15 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:48:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:16 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:48:16 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:48:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:48:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:48:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:48:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:48:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:48:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:48:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:17 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:48:17 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 12:48:18 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 12:48:18 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 12:48:19 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 12:48:19 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 12:48:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:20 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 12:48:20 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 12:48:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:48:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:48:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:48:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:48:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:48:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:48:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:21 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 12:48:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:21 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 12:48:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:48:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:48:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:48:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:48:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:48:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:48:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:48:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:48:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:21 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 12:48:22 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 12:48:22 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 12:48:23 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 12:48:23 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 12:48:24 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 12:48:24 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 12:48:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:25 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 12:48:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:48:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:48:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:48:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:48:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:48:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:48:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:25 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 12:48:26 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 12:48:26 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 12:48:27 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 12:48:27 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 12:48:28 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 12:48:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:28 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 12:48:29 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 12:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:48:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:48:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:48:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:48:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:48:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:48:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:29 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 12:48:30 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 12:48:30 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 12:48:31 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 12:48:31 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 12:48:31 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 12:48:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:32 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 12:48:32 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 12:48:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:48:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:48:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:48:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:48:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:48:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:48:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:33 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 12:48:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:33 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 12:48:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:48:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:48:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:48:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:48:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:48:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:48:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:48:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:48:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:34 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 12:48:34 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 12:48:35 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 12:48:35 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 12:48:36 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 12:48:36 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 12:48:37 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 12:48:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:48:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:48:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:48:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:48:37 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 12:48:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:38 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 12:48:38 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-25 12:48:39 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-25 12:48:39 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-25 12:48:40 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-25 12:48:40 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-25 12:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:48:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:48:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:48:40 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-25 12:48:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:41 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-25 12:48:41 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-25 12:48:42 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-25 12:48:42 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-25 12:48:43 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-25 12:48:43 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-25 12:48:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:48:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:48:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:48:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:48:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:48:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:48:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:44 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-25 12:48:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:44 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-25 12:48:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:48:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:48:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:48:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:48:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:48:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:48:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:48:45 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-25 12:48:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:48:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:45 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-25 12:48:46 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-25 12:48:46 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-25 12:48:47 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-25 12:48:47 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-25 12:48:48 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-25 12:48:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:48 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-25 12:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:48:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:48:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:48:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:48:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:48:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:49 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-25 12:48:49 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-25 12:48:50 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-25 12:48:50 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-25 12:48:50 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-25 12:48:51 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-25 12:48:51 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-25 12:48:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:48:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:48:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:48:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:48:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:48:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:48:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:52 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-25 12:48:52 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-25 12:48:53 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-25 12:48:53 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-25 12:48:54 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-25 12:48:54 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-25 12:48:55 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-25 12:48:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:48:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:48:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:48:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:48:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:48:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:48:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:48:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:48:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:55 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-25 12:48:56 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-25 12:48:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:48:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:48:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:48:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:48:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:48:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:48:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:48:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:48:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:48:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:48:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:48:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:48:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:48:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:48:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:49:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:49:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:49:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:49:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:49:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:49:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:49:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:49:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:49:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:49:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:49:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:49:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:49:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:49:02 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:49:02 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:49:02 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:49:02 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:49:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:49:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:49:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:49:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:49:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:49:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:49:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:49:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:49:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:49:02 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:49:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:49:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:49:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:49:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:49:03 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:49:03 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:49:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:49:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:49:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:49:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:49:03 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:49:04 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:49:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:49:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:49:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:49:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:49:04 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:49:05 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:49:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:49:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:49:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:49:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:49:05 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:49:06 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:49:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:49:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:49:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:49:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:49:06 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:49:07 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:49:07 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:49:08 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:49:08 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:49:09 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:49:09 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:49:10 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:49:10 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 12:49:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:49:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:49:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:49:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:49:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:49:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:49:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:49:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:49:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:49:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:49:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:49:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:49:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:49:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:49:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:49:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:49:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:49:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:49:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:49:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:49:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:49:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:49:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:49:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:49:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:49:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:49:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:49:16 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:49:16 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:49:16 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:49:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:49:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:49:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:49:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:49:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:49:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:49:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:49:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:49:16 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:49:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:49:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:49:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:49:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:49:17 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:49:17 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:49:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:49:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:49:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:49:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:49:18 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:49:18 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:49:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:49:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:49:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:49:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:49:19 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:49:19 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:49:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:49:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:49:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:49:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:49:20 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:49:20 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:49:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:49:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:49:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:49:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:49:21 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:49:21 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:49:22 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:49:22 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:49:22 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:49:23 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:49:23 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:49:24 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:49:24 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 12:49:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:49:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:49:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:49:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:49:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:49:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:49:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:49:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:49:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:49:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:49:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:49:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:49:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:49:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:49:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:49:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:49:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:49:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:49:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:49:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:49:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:49:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:49:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:49:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:49:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:49:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:49:30 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:49:30 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:49:30 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:49:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:49:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:49:31 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:49:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:49:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:49:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:49:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:49:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:49:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:49:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:49:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:49:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:49:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:49:32 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:49:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:49:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:49:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:49:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:49:32 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:49:33 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:49:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:49:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:49:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:49:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:49:33 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:49:34 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:49:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:49:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:49:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:49:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:49:34 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:49:35 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:49:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:49:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:49:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:49:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:49:35 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:49:35 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:49:36 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:49:36 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:49:37 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:49:37 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:49:38 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:49:38 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:49:39 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 12:49:39 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 12:49:40 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 12:49:40 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 12:49:41 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 12:49:41 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 12:49:42 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 12:49:42 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 12:49:43 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 12:49:43 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 12:49:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:49:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:49:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:49:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:49:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:49:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:49:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:49:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:49:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:49:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:49:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2879 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:49:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:49:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:49:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:49:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2879 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:49:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2879 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:49:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2879 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:49:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2879 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:49:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2879 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:49:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2879 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:49:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2879 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:49:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:49:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:49:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:49:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:49:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:49:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:49:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:49:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:49:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:49:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:49:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:49:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:49:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:49:49 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:49:49 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:49:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:49:49 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:49:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:49:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:49:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:49:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:49:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:49:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:49:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:49:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:49:49 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:49:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:49:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:49:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:49:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:49:50 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:49:50 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:49:50 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:49:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:49:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:49:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:49:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:49:50 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:49:51 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:49:51 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:49:51 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:49:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:49:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:49:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:49:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:49:52 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:49:52 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:49:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:49:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:49:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:49:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:49:52 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:49:53 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:49:53 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:49:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:49:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:49:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:49:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:49:53 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:49:53 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:49:54 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:49:54 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:49:54 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:49:54 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:49:55 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:49:55 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:49:56 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:49:56 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:49:56 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:49:57 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:49:57 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 12:49:58 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 12:49:58 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 12:49:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:49:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:49:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:49:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:49:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:49:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:49:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:49:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:49:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:49:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:49:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:49:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:49:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:49:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2206 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:49:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2206 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:49:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2206 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:49:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2206 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:49:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2206 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:49:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2206 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:49:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2206 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:49:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2206 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:50:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:50:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:50:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:50:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:50:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:50:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:50:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:50:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:50:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:50:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:50:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:50:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:50:04 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:50:04 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:04 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:50:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:50:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:50:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:50:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:50:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:05 [WARNING] transceiver.py:250 (MS@172.18.96.22:6700) RX TRXD message (fn=257 tn=3 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:05 [WARNING] transceiver.py:250 (MS@172.18.96.22:6700) RX TRXD message (fn=291 tn=2 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:50:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:50:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:06 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:50:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:50:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:06 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:50:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:50:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:07 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:50:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:50:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:50:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:50:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=761 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:50:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=761 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:50:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=761 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:50:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=761 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:50:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=761 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:50:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=761 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:50:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=761 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:50:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:50:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:50:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:50:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:50:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:50:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:50:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:50:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:50:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:50:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:50:12 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:12 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:50:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:50:13 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:50:13 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:50:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:13 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:50:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:50:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:50:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:50:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 12:50:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:13 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:50:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:50:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:50:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:50:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:50:13 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:50:14 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:50:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:50:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:50:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:50:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:50:14 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:50:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:50:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:50:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:50:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:50:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:50:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:50:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:50:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:50:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:50:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:50:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:50:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:50:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:50:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:50:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:50:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:50:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:50:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:50:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:50:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:50:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:50:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:50:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:50:20 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:50:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:50:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:50:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:50:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:50:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:50:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:50:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:50:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:50:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:50:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:50:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:50:25 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:25 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:50:25 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:50:25 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:50:25 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:25 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:50:26 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:50:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:50:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:50:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:50:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:50:26 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:50:27 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:50:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:50:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:50:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:50:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:50:27 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:50:28 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:50:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:50:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:50:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:50:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:50:28 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:50:29 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:50:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:50:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:50:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:50:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:50:29 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:50:30 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:50:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:50:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:50:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:50:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:50:30 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:50:30 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:50:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:50:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:50:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:50:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:50:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:50:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:50:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:50:31 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:50:31 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1295 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:50:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:50:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:50:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:50:31 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1295 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:50:31 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1295 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:50:31 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1295 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:50:31 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1295 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:50:31 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1295 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:50:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:50:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:50:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:50:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:50:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:50:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:50:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:50:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:50:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:50:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:50:36 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:36 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:50:36 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:50:36 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:50:36 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:50:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:36 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:50:37 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:50:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:50:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:50:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:50:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:50:37 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:50:38 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:50:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:50:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:50:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:50:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:50:38 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:50:39 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:50:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:50:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:50:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:50:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:50:39 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:50:40 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:50:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:50:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:50:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:50:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:50:40 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:50:41 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:50:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:50:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:50:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:50:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:50:41 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:50:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:50:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:50:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:50:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:50:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:50:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:50:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:50:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:50:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:50:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:50:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:50:41 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1180 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:50:41 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1180 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:50:41 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1180 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:50:41 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1180 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:50:41 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1180 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:50:41 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1180 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:50:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:50:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:50:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:50:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:50:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:50:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:50:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:50:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:50:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:50:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:50:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:50:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:50:46 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:50:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:50:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:50:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:50:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:50:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:50:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:50:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:50:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:50:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:50:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:50:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:50:51 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:50:51 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:50:52 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:50:52 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:50:52 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:50:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:50:52 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:50:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:50:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:50:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:50:52 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:50:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:50:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:50:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:50:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:50:53 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:50:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:50:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:50:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:50:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:50:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:50:53 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:50:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:50:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:50:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:50:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:50:54 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:50:54 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:50:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:50:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:50:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:50:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:50:55 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:50:55 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:50:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:50:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:50:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:50:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:50:56 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:50:56 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:50:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:50:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:50:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:50:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:50:57 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:50:57 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:50:58 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:50:58 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:50:59 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:50:59 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:51:00 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:51:00 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:51:00 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 12:51:01 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 12:51:01 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 12:51:02 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 12:51:02 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 12:51:03 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 12:51:03 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 12:51:04 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 12:51:04 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 12:51:05 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 12:51:05 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 12:51:06 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 12:51:06 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 12:51:07 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 12:51:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:51:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:51:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:51:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:51:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:51:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:51:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:51:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:51:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:51:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:51:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:51:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:51:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:51:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:51:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:51:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:51:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:51:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:51:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:51:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:51:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:51:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:51:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:51:12 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:51:12 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:51:12 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:51:12 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:51:12 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:51:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:51:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:51:12 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:51:12 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:51:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:51:13 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:51:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:51:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:51:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:51:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:51:13 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:51:14 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:51:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:51:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:51:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:51:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:51:14 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:51:15 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:51:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:51:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:51:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:51:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:51:15 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:51:16 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:51:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:51:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:51:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:51:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:51:16 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:51:17 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:51:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:51:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:51:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:51:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:51:17 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:51:18 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:51:18 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:51:19 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:51:19 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:51:19 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:51:20 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:51:20 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:51:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:51:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:51:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:51:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:51:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:51:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:51:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:51:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:51:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:51:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:51:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:51:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:51:20 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:51:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:51:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:51:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:51:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:51:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:51:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:51:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:51:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:51:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:51:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:51:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:51:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:51:25 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:51:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:51:25 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:51:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:51:26 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:51:26 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:51:26 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:51:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:51:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:51:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:51:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:51:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:51:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:51:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:51:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:51:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:51:26 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:51:26 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:51:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:51:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:51:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:51:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:51:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:51:26 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:51:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:51:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:51:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:51:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:51:27 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:51:27 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:51:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:51:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:51:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:51:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:51:28 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:51:28 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:51:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:51:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:51:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:51:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:51:29 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:51:29 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:51:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:51:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:51:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:51:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:51:30 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:51:30 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:51:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:51:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:51:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:51:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:51:31 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:51:31 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:51:32 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:51:32 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:51:33 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:51:33 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:51:34 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:51:34 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:51:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:51:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:51:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:51:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:51:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:51:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:51:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:51:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:51:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:51:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:51:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:51:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:51:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:51:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:51:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:51:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:51:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:51:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:51:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:51:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:51:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:51:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:51:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:51:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:51:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:51:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:51:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:51:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:51:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:51:40 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:51:40 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:51:40 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:51:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:51:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:51:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:51:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:51:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:51:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:51:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:51:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:51:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:51:40 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:51:40 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:51:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:51:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:51:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:51:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:51:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:51:40 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:51:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:51:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:51:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:51:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:51:41 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:51:41 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:51:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:51:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:51:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:51:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:51:41 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:51:42 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:51:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:51:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:51:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:51:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:51:42 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:51:43 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:51:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:51:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:51:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:51:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:51:43 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:51:44 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:51:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:51:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:51:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:51:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:51:44 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:51:45 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:51:45 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:51:46 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:51:46 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:51:47 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:51:47 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:51:48 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:51:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:51:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:51:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:51:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:51:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:51:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:51:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:51:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:51:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:51:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:51:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:51:48 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:51:48 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:51:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:51:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:51:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:51:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:51:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:51:48 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 12:51:49 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 12:51:49 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 12:51:49 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 12:51:50 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 12:51:50 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 12:51:51 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 12:51:51 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 12:51:52 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 12:51:52 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 12:51:53 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 12:51:53 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 12:51:54 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 12:51:54 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 12:51:55 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 12:51:55 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 12:51:56 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 12:51:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:51:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:51:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:51:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:51:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:51:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:51:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:51:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:51:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:51:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:51:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:51:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:51:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:51:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:51:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:52:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:52:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:52:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:52:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:52:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:52:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:52:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:52:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:52:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:52:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:52:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:52:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:52:01 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:52:01 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:52:01 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:52:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:52:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:52:01 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:52:01 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:52:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:52:02 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:52:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:52:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:52:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:52:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:52:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:52:03 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:52:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:52:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:52:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:52:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:52:03 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:52:04 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:52:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:52:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:52:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:52:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:52:04 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:52:05 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:52:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:52:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:52:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:52:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:52:05 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:52:05 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:52:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:52:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:52:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:52:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:52:06 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:52:06 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:52:07 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:52:07 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:52:08 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:52:08 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:52:09 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:52:09 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:52:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:52:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:52:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:52:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:52:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:52:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:52:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:52:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:52:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:52:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:52:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:52:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:52:09 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:52:09 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:52:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:52:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:52:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:52:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:52:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:52:10 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 12:52:10 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 12:52:11 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 12:52:11 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 12:52:12 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 12:52:12 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 12:52:13 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 12:52:13 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 12:52:13 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 12:52:14 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 12:52:14 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 12:52:15 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 12:52:15 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 12:52:16 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 12:52:16 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 12:52:17 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 12:52:17 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 12:52:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:52:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:52:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:52:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:52:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:52:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:52:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:52:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:52:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:52:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:52:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:52:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:52:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:52:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:52:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:52:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:52:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:52:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:52:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:52:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:52:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:52:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:52:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:52:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:52:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:52:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:52:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:52:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:52:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:52:23 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:52:23 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:52:23 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:52:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:52:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:52:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:52:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:52:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:52:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:52:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:52:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:52:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:52:23 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:52:23 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:52:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:52:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:52:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:52:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:52:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:52:23 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:52:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:52:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:52:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:52:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:52:24 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:52:24 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:52:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:52:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:52:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:52:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:52:25 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:52:25 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:52:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:52:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:52:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:52:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:52:26 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:52:26 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:52:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:52:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:52:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:52:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:52:27 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:52:27 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:52:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:52:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:52:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:52:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:52:28 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:52:28 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:52:29 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:52:29 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:52:29 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:52:30 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:52:30 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:52:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:52:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:52:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:52:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:52:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:52:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:52:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:52:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:52:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:52:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:52:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:52:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:52:31 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:52:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:52:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:52:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:52:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:52:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:52:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:52:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:52:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:52:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:52:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:52:36 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:52:36 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:52:36 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:52:36 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:52:36 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:52:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:52:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:52:36 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:52:36 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:52:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:52:37 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:52:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:52:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:52:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:52:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:52:37 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:52:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:52:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:52:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:52:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:52:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:52:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:52:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:52:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:52:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:52:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:52:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:52:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=314 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:52:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:52:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:52:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=314 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:52:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=314 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:52:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=314 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:52:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=314 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:52:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=314 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:52:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=315 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:52:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=315 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:52:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=315 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:52:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=315 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:52:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=315 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:52:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=315 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:52:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=315 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:52:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=315 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:52:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:52:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:52:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:52:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:52:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:52:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:52:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:52:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:52:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:52:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:52:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:52:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:52:42 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:52:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:52:43 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:52:43 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:52:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:52:43 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:52:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:52:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:52:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:52:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:52:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:52:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:52:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:52:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:52:43 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:52:43 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:52:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:52:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:52:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:52:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:52:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:52:43 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:52:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:52:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:52:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:52:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:52:44 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:52:44 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:52:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:52:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:52:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:52:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:52:45 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:52:45 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:52:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:52:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:52:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:52:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:52:46 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:52:46 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:52:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:52:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:52:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:52:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:52:47 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:52:47 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:52:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:52:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:52:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:52:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:52:48 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:52:48 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:52:49 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:52:49 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:52:49 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:52:50 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:52:50 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:52:51 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:52:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:52:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:52:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:52:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:52:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:52:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:52:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:52:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:52:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:52:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:52:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:52:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:52:51 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:52:51 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:52:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:52:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:52:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:52:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:52:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:52:51 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 12:52:52 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 12:52:52 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 12:52:53 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 12:52:53 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 12:52:54 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 12:52:54 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 12:52:55 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 12:52:55 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 12:52:56 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 12:52:56 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 12:52:57 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 12:52:57 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 12:52:58 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 12:52:58 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 12:52:58 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 12:52:59 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 12:52:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:52:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:52:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:52:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:52:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:52:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:52:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:52:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:52:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:52:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:52:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:52:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:52:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3579 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:52:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:52:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:52:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:52:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3579 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:52:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3579 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:52:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3579 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:52:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3579 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:53:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:53:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:53:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:53:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:53:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:53:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:53:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:53:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:53:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:53:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:53:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:53:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:53:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:53:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:53:05 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:53:05 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:53:05 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:53:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:53:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:53:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:53:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:53:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:53:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:53:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:53:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:53:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:53:05 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:53:05 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:53:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:53:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:53:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:53:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:53:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:53:05 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:53:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:53:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:53:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:53:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:53:05 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:53:06 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:53:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:53:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:53:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:53:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:53:06 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:53:07 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:53:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:53:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:53:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:53:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:53:07 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:53:08 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:53:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:53:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:53:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:53:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:53:08 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:53:09 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:53:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:53:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:53:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:53:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:53:09 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:53:10 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:53:10 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:53:11 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:53:11 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:53:12 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:53:12 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:53:13 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:53:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:53:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:53:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:53:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:53:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:53:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:53:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:53:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:53:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:53:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:53:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:53:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:53:13 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:53:13 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:53:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:53:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:53:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:53:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:53:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:53:13 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 12:53:14 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 12:53:14 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 12:53:14 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 12:53:15 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 12:53:15 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 12:53:16 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 12:53:16 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 12:53:17 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 12:53:17 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 12:53:18 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 12:53:18 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 12:53:19 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 12:53:19 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 12:53:20 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 12:53:20 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 12:53:21 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 12:53:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:53:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:53:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:53:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:53:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:53:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:53:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:53:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:53:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:53:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:53:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:53:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:53:21 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:53:21 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:53:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:53:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:53:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:53:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:53:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:53:21 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 12:53:22 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 12:53:22 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 12:53:23 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 12:53:23 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 12:53:23 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 12:53:24 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 12:53:24 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 12:53:25 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 12:53:25 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 12:53:26 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 12:53:26 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 12:53:27 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 12:53:27 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 12:53:28 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 12:53:28 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 12:53:29 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 12:53:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:53:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:53:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:53:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:53:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:53:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:53:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:53:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:53:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:53:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:53:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:53:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:53:29 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:53:29 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:53:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:53:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:53:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:53:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:53:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:53:29 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 12:53:30 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 12:53:30 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 12:53:30 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 12:53:31 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 12:53:31 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 12:53:32 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 12:53:32 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 12:53:33 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 12:53:33 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 12:53:34 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-25 12:53:34 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-25 12:53:35 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-25 12:53:35 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-25 12:53:36 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-25 12:53:36 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-25 12:53:37 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-25 12:53:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:53:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:53:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:53:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:53:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:53:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:53:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:53:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:53:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:53:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:53:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:53:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:53:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:53:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:53:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:53:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:53:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:53:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:53:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:53:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:53:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:53:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:53:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:53:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:53:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:53:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:53:42 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:53:42 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:53:42 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:53:42 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:53:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:53:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:53:42 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:53:42 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:53:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:53:43 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:53:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:53:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:53:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:53:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:53:43 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:53:44 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:53:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:53:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:53:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:53:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:53:44 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:53:45 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:53:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:53:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:53:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:53:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:53:45 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:53:46 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:53:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:53:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:53:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:53:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:53:46 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:53:47 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:53:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:53:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:53:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:53:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:53:47 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:53:48 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:53:48 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:53:48 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:53:49 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:53:49 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:53:50 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:53:50 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:53:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:53:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:53:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:53:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:53:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:53:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:53:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:53:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:53:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:53:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:53:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:53:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:53:50 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:53:50 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:53:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:53:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:53:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:53:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:53:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:53:51 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 12:53:51 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 12:53:52 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 12:53:52 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 12:53:53 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 12:53:53 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 12:53:54 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 12:53:54 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 12:53:55 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 12:53:55 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 12:53:56 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 12:53:56 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 12:53:56 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 12:53:57 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 12:53:57 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 12:53:58 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 12:53:58 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 12:53:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:53:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:53:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:53:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:53:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:53:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:53:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:53:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:53:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:53:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:53:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:53:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:53:58 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:53:58 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:53:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:53:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:53:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:53:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:53:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:53:59 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 12:53:59 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 12:54:00 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 12:54:00 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 12:54:01 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 12:54:01 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 12:54:02 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 12:54:02 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 12:54:03 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 12:54:03 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 12:54:04 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 12:54:04 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 12:54:04 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 12:54:05 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 12:54:05 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 12:54:06 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 12:54:06 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 12:54:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:54:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:54:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:54:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:54:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:54:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:54:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:54:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:54:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:54:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:54:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:54:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:54:07 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:54:07 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:54:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:54:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:54:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:54:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:54:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:54:07 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 12:54:07 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 12:54:08 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 12:54:08 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 12:54:09 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 12:54:09 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 12:54:10 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 12:54:10 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 12:54:11 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 12:54:11 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 12:54:12 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-25 12:54:12 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-25 12:54:12 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-25 12:54:13 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-25 12:54:13 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-25 12:54:14 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-25 12:54:14 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-25 12:54:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:54:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:54:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:54:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:54:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:54:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:54:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:54:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:54:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:54:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:54:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:54:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:54:15 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:54:15 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:54:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:54:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:54:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:54:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:54:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:54:15 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-25 12:54:15 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-25 12:54:16 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-25 12:54:16 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-25 12:54:17 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-25 12:54:17 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-25 12:54:18 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-25 12:54:18 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-25 12:54:19 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-25 12:54:19 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-25 12:54:20 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-25 12:54:20 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-25 12:54:20 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-25 12:54:21 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-25 12:54:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:54:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:54:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:54:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:54:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:54:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:54:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:54:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:54:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:54:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:54:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:54:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:54:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:54:22 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=8672 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:54:22 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=8672 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:54:22 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=8672 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:54:22 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=8672 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:54:22 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=8672 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:54:22 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=8672 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:54:22 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=8672 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:54:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:54:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:54:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:54:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:54:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:54:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:54:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:54:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:54:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:54:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:54:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:54:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:54:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:54:28 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:54:28 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:54:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:54:28 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:54:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:54:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:54:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:54:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:54:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:54:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:54:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:54:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:54:28 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:54:28 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:54:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:54:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:54:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:54:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:54:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:54:28 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:54:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:54:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:54:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:54:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:54:29 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:54:29 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:54:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:54:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:54:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:54:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:54:30 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:54:30 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:54:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:54:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:54:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:54:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:54:31 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:54:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:54:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:54:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:54:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:54:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:54:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:54:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:54:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:54:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:54:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:54:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:54:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:54:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:54:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:54:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:54:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:54:31 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:54:31 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=769 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:54:31 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=769 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:54:31 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=769 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:54:31 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=769 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:54:31 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=769 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:54:31 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=769 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:54:31 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=770 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:54:31 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=770 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:54:31 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=770 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:54:31 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=770 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:54:31 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=770 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:54:31 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=770 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:54:31 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=770 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:54:31 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=770 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:54:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:54:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:54:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:54:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:54:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:54:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:54:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:54:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:54:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:54:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:54:36 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:54:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:54:36 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:54:37 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:54:37 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:54:37 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:54:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:54:37 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:54:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:54:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:54:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:54:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:54:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:54:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:54:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:54:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:54:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:54:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:54:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:54:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:54:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:54:37 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:54:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:54:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:54:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:54:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:54:38 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:54:38 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:54:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:54:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:54:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:54:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:54:39 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:54:39 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:54:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:54:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:54:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:54:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:54:40 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:54:40 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:54:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:54:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:54:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:54:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:54:41 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:54:41 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:54:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:54:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:54:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:54:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:54:42 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:54:42 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:54:43 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:54:43 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:54:43 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:54:44 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:54:44 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:54:45 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:54:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:54:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:54:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:54:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:54:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:54:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:54:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:54:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:54:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:54:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:54:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:54:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:54:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:54:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:54:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:54:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:54:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:54:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:54:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:54:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:54:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:54:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:54:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:54:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:54:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:54:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:54:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:54:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:54:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:54:51 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:54:51 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:54:51 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:54:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:54:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:54:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:54:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:54:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:54:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:54:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:54:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:54:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:54:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:54:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:54:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:54:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:54:51 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:54:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:54:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:54:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:54:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:54:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:54:52 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:54:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:54:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:54:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:54:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:54:52 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:54:53 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:54:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:54:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:54:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:54:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:54:53 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:54:54 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:54:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:54:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:54:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:54:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:54:54 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:54:55 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:54:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:54:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:54:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:54:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:54:55 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:54:56 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:54:56 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:54:57 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:54:57 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:54:58 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:54:58 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:54:59 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:54:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:54:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:54:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:54:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:54:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:54:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:54:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:54:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:54:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:54:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:54:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:54:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:54:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:54:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:54:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:54:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1846 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:54:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1846 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:54:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1846 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:54:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1846 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:54:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1846 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:54:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1846 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:55:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:55:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:55:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:55:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:55:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:55:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:55:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:55:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:55:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:55:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:55:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:55:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:55:04 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:55:04 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:55:04 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:55:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:55:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:55:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:55:05 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:55:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:55:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:55:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:55:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:55:05 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:55:06 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:55:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:55:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:55:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:55:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:55:06 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:55:07 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:55:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:55:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:55:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:55:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:55:07 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:55:07 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:55:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:55:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:55:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:55:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:55:08 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:55:08 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:55:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:55:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:55:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:55:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:55:09 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:55:09 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:55:10 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:55:10 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:55:11 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:55:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:55:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:55:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:55:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:55:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:55:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:55:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:55:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:55:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:55:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:55:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:55:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:55:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:55:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:55:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:55:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:55:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:55:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:55:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:55:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:55:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:55:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:55:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:55:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:55:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:55:16 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:55:16 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:55:16 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:55:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:55:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:55:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:55:17 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:55:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:55:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:55:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:55:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:55:17 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:55:18 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:55:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:55:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:55:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:55:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:55:18 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:55:19 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:55:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:55:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:55:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:55:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:55:19 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:55:20 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:55:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:55:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:55:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:55:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:55:20 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:55:21 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:55:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:55:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:55:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:55:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:55:21 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:55:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:55:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:55:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:55:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:55:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:55:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:55:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:55:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:55:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:55:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:55:22 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:55:22 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:55:23 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:55:23 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:55:24 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:55:24 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:55:25 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:55:25 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 12:55:25 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 12:55:26 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:55:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:55:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:55:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:55:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:55:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:55:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:55:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:55:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:55:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:55:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:55:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:55:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:55:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:55:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:55:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:55:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:55:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:55:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:55:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:55:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:55:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:55:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:55:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:55:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:55:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:55:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:55:32 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:55:32 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:55:32 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:55:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:55:32 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:55:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:55:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:55:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:55:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:55:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:55:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:55:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:55:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:55:32 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:55:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:55:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:55:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:55:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:55:33 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:55:33 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:55:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:55:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:55:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:55:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:55:34 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:55:34 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:55:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:55:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:55:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:55:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:55:35 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:55:35 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:55:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:55:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:55:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:55:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:55:36 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:55:36 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:55:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:55:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:55:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:55:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:55:36 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:55:37 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:55:37 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:55:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:55:38 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:55:38 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:55:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:55:39 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:55:39 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:55:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:55:40 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:55:40 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 12:55:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:55:41 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 12:55:41 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 12:55:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:55:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:55:42 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 12:55:42 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 12:55:43 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 12:55:43 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 12:55:44 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 12:55:44 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 12:55:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:55:45 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 12:55:45 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 12:55:46 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 12:55:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:55:46 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 12:55:46 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 12:55:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:55:47 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 12:55:47 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 12:55:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:55:48 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 12:55:48 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 12:55:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:55:49 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 12:55:49 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 12:55:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:55:50 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 12:55:50 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 12:55:51 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 12:55:51 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 12:55:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:55:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:55:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:55:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:55:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:55:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:55:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:55:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:55:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:55:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:55:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:55:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:55:52 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:55:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:55:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:55:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:55:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:55:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:55:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:55:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:55:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:55:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:55:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:55:57 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:55:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:55:57 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:55:57 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:55:57 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:55:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:55:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:55:57 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:55:57 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD NOHANDOVER
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:55:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=130 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=131 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=133 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=134 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=136 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=137 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=139 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=140 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=143 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=145 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=146 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=148 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=149 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=151 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=152 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=154 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=157 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=158 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=160 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=161 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=163 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=164 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=166 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=167 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=169 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=170 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=172 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=173 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=175 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=176 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=178 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=179 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=182 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:57 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=184 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=185 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=187 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=188 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=190 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=191 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=193 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=196 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=197 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=199 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=200 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=202 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=203 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=205 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=206 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:58 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=208 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=209 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=211 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=212 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:58 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=214 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:55:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:55:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:55:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:55:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:55:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD NOHANDOVER
2024-10-25 12:55:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:55:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:55:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:55:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:55:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:55:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:55:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:55:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:55:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:55:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:55:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:55:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:55:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:55:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:55:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=303 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:55:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=303 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:55:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=303 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:55:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=303 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:55:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=303 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:55:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=303 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:56:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:56:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:56:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:56:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:56:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:56:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:56:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:56:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:56:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:56:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:56:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:56:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:56:04 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:56:04 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:56:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:56:04 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:56:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:56:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:56:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:56:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:56:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:56:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:56:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:56:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:56:04 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:56:04 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD NOHANDOVER
2024-10-25 12:56:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:56:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:56:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:56:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=127 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=128 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=130 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=131 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=133 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=134 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=136 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=137 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=139 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=140 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=143 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=145 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=146 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=148 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=149 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=151 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=152 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=154 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=157 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=158 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=160 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=161 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=163 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=164 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=166 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=167 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=169 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=170 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=172 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=173 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=175 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=176 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=178 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=179 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=182 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=184 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=185 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=187 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=188 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=190 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=191 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=193 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=196 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=197 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=199 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=200 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=202 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=203 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=205 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=206 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=208 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=209 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=211 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=212 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 12:56:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:56:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:56:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:56:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:56:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD NOHANDOVER
2024-10-25 12:56:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:56:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:56:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:56:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:56:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:56:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:56:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:56:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:56:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:56:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:56:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:56:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:56:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:56:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:56:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=307 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:56:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=307 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:56:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=307 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:56:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=307 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:56:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=307 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:56:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=307 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:56:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=307 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:56:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=307 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:56:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:56:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:56:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:56:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:56:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:56:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:56:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:56:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:56:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:56:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:56:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:56:10 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:56:10 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:56:10 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:56:10 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:56:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:56:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:56:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:56:11 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:56:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:56:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:56:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:56:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:56:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:56:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:56:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:56:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:56:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:56:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:56:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:56:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:56:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:56:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:56:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:56:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:56:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:56:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:56:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:56:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:56:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:56:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:56:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:56:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:56:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:56:16 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:56:16 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:56:16 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:56:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:56:16 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:56:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:56:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:56:17 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:56:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:56:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:56:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:56:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:56:17 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:56:18 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:56:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:56:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:56:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:56:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:56:18 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:56:18 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:56:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:56:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:56:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:56:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:56:19 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:56:19 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:56:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:56:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:56:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:56:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:56:20 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:56:20 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:56:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:56:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:56:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:56:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:56:21 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:56:21 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:56:22 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:56:22 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:56:23 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:56:23 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:56:24 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:56:24 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:56:25 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 12:56:25 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 12:56:26 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 12:56:26 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 12:56:27 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 12:56:27 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 12:56:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:56:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:56:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:56:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:56:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:56:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:56:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:56:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:56:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:56:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:56:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:56:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:56:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2456 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:56:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:56:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:56:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:56:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2456 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:56:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2456 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:56:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2456 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:56:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2456 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:56:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2457 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:56:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2457 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:56:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2457 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:56:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2457 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:56:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2457 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:56:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2457 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:56:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2457 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:56:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2457 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:56:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:56:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:56:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:56:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:56:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:56:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:56:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:56:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:56:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:56:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:56:32 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:32 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:56:33 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:56:33 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:56:33 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:56:33 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:56:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:56:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:56:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:56:33 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:56:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:56:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:56:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:56:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:56:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:56:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:56:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:56:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:56:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:56:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:56:33 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:56:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:56:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:56:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:56:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:56:34 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:56:34 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:56:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:56:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:56:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:56:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:56:34 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:56:35 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:56:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:56:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:56:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:56:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:56:35 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:56:36 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:56:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:56:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:56:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:56:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:56:36 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:56:37 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:56:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:56:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:56:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:56:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:56:37 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:56:38 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:56:38 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:56:39 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:56:39 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:56:40 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:56:40 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:56:41 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:56:41 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 12:56:42 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 12:56:42 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 12:56:43 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 12:56:43 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 12:56:44 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 12:56:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:56:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:56:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:56:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:56:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:56:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:56:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:56:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:56:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:56:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:56:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:56:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:56:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2460 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:56:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:56:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:56:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:56:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2460 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:56:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2460 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:56:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2460 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:56:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2460 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:56:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2460 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:56:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2460 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:56:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2460 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:56:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:56:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:56:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:56:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:56:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:56:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:56:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:56:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:56:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:56:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:56:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:56:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:56:49 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:56:49 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:56:49 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:56:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:56:49 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:56:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:56:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:56:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:56:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:56:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:56:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:56:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:56:50 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:56:50 [DEBUG] fake_trx.py:263 (MS@172.18.96.22:6700) Recv SETTA cmd
2024-10-25 12:56:51 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:56:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:56:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:56:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:56:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:56:51 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:56:51 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:56:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:56:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:56:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:56:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:56:52 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:56:52 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:56:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:56:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:56:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:56:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:56:53 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:56:53 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:56:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:56:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:56:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:56:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:56:54 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:56:54 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:56:55 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:56:55 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:56:56 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:56:56 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:56:57 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:56:57 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:56:58 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 12:56:58 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 12:56:59 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 12:56:59 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 12:57:00 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 12:57:00 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 12:57:00 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 12:57:01 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 12:57:01 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 12:57:02 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 12:57:02 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 12:57:03 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 12:57:03 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 12:57:04 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 12:57:04 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 12:57:05 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 12:57:05 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 12:57:06 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 12:57:06 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 12:57:07 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 12:57:07 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 12:57:08 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 12:57:08 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 12:57:09 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 12:57:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:57:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:57:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:57:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:57:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:57:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:57:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:57:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:57:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:57:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:57:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:57:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:57:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:57:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:57:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:57:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4335 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:57:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4335 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:57:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4335 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:57:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4335 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:57:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4335 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:57:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4335 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:57:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:57:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:57:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:57:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:57:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:57:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:57:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:57:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:57:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:57:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:57:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:57:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:57:14 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:57:14 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:57:14 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:57:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:57:14 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:57:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:57:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:57:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:57:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:57:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:57:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:57:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:57:15 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:57:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:57:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:57:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:57:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:57:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:57:16 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:57:17 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:57:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:57:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:57:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:57:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:57:17 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:57:18 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:57:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:57:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:57:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:57:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:57:18 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:57:19 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:57:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:57:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:57:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:57:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:57:19 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:57:20 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:57:20 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:57:21 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:57:21 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:57:21 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:57:22 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:57:22 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:57:23 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 12:57:23 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 12:57:24 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 12:57:24 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 12:57:25 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 12:57:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:57:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:57:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:57:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:57:25 [WARNING] transceiver.py:250 (MS@172.18.96.22:6700) RX TRXD message (fn=2358 tn=4 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:57:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:57:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:57:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:57:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:57:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:57:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:57:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:57:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:57:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:57:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:57:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:57:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:57:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:57:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:57:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:57:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:57:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:57:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:57:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:57:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:57:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:57:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:57:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:57:30 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:57:30 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:57:30 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:57:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:57:30 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:57:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:57:30 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:57:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:57:31 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:57:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:57:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:57:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:57:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:57:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:57:32 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:57:32 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:57:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:57:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:57:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:57:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:57:32 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:57:33 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:57:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:57:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:57:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:57:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:57:33 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:57:34 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:57:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:57:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:57:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:57:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:57:34 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:57:35 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:57:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:57:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:57:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:57:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:57:35 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:57:36 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:57:36 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:57:37 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:57:37 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:57:37 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:57:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:57:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:57:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:57:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:57:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:57:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:57:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:57:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:57:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:57:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:57:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:57:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:57:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:57:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:57:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:57:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1668 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:57:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1668 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:57:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1668 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:57:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1668 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:57:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1668 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:57:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1668 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:57:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1668 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:57:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:57:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:57:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:57:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:57:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:57:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:57:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:57:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:57:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:57:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:57:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:57:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:57:43 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:57:43 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:57:43 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:57:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:57:43 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:57:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:57:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:57:44 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:57:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:57:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:57:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:57:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:57:44 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:57:45 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:57:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:57:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:57:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:57:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:57:45 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:57:46 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:57:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:57:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:57:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:57:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:57:46 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:57:46 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:57:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:57:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:57:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:57:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:57:47 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:57:47 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:57:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:57:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:57:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:57:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:57:48 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:57:48 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:57:49 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:57:49 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:57:50 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:57:50 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:57:51 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:57:51 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:57:52 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 12:57:52 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 12:57:53 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 12:57:53 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 12:57:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:57:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:57:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:57:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:57:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:57:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:57:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:57:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:57:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:57:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:57:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:57:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:57:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:57:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:57:53 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:57:53 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2285 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:57:53 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2285 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:57:53 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2285 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:57:53 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2285 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:57:53 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2285 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:57:53 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2285 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:57:53 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2285 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:57:53 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2285 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:57:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:57:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:57:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:57:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:57:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:57:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:57:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:57:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:57:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:57:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:57:58 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:57:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:57:58 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:57:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:57:59 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:57:59 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:57:59 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:57:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:57:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:57:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:57:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:57:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:57:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:57:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:57:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:57:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:57:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:57:59 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:57:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:57:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:57:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:57:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:57:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:57:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:57:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:57:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:57:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:57:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:57:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:57:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:57:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:57:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:57:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:57:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:58:00 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:58:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:58:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:58:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:58:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:58:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:58:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:58:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:58:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:58:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:58:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:58:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:58:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:58:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:58:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:58:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:58:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:58:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:58:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:58:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:58:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:58:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:58:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:58:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:58:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:58:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:58:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:58:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:00 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:58:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:58:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:58:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:58:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:58:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:58:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:58:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:58:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:58:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:58:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:58:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:58:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:58:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:58:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:58:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:58:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:58:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:58:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:58:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=495 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=495 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=495 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=495 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=495 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=495 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=495 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:58:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:58:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:58:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:58:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:58:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:58:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:58:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:58:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:58:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:58:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:58:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:58:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:58:06 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:58:06 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:58:06 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:58:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:58:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:58:06 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:07 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:58:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:58:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:58:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:58:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:58:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:58:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:58:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:58:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:58:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:58:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:58:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:58:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=211 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:58:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:58:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:58:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=211 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=211 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=211 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=211 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=211 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=211 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=211 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:58:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:58:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:58:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:58:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:58:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:58:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:58:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:58:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:58:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:58:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:58:12 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:58:12 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:58:12 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:58:12 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:58:12 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:58:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:58:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:58:13 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:58:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:58:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:58:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:58:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:58:13 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:58:13 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:58:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:58:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:58:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:58:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:58:14 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:58:14 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:58:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:58:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:58:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:58:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:58:15 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:58:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:58:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:58:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:58:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:58:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:58:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:58:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:58:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:58:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:58:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:58:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:58:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:58:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:58:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:15 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:58:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:58:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:58:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:58:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:58:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:58:16 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:58:16 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:58:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:58:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:58:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:58:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:58:17 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:58:17 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:58:18 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:58:18 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:58:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:58:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:58:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:58:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:58:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:58:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:58:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:58:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:58:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:58:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:58:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:58:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:58:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:58:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:58:19 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:58:19 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:58:20 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:58:20 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:58:21 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 12:58:21 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 12:58:22 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 12:58:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:58:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:58:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:58:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:58:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:58:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:58:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:58:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:58:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:58:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:58:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:58:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:58:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:58:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:58:22 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 12:58:23 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 12:58:23 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 12:58:23 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 12:58:24 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 12:58:24 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 12:58:25 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 12:58:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:58:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:58:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:58:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:58:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:58:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:58:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:58:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:58:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:58:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:58:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:58:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:58:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:58:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:58:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:58:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:58:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:58:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:58:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:58:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:58:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:58:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:58:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:58:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:58:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:58:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:58:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:58:30 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:58:30 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:58:30 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:58:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:58:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:58:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:58:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:58:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:58:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:58:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:58:31 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:58:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:58:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:58:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:58:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:58:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:58:32 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:58:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:58:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:58:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:58:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:58:32 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:58:33 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:58:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:58:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:58:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:58:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:58:33 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:58:34 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:58:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:58:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:58:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:58:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:58:34 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:58:35 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:58:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:58:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:58:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:58:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:58:35 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:58:36 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:58:36 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:58:37 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:58:37 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:58:38 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:58:38 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:58:38 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:58:39 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 12:58:39 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 12:58:40 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 12:58:40 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 12:58:41 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 12:58:41 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 12:58:42 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 12:58:42 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 12:58:43 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 12:58:43 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 12:58:44 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 12:58:44 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 12:58:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:58:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:58:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:58:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:58:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:58:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:58:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:58:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:58:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:58:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:58:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:58:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:58:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:58:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3125 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3126 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:58:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:58:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:58:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:58:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:58:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:58:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:58:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:58:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:58:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:58:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:58:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:58:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:58:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:58:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:58:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:58:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:58:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:58:50 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:58:50 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:58:50 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:58:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:58:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:58:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:58:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:58:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:58:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:58:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:58:51 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:58:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:58:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:58:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:58:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:58:52 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:58:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:58:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:58:52 [WARNING] transceiver.py:250 (MS@172.18.96.22:6700) RX TRXD message (fn=568 tn=0 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:52 [WARNING] transceiver.py:250 (MS@172.18.96.22:6700) RX TRXD message (fn=568 tn=1 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:58:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:58:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:58:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:58:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:58:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:58:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:58:52 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:58:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:58:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:58:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:58:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:58:53 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:58:53 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:58:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:58:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:58:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:58:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:58:54 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:58:54 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:58:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:58:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:58:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:58:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:58:55 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:58:55 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:58:56 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:58:56 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:58:57 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:58:57 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:58:58 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:58:58 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:58:59 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 12:58:59 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 12:58:59 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 12:59:00 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 12:59:00 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 12:59:01 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 12:59:01 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 12:59:02 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 12:59:02 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 12:59:03 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 12:59:03 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 12:59:04 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 12:59:04 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 12:59:05 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 12:59:05 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 12:59:06 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 12:59:06 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 12:59:07 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 12:59:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:59:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:59:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:59:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:59:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:59:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:59:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:59:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:59:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:59:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:59:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:59:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:59:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:59:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:59:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:59:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:59:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:59:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:59:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:59:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:59:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:59:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:59:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:59:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:59:12 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:59:12 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:59:12 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:59:12 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:59:12 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:59:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:59:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:59:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:59:13 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:59:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:59:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:59:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:59:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:59:13 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:59:14 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:59:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:59:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:59:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:59:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:59:14 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:59:15 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:59:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:59:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:59:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:59:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:59:15 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:59:16 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:59:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:59:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:59:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:59:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:59:16 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:59:17 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:59:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:59:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:59:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:59:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:59:17 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:59:18 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:59:18 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:59:19 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:59:19 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:59:19 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:59:20 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:59:20 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:59:21 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 12:59:21 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 12:59:22 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 12:59:22 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 12:59:23 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 12:59:23 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 12:59:24 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 12:59:24 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 12:59:25 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 12:59:25 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 12:59:26 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 12:59:26 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 12:59:27 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 12:59:27 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 12:59:28 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 12:59:28 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 12:59:28 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 12:59:29 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 12:59:29 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 12:59:30 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 12:59:30 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 12:59:31 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 12:59:31 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 12:59:32 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 12:59:32 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 12:59:33 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 12:59:33 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 12:59:34 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 12:59:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:59:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:59:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:59:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:59:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:59:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:59:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:59:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:59:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:59:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:59:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 12:59:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:59:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:59:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4739 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:59:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4739 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:59:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4739 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:59:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4739 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:59:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4739 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:59:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4739 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:59:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4739 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 12:59:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:59:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 12:59:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:59:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 12:59:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:59:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 12:59:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:59:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 12:59:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 12:59:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 12:59:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 12:59:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 12:59:39 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 12:59:39 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 12:59:39 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 12:59:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 12:59:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 12:59:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 12:59:40 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 12:59:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:59:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:59:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:59:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:59:40 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 12:59:41 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 12:59:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:59:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:59:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:59:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:59:41 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 12:59:42 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 12:59:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:59:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:59:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:59:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:59:42 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 12:59:43 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 12:59:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:59:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:59:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:59:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:59:43 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 12:59:44 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 12:59:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 12:59:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 12:59:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 12:59:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 12:59:44 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 12:59:45 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 12:59:45 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 12:59:46 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 12:59:46 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 12:59:47 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 12:59:47 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 12:59:47 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 12:59:48 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 12:59:48 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 12:59:49 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 12:59:49 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 12:59:50 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 12:59:50 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 12:59:51 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 12:59:51 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 12:59:52 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 12:59:52 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 12:59:53 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 12:59:53 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 12:59:54 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 12:59:54 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 12:59:55 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 12:59:55 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 12:59:56 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 12:59:56 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 12:59:57 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 12:59:57 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 12:59:57 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 12:59:58 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 12:59:58 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 12:59:59 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 12:59:59 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 13:00:00 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 13:00:00 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 13:00:01 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 13:00:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:00:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:00:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:00:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:00:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:00:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:00:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:00:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:00:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:00:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:00:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4733 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:00:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:00:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:00:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:00:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4733 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:00:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4733 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:00:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4733 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:00:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4733 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:00:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4734 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:00:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4734 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:00:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4734 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:00:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4734 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:00:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4734 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:00:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4734 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:00:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4734 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:00:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4734 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:00:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:00:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:00:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:00:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:00:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:00:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:00:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:00:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:00:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:00:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:00:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:00:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:00:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:00:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:00:07 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:00:07 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:00:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:00:07 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:00:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:00:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:00:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:00:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:00:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:00:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:00:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:00:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:00:07 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:00:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:00:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:00:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:00:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:00:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:00:08 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:00:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:00:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:00:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:00:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:00:08 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:00:09 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:00:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:00:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:00:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:00:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:00:09 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:00:10 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:00:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:00:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:00:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:00:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:00:10 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:00:11 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:00:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:00:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:00:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:00:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:00:11 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:00:12 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:00:12 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:00:13 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:00:13 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:00:14 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:00:14 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:00:15 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:00:15 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:00:15 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:00:16 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:00:16 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:00:17 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:00:17 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:00:18 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:00:18 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:00:19 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:00:19 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:00:20 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:00:20 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:00:21 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:00:21 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:00:22 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:00:22 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 13:00:23 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 13:00:23 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 13:00:24 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 13:00:24 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 13:00:24 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 13:00:25 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 13:00:25 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 13:00:26 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 13:00:26 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 13:00:27 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 13:00:27 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 13:00:28 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 13:00:28 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 13:00:29 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 13:00:29 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 13:00:30 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 13:00:30 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 13:00:31 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 13:00:31 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 13:00:32 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 13:00:32 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 13:00:33 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 13:00:33 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 13:00:34 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 13:00:34 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 13:00:34 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 13:00:35 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 13:00:35 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 13:00:36 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-25 13:00:36 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-25 13:00:37 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-25 13:00:37 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-25 13:00:38 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-25 13:00:38 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-25 13:00:39 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-25 13:00:39 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-25 13:00:40 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-25 13:00:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:00:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:00:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:00:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:00:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:00:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:00:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:00:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:00:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:00:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:00:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:00:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:00:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:00:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:00:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:00:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:00:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:00:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:00:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:00:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:00:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:00:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:00:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:00:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:00:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:00:45 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:00:46 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:00:46 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:00:46 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:00:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:00:46 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:00:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:00:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:00:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:00:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:00:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:00:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:00:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:00:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:00:46 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:00:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:00:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:00:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:00:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:00:46 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:00:47 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:00:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:00:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:00:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:00:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:00:47 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:00:48 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:00:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:00:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:00:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:00:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:00:48 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:00:49 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:00:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:00:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:00:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:00:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:00:49 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:00:50 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:00:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:00:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:00:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:00:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:00:50 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:00:51 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:00:51 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:00:52 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:00:52 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:00:53 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:00:53 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:00:54 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:00:54 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:00:55 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:00:55 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:00:55 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:00:56 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:00:56 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:00:57 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:00:57 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:00:58 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:00:58 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:00:59 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:00:59 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:01:00 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:01:00 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:01:01 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:01:01 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 13:01:02 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 13:01:02 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 13:01:03 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 13:01:03 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 13:01:04 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 13:01:04 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 13:01:04 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 13:01:05 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 13:01:05 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 13:01:06 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 13:01:06 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 13:01:07 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 13:01:07 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 13:01:08 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 13:01:08 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 13:01:09 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 13:01:09 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 13:01:10 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 13:01:10 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 13:01:11 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 13:01:11 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 13:01:12 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 13:01:12 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 13:01:13 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 13:01:13 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 13:01:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:01:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:01:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:01:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:01:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:01:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:01:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:01:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:01:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:01:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:01:13 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:01:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:01:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:01:13 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6038 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:13 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6038 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:13 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6038 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:13 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6038 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:13 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6038 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:13 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6038 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:13 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6038 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:01:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:01:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:01:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:01:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:01:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:01:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:01:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:01:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:01:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:01:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:01:18 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:18 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:01:19 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:01:19 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:01:19 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:01:19 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:01:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:01:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:01:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:01:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:01:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:01:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:01:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:01:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:01:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:01:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:01:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:01:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:01:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:01:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:01:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:01:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:01:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:01:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:01:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:01:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:01:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:01:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:01:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:01:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:24 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:01:24 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:01:24 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:01:24 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:01:24 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:01:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:01:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:01:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:01:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:01:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:01:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:01:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:01:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:01:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:01:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:01:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:01:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:01:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:01:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:01:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:01:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:01:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:01:30 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:01:30 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:01:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:01:30 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:01:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:01:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:01:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:01:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:01:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:01:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:01:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:01:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:01:30 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:01:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:01:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:01:30 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:30 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:30 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:30 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:30 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:30 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:30 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:30 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:30 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:30 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:01:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:01:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:01:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:01:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:01:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:01:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:01:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:01:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:01:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:01:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:01:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:01:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:01:35 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:01:35 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:01:35 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:01:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:01:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:01:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:01:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:01:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:01:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:01:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:01:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:01:36 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:01:37 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:01:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:01:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:01:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:01:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:01:37 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:01:38 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:01:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:01:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:01:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:01:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:01:38 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:01:39 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:01:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:01:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:01:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:01:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:01:39 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:01:40 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:01:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:01:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:01:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:01:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:01:40 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:01:41 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:01:41 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:01:42 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:01:42 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:01:42 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:01:43 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:01:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:01:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:01:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:01:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:01:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:01:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:01:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:01:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:01:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:01:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:01:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:01:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:01:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:01:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:01:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:01:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:01:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:01:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:01:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:01:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:01:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:01:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:01:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:01:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:01:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:01:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:01:49 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:01:49 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:01:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:01:49 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:01:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:01:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:01:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:01:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:01:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:01:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:01:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:01:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:01:49 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:01:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:01:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:01:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:01:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:01:50 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:01:50 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:01:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:01:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:01:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:01:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:01:51 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:01:51 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:01:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:01:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:01:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:01:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:01:52 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:01:52 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:01:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:01:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:01:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:01:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:01:53 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:01:53 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:01:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:01:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:01:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:01:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:01:54 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:01:54 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:01:55 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:01:55 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:01:56 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:01:56 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:01:57 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:01:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:01:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:01:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:01:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:01:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:01:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:01:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:01:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:01:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:01:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:01:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:01:57 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:01:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1834 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:01:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1834 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1834 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1834 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1834 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1834 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1834 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:01:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1834 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:02:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:02:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:02:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:02:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:02:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:02:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:02:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:02:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:02:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:02:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:02:02 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:02:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:02:02 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:02:02 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:02:03 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:02:03 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:02:03 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:02:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:02:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:02:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:02:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:02:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:02:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:02:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:02:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:02:03 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:02:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:02:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:02:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:02:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:02:03 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:02:04 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:02:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:02:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:02:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:02:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:02:04 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:02:05 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:02:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:02:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:02:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:02:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:02:05 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:02:06 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:02:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:02:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:02:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:02:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:02:06 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:02:07 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:02:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:02:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:02:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:02:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:02:07 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:02:08 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:02:08 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:02:09 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:02:09 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:02:10 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:02:10 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:02:11 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:02:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:02:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:02:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:02:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:02:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:02:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:02:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:02:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:02:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:02:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:02:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1846 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:02:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:02:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:02:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1846 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1846 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1846 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1846 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1846 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1846 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:02:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:02:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:02:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:02:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:02:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:02:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:02:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:02:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:02:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:02:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:02:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:02:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:02:16 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:02:16 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:02:16 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:02:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:02:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:02:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:02:17 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:02:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:02:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:02:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:02:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:02:17 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:02:17 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:02:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:02:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:02:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:02:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:02:18 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:02:18 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:02:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:02:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:02:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:02:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:02:19 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:02:19 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:02:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:02:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:02:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:02:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:02:20 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:02:20 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:02:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:02:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:02:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:02:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:02:21 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:02:21 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:02:22 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:02:22 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:02:23 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:02:23 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:02:24 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:02:24 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:02:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:02:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:02:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:02:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:02:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:02:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:02:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:02:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:02:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:02:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:02:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1844 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:02:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:02:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:02:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1844 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1844 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1844 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:02:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:02:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:02:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:02:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:02:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:02:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:02:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:02:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:02:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:02:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:02:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:02:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:02:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:02:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:02:30 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:02:30 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:02:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:02:30 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:02:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:02:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:02:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:02:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:02:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:02:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:02:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:02:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:02:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:02:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:02:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:02:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:02:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:02:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:02:31 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:02:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:02:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:02:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:02:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:02:32 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:02:32 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:02:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:02:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:02:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:02:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:02:32 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:02:33 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:02:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:02:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:02:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:02:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:02:33 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:02:34 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:02:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:02:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:02:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:02:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:02:34 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:02:35 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:02:35 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:02:36 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:02:36 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:02:37 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:02:37 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:02:38 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:02:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:02:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:02:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:02:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:02:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:02:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:02:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:02:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:02:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:02:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:02:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:02:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:02:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:02:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1840 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1840 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1840 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1840 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1840 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1840 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:02:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:02:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:02:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:02:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:02:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:02:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:02:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:02:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:02:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:02:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:02:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:02:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:02:43 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:02:43 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:02:43 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:02:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:02:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:02:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:02:44 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:02:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:02:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:02:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:02:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:02:44 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:02:45 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:02:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:02:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:02:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:02:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:02:45 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:02:46 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:02:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:02:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:02:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:02:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:02:46 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:02:46 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:02:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:02:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:02:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:02:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:02:47 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:02:47 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:02:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:02:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:02:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:02:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:02:48 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:02:48 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:02:49 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:02:49 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:02:50 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:02:50 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:02:51 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:02:51 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:02:52 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:02:52 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:02:53 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:02:53 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:02:53 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:02:54 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:02:54 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:02:55 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:02:55 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:02:56 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:02:56 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:02:57 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:02:57 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:02:58 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:02:58 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:02:59 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 13:02:59 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 13:02:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:02:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:02:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:02:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:02:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:02:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:02:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:02:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:02:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:02:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:02:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3607 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:02:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:02:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:02:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3607 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3607 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3607 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3607 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3607 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3607 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3607 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3608 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3608 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3608 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3608 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3608 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3608 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3608 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:02:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3608 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:03:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:03:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:03:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:03:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:03:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:03:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:03:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:03:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:03:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:03:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:03:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:03:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:03:05 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:03:05 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:03:05 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:03:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:03:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:03:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:03:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:03:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:03:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:03:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:03:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:03:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:03:05 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:03:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:03:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:03:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:03:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:03:06 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:03:06 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:03:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:03:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:03:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:03:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:03:07 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:03:07 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:03:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:03:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:03:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:03:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:03:08 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:03:08 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:03:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:03:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:03:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:03:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:03:09 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:03:09 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:03:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:03:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:03:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:03:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:03:09 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:03:10 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:03:10 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:03:11 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:03:11 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:03:12 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:03:12 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:03:13 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:03:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:03:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:03:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:03:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:03:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:03:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:03:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:03:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:03:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:03:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:03:13 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:03:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:03:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:03:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:03:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:03:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:03:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:03:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:03:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:03:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:03:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:03:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:03:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:03:18 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:03:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:03:18 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:03:18 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:03:18 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:03:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:03:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:03:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:03:19 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:03:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:03:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:03:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:03:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:03:19 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:03:20 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:03:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:03:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:03:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:03:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:03:20 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:03:21 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:03:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:03:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:03:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:03:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:03:21 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:03:22 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:03:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:03:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:03:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:03:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:03:22 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:03:23 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:03:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:03:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:03:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:03:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:03:23 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:03:24 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:03:24 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:03:24 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:03:25 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:03:25 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:03:26 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:03:26 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:03:27 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:03:27 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:03:28 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:03:28 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:03:29 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:03:29 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:03:30 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:03:30 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:03:31 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:03:31 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:03:32 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:03:32 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:03:33 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:03:33 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:03:33 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:03:34 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 13:03:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:03:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:03:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:03:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:03:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:03:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:03:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:03:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:03:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:03:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:03:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:03:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:03:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:03:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3569 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3569 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3569 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3570 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3570 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3570 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3570 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3570 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3570 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3570 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3570 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3571 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3571 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3571 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3571 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3571 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3571 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3571 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3571 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:03:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:03:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:03:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:03:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:03:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:03:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:03:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:03:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:03:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:03:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:03:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:03:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:03:40 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:03:40 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:03:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:03:40 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:03:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:03:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:03:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:03:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:03:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:03:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:03:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:03:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:03:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:03:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:03:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:03:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:03:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:03:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:03:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:03:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:03:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:03:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:03:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:03:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:03:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:03:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:03:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:03:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:03:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:03:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:45 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:03:46 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:03:46 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:03:46 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:03:46 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:03:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:03:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:03:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:03:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:03:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:03:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:03:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:03:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:03:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:03:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:03:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:03:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:03:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:03:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:03:46 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:03:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:03:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:03:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:03:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:03:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:03:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:03:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:03:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:03:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:03:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:03:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:03:51 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:51 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:03:51 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:03:51 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:03:51 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:03:51 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:03:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:03:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:03:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:03:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:03:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:03:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:03:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:03:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:03:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:03:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:03:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:03:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:03:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:03:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:03:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:03:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:03:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:03:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:03:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:03:57 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:03:57 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:03:57 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:03:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:03:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:03:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:03:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:03:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:03:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:03:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:03:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:03:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:03:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:03:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:03:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:03:57 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:03:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:03:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:03:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:03:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:04:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:04:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:04:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:04:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:04:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:04:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:04:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:04:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:04:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:04:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:04:02 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:04:02 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:04:02 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:04:02 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:04:02 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:04:02 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:04:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:04:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:04:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:04:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:04:02 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:04:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:04:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:04:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:04:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:04:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:04:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:04:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:04:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:04:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:04:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:04:07 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:04:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:04:07 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:04:08 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:04:08 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:04:08 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:04:08 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:04:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:04:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:04:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:04:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:04:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:04:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:04:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:04:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:04:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:04:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:04:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:04:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:04:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:04:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:04:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:04:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:04:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:04:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:04:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:04:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:04:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:04:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:04:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:04:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:04:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:04:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:04:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:04:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:04:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:04:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:04:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:04:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:04:14 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:04:14 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:04:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:04:14 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:04:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:04:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:04:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:04:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:04:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:04:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:04:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:04:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:04:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:04:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:04:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:04:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:04:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:04:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:04:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:04:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:04:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:04:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:04:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:04:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:04:16 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:04:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:04:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:04:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:04:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:04:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:04:17 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:04:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:04:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:04:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:04:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:04:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:04:18 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:04:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:04:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:04:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:04:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:04:18 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:04:19 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:04:19 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:04:20 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:04:20 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:04:21 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:04:21 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:04:22 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:04:22 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:04:23 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:04:23 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:04:24 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:04:24 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:04:24 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:04:25 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:04:25 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:04:26 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:04:26 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:04:27 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:04:27 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:04:28 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:04:28 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:04:29 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:04:29 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 13:04:30 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 13:04:30 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 13:04:31 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 13:04:31 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 13:04:32 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 13:04:32 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 13:04:33 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 13:04:33 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 13:04:33 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 13:04:34 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 13:04:34 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 13:04:35 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 13:04:35 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 13:04:36 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 13:04:36 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 13:04:37 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 13:04:37 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 13:04:38 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 13:04:38 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 13:04:39 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 13:04:39 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 13:04:40 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 13:04:40 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 13:04:41 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 13:04:41 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 13:04:42 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 13:04:42 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 13:04:42 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 13:04:43 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-25 13:04:43 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-25 13:04:44 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-25 13:04:44 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-25 13:04:45 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-25 13:04:45 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-25 13:04:46 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-25 13:04:46 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-25 13:04:47 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-25 13:04:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:04:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:04:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:04:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:04:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:04:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:04:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:04:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:04:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:04:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:04:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:04:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:04:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:04:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:04:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:04:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:04:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:04:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:04:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:04:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:04:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:04:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:04:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:04:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:04:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:04:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:04:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:04:53 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:04:53 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:04:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:04:53 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:04:53 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:04:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:04:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:04:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:04:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:04:54 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:04:54 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:04:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:04:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:04:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:04:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:04:55 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:04:55 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:04:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:04:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:04:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:04:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:04:55 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:04:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:04:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:04:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:04:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:04:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:04:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:04:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:04:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:04:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:04:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:04:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:04:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:04:56 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=761 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:04:56 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=761 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:04:56 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=761 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:04:56 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=761 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:04:56 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=761 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:04:56 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=761 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:04:56 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=761 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:04:56 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=761 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:05:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:05:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:05:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:05:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:05:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:05:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:05:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:05:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:05:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:05:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:05:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:05:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:05:01 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:05:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:05:01 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:05:01 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:05:02 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:05:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:05:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:05:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:05:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:05:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:05:03 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:05:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:05:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:05:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:05:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:05:03 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:05:04 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:05:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:05:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:05:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:05:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:05:04 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:05:05 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:05:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:05:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:05:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:05:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:05:05 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:05:05 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:05:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:05:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:05:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:05:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:05:06 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:05:06 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:05:07 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:05:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:05:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:05:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:05:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:05:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:05:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:05:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:05:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:05:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:05:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:05:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1411 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:05:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:05:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1411 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:05:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1411 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:05:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1411 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:05:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1411 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:05:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1411 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:05:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1411 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:05:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1411 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:05:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:05:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:05:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:05:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:05:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:05:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:05:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:05:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:05:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:05:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:05:12 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:12 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:05:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:05:13 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:05:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:05:13 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:05:13 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:05:13 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:05:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:05:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:05:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:05:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:05:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:05:14 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:05:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:05:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:05:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:05:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:05:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:05:15 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:05:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:05:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:05:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:05:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:05:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:05:16 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:05:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:05:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:05:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:05:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:05:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:05:17 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:05:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:05:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:05:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:05:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:05:18 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:05:18 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:05:19 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:05:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:05:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:05:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:05:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:05:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:05:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:05:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:05:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:05:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:05:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:05:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:05:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1398 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:05:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1398 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:05:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1398 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:05:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1398 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:05:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1398 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:05:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1398 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:05:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1398 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:05:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1399 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:05:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1399 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:05:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1399 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:05:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1399 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:05:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1399 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:05:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1399 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:05:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1399 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:05:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1399 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:05:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:05:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:05:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:05:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:05:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:05:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:05:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:05:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:05:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:05:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:05:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:24 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:05:24 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:05:24 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:05:24 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:05:24 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:05:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:05:25 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:05:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:05:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:05:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:05:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:05:25 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:05:26 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:05:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:05:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:05:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:05:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:05:26 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:05:27 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:05:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:05:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:05:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:05:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:05:27 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:05:28 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:05:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:05:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:05:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:05:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:05:28 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:05:29 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:05:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:05:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:05:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:05:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:05:29 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:05:30 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:05:30 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:05:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:05:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:05:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:05:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:05:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:05:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:05:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:05:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:05:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:05:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:05:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:05:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:05:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:05:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:05:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:05:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:05:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:05:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:05:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:05:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:05:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:05:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:05:36 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:05:36 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:05:36 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:05:36 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:05:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:05:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:05:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:05:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:05:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:05:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:05:37 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:05:37 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:05:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:05:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:05:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:05:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:05:38 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:05:38 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:05:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:05:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:05:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:05:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:05:39 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:05:39 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:05:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:05:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:05:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:05:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:05:40 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:05:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:05:40 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:05:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:05:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:05:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:05:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:05:41 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:05:41 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:05:42 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:05:42 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:05:42 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:05:43 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:05:43 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:05:44 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:05:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:05:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:05:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:05:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:05:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:05:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:05:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:05:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:05:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:05:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:05:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:05:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:05:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:05:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:05:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:05:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:05:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:05:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:05:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:05:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:05:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:05:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:05:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:05:50 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:05:50 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:05:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:05:50 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:05:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:05:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:05:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:05:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:05:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:05:50 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:05:51 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:05:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:05:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:05:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:05:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:05:51 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:05:52 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:05:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:05:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:05:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:05:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:05:52 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:05:53 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:05:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:05:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:05:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:05:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:05:53 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:05:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:05:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:05:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:05:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:05:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:05:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:05:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:05:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:05:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:05:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:05:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:05:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:05:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:05:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:05:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:05:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:05:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:05:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:05:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:05:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:05:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:05:59 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:05:59 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:05:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:05:59 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:05:59 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:05:59 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:05:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:05:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:05:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:06:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:06:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:06:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:06:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:06:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:06:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:06:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:06:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:06:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:06:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:06:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:06:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:06:05 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:06:05 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:06:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:06:05 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:06:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:06:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:06:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:06:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:06:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:06:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:06:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:06:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:06:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:06:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:06:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:06:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:06:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:06:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:06:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:06:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:06:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:06:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:06:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:06:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:06:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:06:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:06:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:06:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:06:10 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:06:10 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:06:10 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:06:10 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:06:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:06:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:06:10 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:06:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:06:10 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:10 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=119 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:10 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:10 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:10 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:10 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:10 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:10 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:10 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:06:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:06:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:06:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:06:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:06:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:06:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:06:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:06:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:06:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:06:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:06:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:06:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:06:16 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:06:16 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:06:16 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:06:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:06:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:06:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:06:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:06:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:06:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:06:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:06:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:06:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:06:16 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:06:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:06:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:06:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:06:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:06:17 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:06:17 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:06:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:06:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:06:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:06:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:06:18 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:06:18 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:06:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:06:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:06:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:06:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:06:19 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:06:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:06:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:06:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:06:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:06:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:06:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:06:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:06:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:06:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:06:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:06:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:06:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:06:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:06:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:06:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:06:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:06:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:06:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:06:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=785 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=785 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=785 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=785 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=785 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=785 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:06:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:06:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:06:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:06:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:06:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:06:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:06:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:06:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:06:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:06:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:06:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:24 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:06:24 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:06:25 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:06:25 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:06:25 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:06:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:06:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:06:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:06:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:06:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:06:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:06:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:06:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:06:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:06:25 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:06:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:06:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:06:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:06:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:06:25 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:06:26 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:06:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:06:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:06:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:06:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:06:26 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:06:27 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:06:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:06:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:06:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:06:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:06:27 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:06:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:06:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:06:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:06:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:06:28 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:06:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:06:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:06:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:06:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:06:28 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:06:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:06:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:06:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:06:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:06:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:06:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:06:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:06:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:06:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:06:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:06:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:06:28 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=925 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:06:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:06:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:06:28 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=925 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:28 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=925 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:28 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=925 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:28 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=925 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:28 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=925 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:28 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=925 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:06:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:06:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:06:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:06:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:06:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:06:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:06:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:06:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:06:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:06:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:06:33 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:33 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:34 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:06:34 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:06:34 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:06:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:06:34 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:06:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:06:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:06:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:06:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:06:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:06:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:06:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:06:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:06:34 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:06:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:06:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:06:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:06:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:06:35 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:06:35 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:06:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:06:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:06:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:06:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:06:36 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:06:36 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:06:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:06:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:06:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:06:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:06:37 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:06:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:06:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:06:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:06:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:06:37 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:06:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:06:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:06:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:06:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:06:38 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:06:38 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:06:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:06:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:06:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:06:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:06:39 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:06:39 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:06:39 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:06:40 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:06:40 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:06:41 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:06:41 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:06:42 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:06:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:06:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:06:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:06:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:06:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:06:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:06:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:06:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:06:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:06:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:06:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:06:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:06:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:06:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:06:42 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1849 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:42 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1849 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:42 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1849 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:42 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1849 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:42 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1849 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:42 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1849 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:06:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:06:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:06:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:06:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:06:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:06:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:06:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:06:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:06:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:06:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:06:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:06:47 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:06:47 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:06:47 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:06:47 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:06:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:06:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:06:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:06:48 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:06:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:06:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:06:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:06:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:06:48 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:06:49 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:06:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:06:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:06:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:06:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:06:49 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:06:50 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:06:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:06:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:06:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:06:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:06:50 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:06:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:06:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:06:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:06:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:06:51 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:06:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:06:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:06:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:06:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:06:51 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:06:52 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:06:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:06:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:06:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:06:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:06:52 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:06:53 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:06:53 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:06:54 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:06:54 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:06:55 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:06:55 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:06:55 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:06:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:06:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:06:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:06:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:06:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:06:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:06:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:06:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:06:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:06:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:06:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:06:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:06:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:06:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:06:56 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1851 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:56 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1851 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:56 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1851 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:56 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1851 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:56 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1851 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:06:56 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1851 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:07:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:07:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:07:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:07:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:07:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:07:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:07:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:07:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:07:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:07:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:07:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:07:01 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:07:01 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:07:01 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:07:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:07:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:07:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:07:02 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:07:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:07:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:07:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:07:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:07:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:07:03 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:07:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:07:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:07:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:07:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:07:03 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:07:03 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:07:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:07:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:07:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:07:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:07:04 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:07:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:07:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:07:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:07:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:07:04 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:07:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:07:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:07:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:07:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:07:05 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:07:05 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:07:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:07:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:07:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:07:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:07:06 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:07:06 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:07:07 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:07:07 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:07:08 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:07:08 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:07:09 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:07:09 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:07:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:07:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:07:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:07:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:07:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:07:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:07:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:07:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:07:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:07:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:07:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:07:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:07:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:07:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:07:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1852 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1852 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1852 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1852 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1852 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1852 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1852 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1853 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1853 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1853 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1853 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1853 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1853 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1853 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1853 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:07:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:07:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:07:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:07:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:07:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:07:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:07:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:07:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:07:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:07:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:07:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:07:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:07:15 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:07:15 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:07:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:07:15 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:07:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:07:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:07:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:07:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:07:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:07:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:07:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:07:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:07:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:07:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:07:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:07:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:07:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:07:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:07:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:07:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:07:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:07:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:07:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:07:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:07:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:07:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:07:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:07:17 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:07:17 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:07:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:07:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:07:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:07:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:07:18 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:07:18 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:07:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:07:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:07:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:07:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:07:19 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:07:19 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:07:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:07:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:07:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:07:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:07:20 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:07:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:07:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:07:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:07:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:07:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:07:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:07:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:07:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:07:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:07:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:07:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:07:20 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:07:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:07:20 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1202 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:20 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1202 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:20 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1202 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:20 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1202 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:20 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1202 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:20 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1202 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:07:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:07:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:07:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:07:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:07:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:07:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:07:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:07:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:07:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:07:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:07:25 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:07:25 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:07:25 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:07:25 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:07:25 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:07:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:07:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:07:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:07:26 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:07:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:07:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:07:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:07:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:07:26 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:07:27 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:07:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:07:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:07:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:07:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:07:27 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:07:28 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:07:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:07:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:07:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:07:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:07:28 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:07:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:07:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:07:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:07:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:07:29 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:07:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:07:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:07:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:07:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:07:29 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:07:30 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:07:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:07:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:07:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:07:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:07:30 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:07:31 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:07:31 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:07:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:07:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:07:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:07:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:07:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:07:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:07:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:07:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:07:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:07:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:07:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:07:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:07:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:07:31 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:07:31 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1340 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:31 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1340 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:31 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1340 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:31 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1340 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:31 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1340 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:31 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1340 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:07:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:07:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:07:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:07:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:07:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:07:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:07:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:07:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:07:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:07:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:07:36 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:36 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:07:37 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:07:37 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:07:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:07:37 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:07:37 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:07:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:07:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:07:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:07:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:07:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:07:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:07:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:07:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:07:37 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:07:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:07:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:07:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:07:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:07:38 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:07:38 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:07:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:07:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:07:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:07:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:07:39 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:07:39 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:07:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:07:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:07:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:07:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:07:39 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:07:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:07:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:07:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:07:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:07:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:07:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:07:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:07:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:07:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:07:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:07:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:07:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:07:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:07:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:07:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:07:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:07:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:07:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:07:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:07:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:07:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:07:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:07:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:07:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:07:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:07:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:07:45 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:07:45 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:07:45 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:07:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:07:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:07:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:07:46 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:07:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:07:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:07:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:07:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:07:46 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:07:47 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:07:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:07:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:07:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:07:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:07:47 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:07:48 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:07:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:07:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:07:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:07:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:07:48 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:07:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:07:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:07:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:07:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:07:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:07:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:07:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:07:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:07:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:07:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:07:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:07:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:07:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:07:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:07:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=786 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=786 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=786 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=786 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=786 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=786 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:07:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:07:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:07:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:07:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:07:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:07:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:07:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:07:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:07:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:07:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:07:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:07:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:07:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:07:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:07:54 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:07:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:07:54 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:07:54 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:07:54 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:07:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:07:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:07:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:07:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:07:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:07:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:07:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:07:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:07:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:07:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:07:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:07:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:07:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:07:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:07:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:07:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:07:59 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:07:59 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:08:00 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:08:00 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:08:00 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:08:00 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:08:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:08:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:08:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:08:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:08:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:08:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:08:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:08:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:08:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:08:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:08:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:08:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:08:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:08:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:08:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:08:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:08:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:08:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:08:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:08:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:08:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:08:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:08:00 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:00 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:00 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:00 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:00 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:00 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:00 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=123 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:00 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:00 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:00 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:00 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:00 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:00 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:00 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:08:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:08:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:08:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:08:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:08:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:08:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:08:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:08:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:08:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:08:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:08:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:08:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:08:05 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:08:05 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:08:05 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:08:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:08:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:08:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:08:06 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:08:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:08:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:08:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:08:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:08:06 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:08:07 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:08:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:08:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:08:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:08:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:08:07 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:08:08 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:08:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:08:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:08:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:08:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:08:08 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:08:09 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:08:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:08:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:08:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:08:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:08:09 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:08:10 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:08:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:08:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:08:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:08:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:08:10 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:08:11 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:08:11 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:08:12 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:08:12 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:08:13 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:08:13 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:08:13 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:08:14 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:08:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:08:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:08:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:08:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:08:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:08:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:08:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:08:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:08:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:08:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:08:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:08:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:08:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:08:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2024 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2024 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2024 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2024 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2024 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2024 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2024 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:08:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:08:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:08:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:08:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:08:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:08:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:08:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:08:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:08:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:08:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:08:19 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:19 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:08:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:08:20 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:08:20 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:08:20 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:08:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:08:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:08:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:08:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:08:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:08:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:08:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:08:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:08:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:08:20 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:08:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:08:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:08:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:08:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:08:21 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:08:21 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:08:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:08:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:08:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:08:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:08:22 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:08:22 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:08:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:08:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:08:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:08:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:08:23 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:08:23 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:08:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:08:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:08:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:08:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:08:24 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:08:24 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:08:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:08:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:08:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:08:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:08:25 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:08:25 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:08:26 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:08:26 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:08:27 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:08:27 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:08:27 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:08:28 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:08:28 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:08:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:08:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:08:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:08:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:08:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:08:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:08:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:08:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:08:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:08:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:08:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:08:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:08:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:08:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:08:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:08:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:08:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:08:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:08:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:08:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:08:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:08:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:08:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:08:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:08:34 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:08:34 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:08:34 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:08:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:08:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:08:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:08:35 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:08:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:08:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:08:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:08:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:08:35 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:08:36 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:08:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:08:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:08:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:08:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:08:36 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:08:37 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:08:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:08:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:08:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:08:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:08:37 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:08:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:08:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:08:37 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:08:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:08:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:08:37 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:08:37 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:08:37 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:08:38 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:08:38 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:08:38 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:08:38 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:08:38 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:08:38 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:08:38 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:08:38 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:08:38 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:08:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:08:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:08:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:08:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:08:38 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:08:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:08:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:08:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:08:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:08:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:08:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:08:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:08:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:08:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:08:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:08:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:08:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=881 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:08:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:08:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:08:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=881 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=881 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:08:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:08:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:08:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:08:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:08:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:08:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:08:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:08:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:08:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:08:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:08:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:08:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:08:43 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:08:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:08:43 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:08:43 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:08:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:08:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:08:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:08:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:08:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:08:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:08:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:08:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:08:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:08:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:08:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:08:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=127 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:08:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:08:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:08:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:08:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:08:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:08:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:08:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:08:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:08:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:08:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:08:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:08:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:08:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:08:49 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:08:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:08:49 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:08:49 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:08:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:08:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:08:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:08:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:08:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:08:50 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:08:50 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:08:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:08:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:08:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:08:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:08:51 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:08:51 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:08:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:08:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:08:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:08:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:08:52 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:08:52 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:08:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:08:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:08:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:08:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:08:53 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:08:53 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:08:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:08:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:08:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:08:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:08:54 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:08:54 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:08:55 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:08:55 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:08:56 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:08:56 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:08:57 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:08:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:08:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:08:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:08:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:08:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:08:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:08:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:08:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:08:57 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:08:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1836 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:08:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:08:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:08:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1836 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1836 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1836 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1836 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1836 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1836 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1837 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1837 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1837 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1837 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1837 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1837 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1837 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:08:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1837 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:09:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:09:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:09:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:09:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:09:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:09:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:09:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:09:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:09:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:09:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:09:02 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:02 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:09:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:09:03 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:09:03 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:09:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:09:03 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:09:03 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:09:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:09:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:09:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:09:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:09:04 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:09:04 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:09:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:09:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:09:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:09:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:09:05 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:09:05 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:09:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:09:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:09:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:09:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:09:05 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:09:06 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:09:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:09:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:09:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:09:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:09:06 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:09:07 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:09:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:09:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:09:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:09:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:09:07 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:09:08 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:09:08 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:09:09 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:09:09 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:09:10 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:09:10 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:09:11 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:09:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:09:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:09:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:09:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:09:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:09:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:09:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:09:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:09:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:09:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1848 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:09:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:09:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:09:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:09:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1848 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:09:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1848 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:09:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1848 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:09:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1848 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:09:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:09:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:09:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:09:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:09:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:09:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:09:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:09:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:09:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:09:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:09:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:09:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:09:16 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:09:16 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:09:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:09:16 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:09:17 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:09:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:09:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:09:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:09:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:09:17 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:09:18 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:09:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:09:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:09:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:09:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:09:18 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:09:19 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:09:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:09:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:09:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:09:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:09:19 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:09:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:09:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:09:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:09:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:09:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:09:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:09:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:09:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:09:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:09:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:09:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:09:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:09:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=770 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:09:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=770 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:09:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=770 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:09:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=770 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:09:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=770 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:09:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=770 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:09:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:09:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:09:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:09:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:09:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:09:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:09:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:09:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:09:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:09:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:09:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:24 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:09:25 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:09:25 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:09:25 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:09:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:09:25 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:09:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:09:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:09:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:09:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:09:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:09:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:09:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:09:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:09:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:09:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:09:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:09:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:09:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:09:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:09:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:09:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:09:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:09:25 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:09:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:09:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:09:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:09:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:09:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:09:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:09:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:09:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:09:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:09:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:09:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:09:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:09:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:09:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:09:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:09:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:09:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:09:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:09:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:09:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:09:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:09:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:09:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:09:31 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:09:31 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:09:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:09:31 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:09:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:09:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:09:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:09:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:09:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:09:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:09:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:09:31 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:09:31 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:09:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:09:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:09:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:09:31 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:09:31 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:09:31 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:09:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:09:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:09:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:09:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:09:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:09:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:09:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:09:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:09:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:09:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:09:36 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:36 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:09:36 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:09:36 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:09:36 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:09:36 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:09:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:09:37 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:09:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:09:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:09:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:09:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:09:37 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:09:38 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:09:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:09:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:09:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:09:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:09:38 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:09:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:09:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:09:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:09:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:09:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:09:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:09:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:09:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:09:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:09:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:09:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:09:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:09:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:09:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:09:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:09:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:09:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:09:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:09:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:09:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:09:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:09:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:09:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:09:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:09:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:09:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:09:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:09:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:09:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:09:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:09:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:09:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:09:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:09:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:09:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:09:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:09:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:09:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:09:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:09:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:09:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:09:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:09:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:09:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:09:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:09:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:09:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:09:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:09:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:09:44 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:09:44 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:09:44 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:09:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:09:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:09:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:09:44 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:09:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:09:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:09:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:09:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:09:45 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:09:45 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:09:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:09:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:09:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:09:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:09:46 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:09:46 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:09:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:09:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:09:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:09:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:09:47 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:09:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:09:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:09:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:09:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:09:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:09:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:09:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:09:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:09:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:09:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:09:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:09:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:09:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:09:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:09:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:09:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:09:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:09:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:09:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:09:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:09:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:09:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:09:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:09:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:09:52 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:09:52 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:09:52 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:09:52 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:09:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:09:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:09:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:09:53 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:09:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:09:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:09:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:09:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:09:53 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:09:54 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:09:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:09:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:09:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:09:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:09:54 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:09:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:09:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:09:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:09:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:09:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:09:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:09:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:09:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:09:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:09:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:09:54 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=568 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:09:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:09:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:09:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:09:54 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=568 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:09:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=568 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:09:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=569 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:09:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=569 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:09:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=569 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:09:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=569 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:09:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=569 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:09:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=569 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:09:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=569 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:09:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=569 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:09:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:09:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:10:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:10:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:10:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:10:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:10:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:10:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:10:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:10:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:10:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:10:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:10:00 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:10:00 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:10:00 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:10:00 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:10:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:10:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:10:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:10:00 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:10:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:10:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:10:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:10:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:10:01 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:10:01 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:10:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:10:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:10:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:10:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:10:02 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:10:02 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:10:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:10:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:10:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:10:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:10:03 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:10:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:10:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:10:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:10:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:10:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:10:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:10:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:10:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:10:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:10:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:10:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:10:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:10:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:10:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:10:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:10:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:10:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:10:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:10:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:10:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:10:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:10:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:10:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:10:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:10:08 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:10:08 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:10:08 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:10:08 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:10:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:10:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:10:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:10:09 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:10:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:10:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:10:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:10:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:10:09 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:10:10 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:10:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:10:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:10:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:10:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:10:10 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:10:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:10:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:10:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:10:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:10:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:10:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:10:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:10:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:10:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:10:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:10:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:10:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:10:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:10:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:10:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:10:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:10:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:10:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:10:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:10:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:10:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:10:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:10:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:10:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:10:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:10:16 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:10:16 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:10:16 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:10:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:10:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:10:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:10:17 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:10:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:10:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:10:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:10:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:10:17 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:10:18 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:10:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:10:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:10:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:10:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:10:18 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:10:18 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:10:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:10:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:10:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:10:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:10:19 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:10:19 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:10:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:10:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:10:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:10:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:10:20 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:10:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:10:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:10:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:10:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:10:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:10:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:10:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:10:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:10:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:10:20 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:10:20 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=925 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:10:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:10:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:10:20 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=925 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:20 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=925 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:20 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=926 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:20 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=926 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:20 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=926 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:20 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=926 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:20 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=926 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:20 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=926 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:20 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=926 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:20 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=926 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:10:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:10:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:10:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:10:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:10:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:10:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:10:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:10:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:10:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:10:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:10:25 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:10:25 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:10:25 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:10:25 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:10:25 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:10:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:10:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:10:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:10:26 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:10:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:10:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:10:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:10:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:10:26 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:10:27 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:10:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:10:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:10:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:10:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:10:27 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:10:28 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:10:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:10:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:10:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:10:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:10:28 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:10:29 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:10:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:10:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:10:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:10:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:10:29 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:10:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:10:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:10:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:10:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:10:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:10:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:10:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:10:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:10:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:10:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:10:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:10:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:10:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:10:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:10:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:10:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:10:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:10:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:10:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:10:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:10:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:10:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:10:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:10:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:10:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:10:35 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:10:35 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:10:35 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:10:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:10:35 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:10:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:10:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:10:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:10:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:10:36 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:10:36 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:10:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:10:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:10:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:10:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:10:37 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:10:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:10:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:10:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:10:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:10:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:10:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:10:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:10:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:10:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:10:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:10:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:10:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=549 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=549 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=549 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=549 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=549 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=549 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=549 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:10:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:10:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:10:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:10:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:10:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:10:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:10:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:10:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:10:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:10:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:10:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:10:42 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:10:42 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:10:42 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:10:42 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:10:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:10:43 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:10:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:10:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:10:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:10:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:10:43 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:10:44 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:10:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:10:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:10:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:10:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:10:44 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:10:45 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:10:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:10:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:10:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:10:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:10:45 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:10:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:10:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:10:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:10:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:10:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:10:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:10:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:10:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:10:46 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:10:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=762 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:10:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:10:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:10:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=762 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=763 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=763 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=763 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=763 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=763 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=763 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=763 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=763 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:10:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:10:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:10:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:10:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:10:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:10:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:10:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:10:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:10:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:10:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:10:51 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:10:51 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:10:51 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:10:51 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:10:51 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:10:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:10:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:10:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:10:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:10:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:10:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:10:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:10:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:10:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:10:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:10:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:10:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:10:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:10:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:10:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:10:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:10:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:10:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:10:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:10:57 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:10:57 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:10:57 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:10:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:10:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:10:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:10:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:10:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:10:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:10:57 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:10:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:10:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:10:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:10:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:10:57 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:10:58 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:10:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:10:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:10:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:10:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:10:58 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:10:59 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:10:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:10:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:10:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:10:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:10:59 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:11:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:11:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:11:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:11:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:11:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:11:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:11:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:11:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:11:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:11:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:11:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:11:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:11:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:11:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:11:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:11:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:11:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:11:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:11:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:11:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:11:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:11:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:11:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:11:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:11:05 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:11:05 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:11:05 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:11:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:11:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:11:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:11:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:11:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:11:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:11:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:11:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:11:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:11:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:11:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:11:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:11:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:11:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:11:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:11:11 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:11:11 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:11:11 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:11:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:11:11 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:11:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:11:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:11:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:11:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:11:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:11:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:11:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:11:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:11:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:11:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:11:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:11:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:11:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:11:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:11:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:11:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:11:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:11:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:11:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:11:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:11:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:11:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:11:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:11:16 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:11:16 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:11:16 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:11:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:11:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:11:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:11:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:11:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:11:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:11:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:11:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:11:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:11:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:11:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:11:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:11:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:11:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:11:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:11:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:11:22 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:11:22 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:11:22 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:11:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:11:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:11:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:11:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:11:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:11:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:11:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:11:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:11:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:11:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:11:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:11:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:11:22 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=112 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:22 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=112 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:22 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=112 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:22 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=112 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:22 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=112 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:22 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=112 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:11:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:11:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:11:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:11:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:11:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:11:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:11:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:11:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:11:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:11:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:11:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:11:27 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:11:27 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:11:27 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:11:27 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:11:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:11:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:11:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=114 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:11:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=114 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=114 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=114 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=114 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=114 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=114 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=114 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:11:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:11:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:11:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:11:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:11:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:11:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:11:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:11:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:11:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:11:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:11:32 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:33 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:11:33 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:11:33 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:11:33 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:11:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:11:33 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:11:33 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:11:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:11:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:11:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:11:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:11:34 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:11:34 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:11:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:11:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:11:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:11:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:11:35 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:11:35 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:11:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:11:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:11:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:11:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:11:36 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:11:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:11:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:11:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:11:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:11:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:11:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:11:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:11:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:11:36 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:11:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:11:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:11:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:11:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:11:37 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:11:37 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:11:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:11:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:11:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:11:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:11:38 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:11:38 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:11:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:11:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:11:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:11:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:11:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:11:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:11:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:11:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:11:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:11:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:11:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:11:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1254 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:11:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:11:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1254 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1254 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1254 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1254 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1254 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1254 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1255 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1255 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1255 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1255 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1255 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1255 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1255 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1255 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:11:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:11:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:11:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:11:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:11:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:11:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:11:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:11:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:11:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:11:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:11:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:11:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:11:44 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:11:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:11:44 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:11:44 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:11:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:11:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:11:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:11:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:11:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:11:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:11:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:11:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:11:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:11:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:11:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:11:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:11:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:11:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:11:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:11:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:11:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:11:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:11:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:11:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:11:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:11:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:11:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:11:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:11:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:11:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:11:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:11:49 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:11:49 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:11:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:11:49 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:11:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:11:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:11:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:11:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:11:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:11:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:11:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:11:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:11:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:11:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:11:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:11:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:11:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:11:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:11:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:11:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:11:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:11:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:11:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:11:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:11:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:11:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:11:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:11:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:11:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:11:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:11:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:11:55 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:11:55 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:11:55 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:11:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:11:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:11:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:11:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:11:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=123 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:11:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:12:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:12:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:12:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:12:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:12:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:12:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:12:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:12:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:12:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:12:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:12:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:12:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:12:01 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:12:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:01 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:12:01 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:12:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:12:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:12:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:12:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:12:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:12:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:12:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:12:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:12:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:12:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:12:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:12:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:12:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:12:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:12:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:12:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:12:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:12:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:12:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:12:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:12:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:12:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:12:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:12:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:12:06 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:12:06 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:12:06 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:06 [DEBUG] fake_trx.py:376 (BTS@172.18.96.20:5700) Recv FAKE_TRXC_DELAY cmd
2024-10-25 13:12:06 [INFO] fake_trx.py:379 (BTS@172.18.96.20:5700) Artificial TRXC delay set to 200
2024-10-25 13:12:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD FAKE_TRXC_DELAY
2024-10-25 13:12:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:07 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:12:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:12:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:12:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:12:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:12:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:12:08 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:12:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:08 [DEBUG] fake_trx.py:376 (BTS@172.18.96.20:5700) Recv FAKE_TRXC_DELAY cmd
2024-10-25 13:12:08 [INFO] fake_trx.py:379 (BTS@172.18.96.20:5700) Artificial TRXC delay set to 0
2024-10-25 13:12:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD FAKE_TRXC_DELAY
2024-10-25 13:12:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:12:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:12:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:12:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:12:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:12:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:12:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:12:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:12:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:12:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:12:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:12:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:12:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:12:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:12:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=465 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=465 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=465 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=465 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=465 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=465 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=465 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:12:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:12:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:12:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:12:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:12:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:12:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:12:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:12:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:12:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:12:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:12:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:12:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:12:14 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:12:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:14 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:12:14 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:12:14 [DEBUG] fake_trx.py:376 (BTS@172.18.96.20:5700) Recv FAKE_TRXC_DELAY cmd
2024-10-25 13:12:14 [INFO] fake_trx.py:379 (BTS@172.18.96.20:5700) Artificial TRXC delay set to 200
2024-10-25 13:12:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD FAKE_TRXC_DELAY
2024-10-25 13:12:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:12:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:12:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:12:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:12:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:15 [DEBUG] fake_trx.py:376 (BTS@172.18.96.20:5700) Recv FAKE_TRXC_DELAY cmd
2024-10-25 13:12:15 [INFO] fake_trx.py:379 (BTS@172.18.96.20:5700) Artificial TRXC delay set to 0
2024-10-25 13:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD FAKE_TRXC_DELAY
2024-10-25 13:12:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:12:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:12:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:12:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:12:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:12:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:12:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:12:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:12:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:12:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:12:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=465 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:12:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:12:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:12:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=465 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=465 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=465 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:12:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:12:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:12:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:12:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:12:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:12:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:12:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:12:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:12:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:12:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:12:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:12:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:12:21 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:12:21 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:12:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:21 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:12:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:12:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:12:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:12:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:12:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:12:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:12:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:12:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:12:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:12:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:12:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:12:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:12:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:12:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:12:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:12:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:12:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:12:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:12:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:12:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:12:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:12:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:12:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:12:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:12:26 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:12:26 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:26 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:12:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:12:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:12:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=126 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:12:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:12:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=126 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=126 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=126 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=126 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=126 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=126 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=127 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=127 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=128 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=128 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=128 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=128 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=128 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=128 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=128 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=128 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:12:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:12:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:12:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:12:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:12:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:12:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:12:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:12:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:12:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:12:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:12:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:12:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:12:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:12:32 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:12:32 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:12:32 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:12:32 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:12:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:12:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:12:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:12:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:12:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:12:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:12:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:32 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:12:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:12:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:12:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:12:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:12:33 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:12:33 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:12:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:12:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:12:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:12:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:12:34 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:12:34 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:12:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:12:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:12:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:12:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:12:35 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:12:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:12:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:12:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:12:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:35 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:12:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:12:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:12:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:12:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:12:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:12:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:12:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:12:36 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:12:36 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:12:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:12:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:12:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:12:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:12:37 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:12:37 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:12:38 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:12:38 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:12:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:12:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:12:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:12:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:39 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:12:39 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:12:40 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:12:40 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:12:41 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:12:41 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:12:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:12:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:12:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:12:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:41 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:12:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:12:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:12:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:12:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:42 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:12:42 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:12:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:12:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:12:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:12:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:12:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:12:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:12:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:43 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:12:43 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:12:44 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:12:44 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:12:45 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:12:45 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:12:46 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:12:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:12:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:12:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:12:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:12:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:12:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:12:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:46 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:12:47 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:12:47 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:12:48 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 13:12:48 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 13:12:49 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 13:12:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:49 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 13:12:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:12:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:12:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:12:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:50 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 13:12:50 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 13:12:50 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 13:12:51 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 13:12:51 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 13:12:52 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 13:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:12:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:12:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:12:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:12:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:52 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 13:12:53 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 13:12:53 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 13:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:12:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:12:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:54 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 13:12:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:12:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:12:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:12:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:54 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 13:12:55 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 13:12:55 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 13:12:56 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 13:12:56 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 13:12:57 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 13:12:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:12:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:12:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:12:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:57 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 13:12:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:12:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:12:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:12:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:12:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:12:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:12:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:12:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:12:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:12:58 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 13:12:58 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 13:12:59 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 13:12:59 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 13:13:00 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 13:13:00 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 13:13:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:13:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:13:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:13:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:00 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 13:13:01 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 13:13:01 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-25 13:13:02 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-25 13:13:02 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-25 13:13:03 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-25 13:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:13:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:13:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:03 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-25 13:13:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:13:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:04 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-25 13:13:04 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:13:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:13:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:05 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-25 13:13:05 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-25 13:13:06 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-25 13:13:06 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-25 13:13:07 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-25 13:13:07 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-25 13:13:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:13:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:13:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:08 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-25 13:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:13:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:13:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:08 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-25 13:13:09 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-25 13:13:09 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-25 13:13:10 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-25 13:13:10 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-25 13:13:10 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-25 13:13:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:13:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:13:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:13:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:11 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-25 13:13:11 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-25 13:13:12 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-25 13:13:12 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-25 13:13:13 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-25 13:13:13 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-25 13:13:14 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-25 13:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:13:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:13:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:13:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:13:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:14 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-25 13:13:15 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-25 13:13:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:15 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-25 13:13:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:13:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:13:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:13:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:13:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:13:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:13:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:13:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:13:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=9388 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:13:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:13:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:13:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:13:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=9388 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:13:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=9388 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:13:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=9388 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:13:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=9388 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:13:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=9388 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:13:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:13:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:13:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:13:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:13:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:13:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:13:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:13:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:13:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:13:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:13:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:13:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:13:21 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:13:21 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:21 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:13:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:13:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:13:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:13:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:13:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:13:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:13:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:13:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:13:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:13:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:13:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:13:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:13:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:13:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:13:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:13:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:13:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:13:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:13:27 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:13:27 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:13:27 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:13:27 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:13:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:13:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:13:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:13:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:27 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:13:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:13:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:13:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:13:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:13:28 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:13:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:13:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:13:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:28 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:13:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:13:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:13:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:13:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:13:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:13:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:29 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:13:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:13:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:13:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:13:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=600 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:13:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=600 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:13:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=600 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:13:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=600 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:13:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=600 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:13:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=600 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:13:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=600 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:13:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:13:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:13:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:13:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:13:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:13:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:13:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:13:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:13:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:13:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:13:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:13:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:13:35 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:13:35 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:13:35 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:13:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:13:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:35 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:13:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:36 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:13:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:13:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:13:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:13:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:13:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:13:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:13:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:13:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:13:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:13:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:13:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:13:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:13:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:13:36 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:13:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:13:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:13:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:13:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:13:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:13:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:13:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:13:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:13:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:13:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:13:41 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:41 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:13:42 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:13:42 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:13:42 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:13:42 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:13:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:13:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:42 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:13:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:42 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:13:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:13:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:13:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:13:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:13:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:13:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:13:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:13:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:13:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:13:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:13:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:13:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=395 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:13:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:13:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:13:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:13:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=395 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:13:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=395 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:13:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=395 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:13:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=395 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:13:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=395 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:13:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=395 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:13:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=395 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:13:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=396 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:13:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=396 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:13:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=396 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:13:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=396 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:13:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=396 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:13:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=396 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:13:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=396 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:13:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=396 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:13:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:13:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:13:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:13:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:13:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:13:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:13:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:13:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:13:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:13:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:13:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:13:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:13:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:13:48 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:13:48 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:48 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:13:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:13:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:13:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:49 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:13:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:13:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:13:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:13:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:13:49 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:13:50 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:13:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:13:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:13:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:13:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:13:50 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:13:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:13:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:13:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:13:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:51 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:13:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:13:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:13:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:13:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:13:51 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:13:52 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:13:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:13:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:13:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:13:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:13:52 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:13:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:13:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:13:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:13:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:53 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:13:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:13:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:13:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:13:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:13:53 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:13:54 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:13:54 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:13:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:13:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:13:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:13:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:13:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:13:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:55 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:13:55 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:13:56 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:13:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:13:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:13:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:13:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:13:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:13:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:13:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:13:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:13:56 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:13:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:13:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:13:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:13:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:13:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:13:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:13:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:14:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:14:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:14:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:14:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:14:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:14:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:14:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:14:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:14:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:14:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:14:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:14:02 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:14:02 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:14:02 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:14:02 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:02 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:14:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:14:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:14:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:14:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:14:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:14:03 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:14:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:14:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:14:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:14:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:14:03 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:14:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:04 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:14:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:14:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:14:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:14:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:14:04 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:14:05 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:14:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:14:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:14:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:14:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:14:05 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:14:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:06 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:14:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:14:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:14:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:14:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:14:06 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:14:07 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:14:07 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:14:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:08 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:14:08 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:14:09 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:14:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:09 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:14:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:14:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:14:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:14:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:14:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:14:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:14:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:14:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:14:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1739 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:14:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:14:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:14:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:14:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1739 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:14:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1739 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:14:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:14:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:14:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:14:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:14:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:14:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:14:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:14:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:14:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:14:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:14:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:14:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:14:15 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:14:15 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:14:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:15 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:14:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:14:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:14:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:14:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:14:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:14:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:14:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:14:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:14:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:14:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:14:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:14:17 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:14:17 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:14:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:14:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:14:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:14:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:14:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:17 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:14:18 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:14:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:14:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:14:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:14:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:14:18 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:14:19 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:14:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:14:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:14:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:14:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:14:19 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:14:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:20 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:14:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:20 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:14:21 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:14:21 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:14:22 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:14:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:22 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:14:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:23 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:14:23 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:14:24 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:14:24 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:14:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:25 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:14:25 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:14:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:26 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:14:26 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:14:27 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:14:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:27 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:14:27 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:14:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:28 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:14:28 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:14:29 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:14:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:29 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:14:30 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:14:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:30 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 13:14:31 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 13:14:31 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 13:14:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:32 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 13:14:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:32 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 13:14:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:33 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 13:14:33 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 13:14:34 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 13:14:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:14:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:14:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:14:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:14:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:14:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:14:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:14:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:14:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:14:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:14:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:14:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:14:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:14:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:14:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:14:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:14:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:14:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:14:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:14:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:14:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:14:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:14:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:14:40 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:14:40 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:40 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:40 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:41 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:41 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:14:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:14:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:14:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:14:41 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=431 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:14:41 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=431 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:14:41 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=431 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:14:41 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=431 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:14:41 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=431 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:14:41 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=431 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:14:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:14:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:14:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:14:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:14:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:14:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:14:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:14:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:14:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:14:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:14:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:14:47 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:14:47 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:14:47 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:14:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:47 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:14:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:47 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:14:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:14:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:14:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:14:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:14:48 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:14:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:48 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:14:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:14:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:14:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:14:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:14:49 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:49 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:49 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:14:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:50 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:14:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:14:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:14:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:14:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:14:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:50 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:14:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:14:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:14:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:14:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:14:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:14:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:14:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:14:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:14:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:14:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:14:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:14:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1008 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:14:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1008 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:14:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1008 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:14:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1008 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:14:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1008 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:14:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1008 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:14:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1009 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:14:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1009 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:14:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1009 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:14:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1009 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:14:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1009 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:14:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1009 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:14:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1009 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:14:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1009 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:14:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:14:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:14:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:14:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:14:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:14:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:14:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:14:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:14:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:14:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:14:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:14:56 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:14:56 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:14:56 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:56 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:57 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:57 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:14:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:14:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:14:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:14:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:14:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:14:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:14:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:14:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:14:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:14:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:14:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:14:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:14:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:14:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:14:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:14:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=395 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:14:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:14:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:14:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:14:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=395 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:14:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=396 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:14:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=396 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:14:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=396 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:14:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=396 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:14:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=396 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:14:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=396 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:14:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=396 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:14:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=396 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:15:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:15:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:15:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:15:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:15:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:15:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:15:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:15:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:15:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:15:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:15:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:15:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:15:03 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:15:03 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:03 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:15:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:15:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:15:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:15:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:15:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:15:04 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:15:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:15:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:15:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:15:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:05 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:15:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:15:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:15:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:15:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:15:05 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:15:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:15:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:15:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:15:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:06 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:15:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:15:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:15:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:15:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:15:06 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:15:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:15:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:15:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:15:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:07 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:15:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:15:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:15:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:15:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:15:07 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:15:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:15:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:15:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:15:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:07 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:15:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:15:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:15:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:15:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:15:08 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:15:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:15:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:15:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:15:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:08 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:15:09 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:15:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:15:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:15:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:15:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:09 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:15:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:10 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:15:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:15:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:15:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:15:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:10 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:15:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:11 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:15:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:15:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:15:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:15:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:15:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:15:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:15:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:15:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:15:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:15:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:15:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:15:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1739 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:15:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1739 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:15:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1739 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:15:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1739 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:15:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1739 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:15:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1739 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:15:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1739 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:15:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:15:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:15:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:15:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:15:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:15:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:15:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:15:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:15:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:15:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:15:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:15:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:15:16 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:15:16 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:15:16 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:15:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:15:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:17 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:15:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:15:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:17 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:15:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:15:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:15:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:15:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:15:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:15:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:15:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:15:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:15:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:15:18 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:15:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:15:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:15:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:15:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:15:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:15:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=345 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:15:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=345 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:15:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=345 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:15:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=345 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:15:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=345 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:15:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=345 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:15:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=345 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:15:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=345 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:15:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:15:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:15:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:15:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:15:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:15:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:15:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:15:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:15:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:15:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:15:23 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:15:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:15:23 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:15:23 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:15:23 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:15:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:15:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:15:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:23 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:15:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:15:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:15:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:15:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:15:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:15:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:15:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:15:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:24 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:15:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:15:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:15:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:15:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:15:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:15:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:15:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:15:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:15:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:15:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:15:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:15:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=344 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:15:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=344 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:15:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=344 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:15:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=344 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:15:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=344 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:15:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=344 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:15:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:15:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:15:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:15:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:15:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:15:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:15:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:15:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:15:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:15:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:15:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:15:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:15:30 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:15:30 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:15:30 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:15:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:15:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:15:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:15:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:15:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:15:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:15:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:15:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:15:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:15:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:15:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:15:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:15:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:15:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:15:31 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:15:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:15:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:15:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:15:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:15:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:15:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:15:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:15:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:15:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:15:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:15:36 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:15:36 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:15:36 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:15:36 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:15:36 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:15:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:15:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:15:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:37 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:15:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:37 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:15:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:15:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:15:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:15:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:15:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:15:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:15:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:15:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:15:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:15:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:15:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:15:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:15:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:15:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:42 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:15:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:15:43 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:15:43 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:15:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:43 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:15:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:15:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:15:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:15:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:15:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:15:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:15:43 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:15:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:15:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:15:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:15:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:15:44 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:15:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:15:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:15:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:15:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:44 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:15:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:15:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:15:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:15:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:15:45 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:15:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:15:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:15:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:15:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:45 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:15:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:15:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:15:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:15:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:15:46 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:15:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:15:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:15:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:15:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:15:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:15:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:15:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:15:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:15:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:15:46 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:15:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:15:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:15:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:15:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:15:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:15:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:15:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:15:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:15:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:15:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:15:51 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:51 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:15:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:15:52 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:15:52 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:15:52 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:15:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:52 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:15:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:15:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:15:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:15:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:15:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:15:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:15:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:52 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:15:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:15:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:15:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:15:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:15:53 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:15:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:15:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:15:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:15:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:53 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:15:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:15:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:15:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:15:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:15:54 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:15:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:15:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:15:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:15:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:15:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:15:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:54 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:15:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:15:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:15:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:15:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:15:55 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:15:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:15:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:15:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:15:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:15:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:15:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:15:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:15:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:15:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:15:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:15:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:15:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:15:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:15:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:15:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:16:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:16:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:16:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:16:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:16:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:16:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:16:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:16:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:16:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:16:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:16:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:16:00 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:16:00 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:16:00 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:00 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:16:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:16:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:16:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:16:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:01 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:16:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:16:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:16:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:16:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:16:01 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:16:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:16:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:16:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:16:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:16:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:16:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:16:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:16:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:16:02 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:16:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:16:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:16:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:16:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:03 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:16:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:16:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:16:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:16:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:16:03 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:16:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:16:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:16:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:16:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:16:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:16:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:16:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:16:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:16:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:16:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:16:04 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:16:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:16:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:16:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:16:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:16:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:16:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:16:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:16:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:16:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:16:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:16:09 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:16:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:16:09 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:09 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:16:09 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:16:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:16:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:16:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:10 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:16:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:16:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:16:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:16:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:16:10 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:16:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:16:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:16:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:11 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:16:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:16:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:16:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:16:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:16:11 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:16:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:16:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:16:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:16:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:11 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:16:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:16:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:16:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:16:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:16:12 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:16:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:16:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:16:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:16:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:16:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:16:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:16:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:16:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:16:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:16:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:16:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:16:12 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=788 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:16:12 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=788 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:16:12 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=788 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:16:12 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=788 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:16:12 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=788 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:16:12 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=788 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:16:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:16:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:16:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:16:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:16:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:16:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:16:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:16:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:16:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:16:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:16:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:16:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:16:18 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:16:18 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:16:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:18 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:16:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:16:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:16:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:16:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:16:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:16:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:16:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:16:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:16:18 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:16:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:16:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:16:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:16:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:16:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:16:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:16:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:16:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:16:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:16:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:16:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:16:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:16:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:16:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:16:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:16:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:16:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:16:23 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:23 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:16:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:16:23 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:16:23 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:16:23 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:16:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:16:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:16:23 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:16:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:16:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:16:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:16:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:16:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:16:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:16:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:16:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:16:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:16:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:16:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:16:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:16:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:16:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:16:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:16:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:16:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:16:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:16:28 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:28 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:16:29 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:16:29 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:16:29 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:29 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:16:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:16:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:16:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:16:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:16:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:16:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:16:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:16:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:16:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:16:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:16:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:16:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:16:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:16:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:16:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:16:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:16:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:16:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:16:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:16:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:16:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:16:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:16:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:16:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:16:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:16:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:16:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:16:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:16:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:16:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:16:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:16:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:16:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:16:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:16:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:16:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:16:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:16:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:16:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:16:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:16:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:16:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:16:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:16:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:16:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:16:40 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:16:40 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:40 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:16:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:16:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:16:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:16:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:40 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:16:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:16:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:16:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:16:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:16:41 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:16:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:16:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:16:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:16:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:41 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:16:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:16:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:16:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:16:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:16:41 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:16:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:16:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:16:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:16:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:42 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:16:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:16:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:16:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:16:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:16:42 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:16:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:16:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:16:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:16:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:43 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:16:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:16:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:16:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:16:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:16:43 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:16:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:16:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:16:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:16:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:44 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:16:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:16:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:16:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:16:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:16:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:16:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:16:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:16:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:44 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:16:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:16:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:16:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:16:45 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:16:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:45 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:16:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:16:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:16:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:16:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:46 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:16:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:46 [WARNING] transceiver.py:250 (MS@172.18.96.22:6700) RX TRXD message (fn=1498 tn=4 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:16:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:16:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:16:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:16:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:46 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:16:47 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:16:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:16:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:16:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:16:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:16:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:47 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:16:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:16:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:16:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:16:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:48 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:16:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:16:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:16:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:16:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:48 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:16:49 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:16:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:16:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:16:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:16:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:49 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:16:50 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:16:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:16:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:16:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:16:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:50 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:16:51 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:16:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:16:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:16:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:16:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:51 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:16:51 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:16:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:16:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:16:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:16:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:52 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:16:52 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:16:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:16:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:16:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:16:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:53 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:16:53 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:16:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:16:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:16:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:16:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:54 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:16:54 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:16:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:16:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:16:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:16:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:55 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:16:55 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 13:16:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:16:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:16:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:16:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:16:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:16:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:56 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 13:16:56 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 13:16:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:16:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:16:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:16:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:16:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:16:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:16:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:16:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:16:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:16:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:16:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:16:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:16:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:16:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:16:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:17:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:17:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:17:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:17:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:17:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:17:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:17:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:17:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:17:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:17:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:17:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:17:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:17:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:17:02 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:17:02 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:17:02 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:17:02 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:17:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:17:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:17:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:17:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:17:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:17:02 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:17:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:17:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:17:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:17:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:17:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:17:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:17:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:17:03 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:17:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:17:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:17:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:17:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:17:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:17:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:17:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:17:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:17:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:17:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:17:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:17:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:17:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:17:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:17:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:17:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:17:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:17:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:17:09 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:17:09 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:17:10 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:17:10 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:17:11 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:17:11 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:17:12 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:17:12 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:17:13 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:17:13 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:17:14 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:17:14 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:17:15 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:17:15 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:17:16 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:17:16 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:17:17 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:17:17 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:17:18 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:17:18 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:17:19 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:17:19 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:17:20 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:17:20 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:17:20 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:17:21 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:17:21 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:17:22 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:17:22 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:17:23 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:17:23 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:17:24 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:17:24 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 13:17:25 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 13:17:25 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 13:17:26 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 13:17:26 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 13:17:27 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 13:17:27 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 13:17:28 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 13:17:28 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 13:17:29 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 13:17:29 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 13:17:30 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 13:17:30 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 13:17:30 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 13:17:31 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 13:17:31 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 13:17:32 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 13:17:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:17:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:17:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:17:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:17:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:17:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:17:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:17:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5140 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:17:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5140 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:17:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5140 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:17:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5140 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:17:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5140 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:17:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5140 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:17:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5140 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:17:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5141 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:17:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5141 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:17:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5141 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:17:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5141 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:17:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5141 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:17:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5141 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:17:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5141 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:17:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5141 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:17:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:17:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:17:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:17:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:17:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:17:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:17:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:17:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:17:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:17:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:17:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:17:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:17:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:17:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:17:38 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:17:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:17:39 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:17:39 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:17:40 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:17:40 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:17:41 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:17:41 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:17:42 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:17:42 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:17:43 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:17:43 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:17:44 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:17:44 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:17:45 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:17:45 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:17:46 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:17:46 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:17:47 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:17:47 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:17:48 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:17:48 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:17:49 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:17:49 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:17:49 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:17:50 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:17:50 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:17:51 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:17:51 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:17:52 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:17:52 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:17:53 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:17:53 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 13:17:54 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 13:17:54 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 13:17:55 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 13:17:55 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 13:17:56 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 13:17:56 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 13:17:57 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 13:17:57 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 13:17:58 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 13:17:58 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 13:17:59 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 13:17:59 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 13:17:59 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 13:18:00 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 13:18:00 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 13:18:01 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 13:18:01 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 13:18:02 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 13:18:02 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 13:18:03 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 13:18:03 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 13:18:04 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 13:18:04 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 13:18:05 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 13:18:05 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 13:18:06 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 13:18:06 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 13:18:07 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 13:18:07 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-25 13:18:08 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-25 13:18:08 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-25 13:18:09 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-25 13:18:09 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-25 13:18:09 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-25 13:18:10 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-25 13:18:10 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-25 13:18:11 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-25 13:18:11 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-25 13:18:12 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-25 13:18:12 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-25 13:18:13 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-25 13:18:13 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-25 13:18:14 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-25 13:18:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:18:14 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-25 13:18:15 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-25 13:18:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:18:15 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-25 13:18:16 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-25 13:18:16 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-25 13:18:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:18:17 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-25 13:18:17 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-25 13:18:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:18:18 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-25 13:18:18 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-25 13:18:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:18:19 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-25 13:18:19 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-25 13:18:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:18:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:18:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:18:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:18:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:18:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:18:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:18:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:18:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=9011 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:18:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=9011 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:18:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=9011 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:18:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=9011 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:18:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=9011 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:18:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:18:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:18:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:18:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:18:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:18:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:18:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:18:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:18:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:18:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:18:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:18:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:18:24 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:18:25 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:18:25 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:18:25 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:18:25 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:18:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:18:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:18:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:18:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:18:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:18:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:18:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:18:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:18:25 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:18:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:18:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:18:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:18:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:18:25 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:18:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:18:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:18:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:18:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:18:26 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:18:26 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:18:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:18:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:18:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:18:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:18:27 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:18:27 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:18:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:18:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:18:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:18:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:18:28 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:18:28 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:18:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:18:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:18:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:18:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:18:28 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:18:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:18:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:18:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:18:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:18:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:18:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:18:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:18:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:18:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:18:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:18:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:18:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:18:29 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:18:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:18:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:18:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:18:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:18:29 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:18:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:18:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:18:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:18:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:18:29 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:18:30 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:18:30 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:18:31 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:18:31 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:18:32 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:18:32 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:18:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:18:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:18:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:18:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:18:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:18:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:18:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:18:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:18:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:18:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:18:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:18:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:18:33 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:18:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:18:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:18:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:18:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:18:33 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:18:33 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:18:34 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:18:34 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:18:35 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:18:35 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:18:36 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:18:36 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:18:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:18:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:18:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:18:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:18:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:18:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:18:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:18:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:18:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:18:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:18:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:18:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:18:37 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:18:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:18:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:18:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:18:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:18:37 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:18:37 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:18:38 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:18:38 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:18:38 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:18:39 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:18:39 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:18:40 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:18:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:18:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:18:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:18:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:18:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:18:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:18:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:18:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:18:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:18:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:18:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:18:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:18:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:18:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:18:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:18:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3456 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:18:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3456 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:18:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3456 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:18:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3456 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:18:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3456 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:18:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3456 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:18:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3457 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:18:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3457 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:18:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3457 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:18:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3457 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:18:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3457 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:18:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3457 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:18:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3457 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:18:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3457 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:18:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:18:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:18:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:18:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:18:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:18:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:18:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:18:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:18:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:18:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:18:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:18:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:18:45 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:18:46 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:18:46 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:18:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:18:46 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:46 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:18:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:18:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:18:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:18:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:18:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:18:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:18:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:18:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:18:46 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:18:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:18:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:18:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:18:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:18:46 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:18:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:18:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:18:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:18:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:18:47 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:18:47 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:47 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:18:47 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:18:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:18:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:18:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:18:48 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:18:48 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:48 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:18:48 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:18:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:18:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:18:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:18:49 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:18:49 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:49 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:18:49 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:18:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:18:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:18:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:18:50 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:18:50 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:50 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:18:50 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:18:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:18:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:18:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:18:51 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:18:51 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:51 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:18:51 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:52 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:18:52 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:52 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:18:52 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:52 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:18:53 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:53 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:18:53 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:53 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:18:54 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:54 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:18:54 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:18:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:18:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:18:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:18:54 [WARNING] transceiver.py:250 (MS@172.18.96.22:6700) RX TRXD message (fn=1873 tn=3 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:18:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:18:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:18:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:18:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:18:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:18:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:18:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:18:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:18:54 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:18:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:18:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:18:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:18:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:18:54 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:18:55 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:55 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:18:55 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:55 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:18:56 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:56 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:18:56 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:56 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:18:57 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:57 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:18:57 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:57 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:18:58 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:58 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:18:58 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:58 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:18:59 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:18:59 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:18:59 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:18:59 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:00 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:19:00 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:00 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:19:00 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:01 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:19:01 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:01 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:19:01 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:01 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 13:19:02 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:02 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 13:19:02 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:19:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:19:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:19:02 [WARNING] transceiver.py:250 (MS@172.18.96.22:6700) RX TRXD message (fn=3589 tn=6 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:19:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:19:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:19:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:19:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:19:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:19:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:19:02 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:19:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:19:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:19:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:02 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:02 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 13:19:03 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:03 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 13:19:03 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:03 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 13:19:04 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:04 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 13:19:04 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:04 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 13:19:05 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:05 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 13:19:05 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:05 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 13:19:06 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:06 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 13:19:06 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:06 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 13:19:07 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:07 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 13:19:07 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:07 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 13:19:08 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:08 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 13:19:08 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:08 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 13:19:09 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:09 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 13:19:09 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:09 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 13:19:10 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:19:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:19:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:19:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:19:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:19:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:19:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:19:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:19:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:19:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:19:10 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 13:19:10 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:19:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:19:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:19:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:10 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:10 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 13:19:10 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:10 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 13:19:11 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:11 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 13:19:11 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:11 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 13:19:12 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:12 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 13:19:12 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:12 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 13:19:13 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:13 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 13:19:13 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:13 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 13:19:14 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:14 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 13:19:14 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:14 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 13:19:15 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:15 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 13:19:15 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:15 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-25 13:19:16 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:16 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-25 13:19:16 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:16 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-25 13:19:17 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:17 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-25 13:19:17 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:19:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:19:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:19:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:19:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:19:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:19:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:19:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:19:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:19:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:19:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:19:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:19:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:19:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:19:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6822 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6822 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6822 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6822 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6822 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6822 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6822 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:19:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:19:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:19:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:19:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:19:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:19:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:19:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:19:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:19:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:19:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:19:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:19:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:19:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:19:23 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:19:23 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:19:23 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:19:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:19:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:19:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:19:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:19:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:19:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:19:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:19:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:19:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:19:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:19:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:23 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:19:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:19:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:19:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:19:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:19:24 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:19:24 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:19:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:19:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:19:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:19:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:19:25 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:19:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:19:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:19:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:19:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:19:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:19:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:19:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:19:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:19:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:19:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:19:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:19:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:19:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:19:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:25 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:19:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:19:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:19:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:19:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:19:25 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:19:26 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:19:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:19:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:19:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:19:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:19:26 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:19:27 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:19:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:19:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:19:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:19:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:19:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:19:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:19:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:19:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:19:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:19:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:19:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:19:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:19:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:19:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:19:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:19:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:19:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:19:27 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:19:28 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:19:28 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:19:29 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:19:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:19:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:19:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:19:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:19:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:19:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:19:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:19:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:19:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:19:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:19:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:19:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:19:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:19:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:19:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1519 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1519 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1519 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1519 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1520 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1520 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1520 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1520 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1520 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1520 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1520 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1520 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:19:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:19:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:19:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:19:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:19:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:19:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:19:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:19:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:19:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:19:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:19:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:19:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:19:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:19:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:19:35 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:19:35 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:35 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:19:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:19:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:19:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:19:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:19:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:19:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:19:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:19:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:19:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:19:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:19:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:19:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:35 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:19:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:19:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:19:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:19:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:19:36 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:19:36 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:19:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:19:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:19:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:19:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:19:37 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:19:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:19:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:19:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:19:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:19:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:19:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:19:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:19:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:19:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:19:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:19:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:19:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:19:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:19:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:37 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:19:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:19:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:19:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:19:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:19:38 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:19:38 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:19:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:19:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:19:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:19:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:19:39 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:19:39 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:19:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:19:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:19:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:19:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:19:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:19:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:19:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:19:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:19:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:19:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:19:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:19:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:19:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:19:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:19:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1045 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1045 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1045 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1045 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1045 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1046 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1046 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1046 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1046 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1046 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1046 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1046 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1046 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:19:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:19:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:19:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:19:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:19:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:19:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:19:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:19:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:19:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:19:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:19:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:19:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:19:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:19:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:19:45 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:19:45 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:45 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:19:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:19:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:19:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:19:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:19:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:19:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:19:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:19:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:19:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:19:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:19:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:19:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:19:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:19:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:19:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:19:46 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:19:46 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:19:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:19:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:19:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:19:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:19:47 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:19:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:19:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:19:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:19:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:19:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:19:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:19:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:19:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:19:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:19:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:19:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:19:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:19:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:19:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:47 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:19:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:19:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:19:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:19:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:19:48 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:19:48 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:19:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:19:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:19:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:19:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:19:48 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:19:49 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:19:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:19:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:19:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:19:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:19:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:19:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:19:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:19:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:19:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:19:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:19:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:19:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:19:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:19:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:19:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:19:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:19:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:19:49 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:19:50 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:19:50 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:19:51 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:19:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:19:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:19:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:19:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:19:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:19:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:19:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:19:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:19:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:19:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:19:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:19:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:19:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:19:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:19:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:19:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:19:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:19:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:19:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:19:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:19:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:19:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:19:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:19:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:19:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:19:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:19:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:19:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:19:57 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:19:57 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:19:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:19:57 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:19:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:19:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:19:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:19:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:19:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:19:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:19:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:19:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:19:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:19:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:19:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:57 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:19:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:19:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:19:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:19:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:19:58 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:19:58 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:19:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:19:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:19:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:19:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:19:59 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:19:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:19:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:19:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:19:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:19:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:19:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:19:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:19:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:19:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:19:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:19:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:19:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:19:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:19:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:19:59 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:19:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:19:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:19:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:19:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:20:00 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:20:00 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:20:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:20:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:20:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:20:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:20:01 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:20:01 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:20:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:20:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:20:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:20:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:20:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:20:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:20:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:20:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:20:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:20:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:20:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:20:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:20:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:20:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:20:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:20:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:20:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:20:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:20:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:20:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:20:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:20:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:20:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:20:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:20:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:20:07 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:20:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:07 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:20:07 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:20:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:20:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:20:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:20:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:20:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:20:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:20:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:20:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:20:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:20:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:07 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:20:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:20:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:20:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:20:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:20:08 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:20:08 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:20:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:20:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:20:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:20:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:20:09 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:20:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:20:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:20:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:20:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:20:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:20:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:20:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:20:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:20:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:20:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:20:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:20:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:20:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:20:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=597 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=597 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=597 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=597 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=597 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=597 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=598 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=598 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=598 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=598 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=598 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=598 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=598 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=598 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:20:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:20:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:20:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:20:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:20:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:20:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:20:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:20:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:20:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:20:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:20:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:20:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:20:15 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:20:15 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:20:15 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:20:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:20:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:20:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:20:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:20:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:20:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:20:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:20:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:20:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:20:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:20:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:20:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:20:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:20:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:20:15 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:20:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:20:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:20:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:20:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:20:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:20:16 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:20:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:20:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:20:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:20:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:20:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:20:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:20:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:20:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:20:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:20:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:20:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:20:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:20:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:20:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=600 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=600 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=600 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=600 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=600 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=600 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=601 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=601 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=601 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=601 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=601 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=601 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=601 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=601 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:20:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:20:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:20:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:20:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:20:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:20:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:20:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:20:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:20:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:20:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:20:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:20:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:20:22 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:20:22 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:20:22 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:20:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:20:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:20:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:20:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:20:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:20:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:20:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:20:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:20:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:20:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:20:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:20:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:20:23 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:20:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:20:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:20:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:20:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:20:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:20:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:20:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:20:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:20:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:20:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:20:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:20:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:20:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:20:28 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:20:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:20:28 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:28 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:20:28 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:20:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:20:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:29 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:20:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:20:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:20:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:20:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:20:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:20:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:20:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:20:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:20:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:20:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:20:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:20:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:20:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:20:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:20:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:20:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:20:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:20:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:20:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:20:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:20:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:20:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:20:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:20:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:20:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:20:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:20:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:20:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:20:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:20:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:20:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:20:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:20:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:20:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:20:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:20:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:20:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:20:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:20:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:20:34 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:20:34 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:20:34 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:34 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:20:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:20:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:20:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:20:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:20:35 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:20:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:20:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:20:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:20:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:20:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:20:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:20:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:20:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:20:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:20:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:20:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:20:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:20:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:20:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:20:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:20:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:20:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:20:41 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:20:41 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:20:41 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:20:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:41 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:20:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:20:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:20:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:20:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:20:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:20:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:20:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:20:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:20:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:20:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:41 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:20:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:20:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:20:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:20:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:20:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:20:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:20:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:20:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:20:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:20:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:20:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:20:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:20:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:20:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:20:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:20:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:42 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:20:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:20:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:20:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:20:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:20:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:20:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:20:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:20:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:20:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:20:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:20:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:20:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:20:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:20:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:20:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:20:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:20:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:20:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:20:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:20:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:20:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:20:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:20:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:20:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:47 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:20:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:20:48 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:20:48 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:20:48 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:20:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:20:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:20:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:20:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:20:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:48 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:20:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:20:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:20:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:20:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=244 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:20:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:20:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=245 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=245 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=245 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=245 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=245 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=245 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=245 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=245 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:20:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:20:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:20:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:20:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:20:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:20:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:20:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:20:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:20:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:20:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:20:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:20:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:20:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:20:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:20:54 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:20:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:54 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:20:54 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:20:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:20:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:20:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:20:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:20:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:20:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:20:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:20:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:20:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:20:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:20:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:20:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:20:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:20:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:20:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:20:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:20:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:20:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:20:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:20:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:20:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:20:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:20:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:20:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:20:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:20:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:55 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:20:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:20:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:20:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:20:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:20:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:20:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:20:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:20:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:20:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:20:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:20:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:20:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:20:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:20:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:20:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:20:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=375 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=375 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=375 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=375 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=375 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=375 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=375 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:20:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=375 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:21:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:21:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:21:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:21:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:21:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:21:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:21:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:21:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:21:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:21:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:21:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:21:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:21:00 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:21:00 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:21:00 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:21:00 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:21:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:21:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:21:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:21:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:21:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:21:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:21:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:21:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:21:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:21:01 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:21:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:21:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:21:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:21:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:21:01 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:21:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:21:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:21:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:21:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:21:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:21:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:21:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:21:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:21:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:21:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:21:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:21:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:21:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:21:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:21:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:21:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:21:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:21:02 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:21:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD NOHANDOVER
2024-10-25 13:21:03 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:21:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD NOHANDOVER
2024-10-25 13:21:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:21:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:21:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:21:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:21:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:21:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:21:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:21:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:21:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:21:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:21:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:21:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:21:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:21:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:21:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:21:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:21:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:21:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:21:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:21:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:21:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:21:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:21:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:21:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:21:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:21:08 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:21:08 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:21:08 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:21:08 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:21:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:21:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:21:09 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:21:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:21:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:21:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:21:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:21:09 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:21:10 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:21:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:21:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:21:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:21:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:21:10 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:21:11 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:21:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:21:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:21:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:21:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:21:11 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:21:12 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:21:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:21:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:21:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:21:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:21:12 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:21:13 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:21:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:21:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:21:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:21:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:21:13 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:21:14 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:21:14 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:21:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:21:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:21:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:21:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:21:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:21:15 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:21:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD NOHANDOVER
2024-10-25 13:21:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:21:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:21:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:21:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:21:15 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:21:16 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:21:16 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:21:16 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:21:17 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:21:17 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:21:18 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:21:18 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:21:19 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:21:19 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:21:20 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:21:20 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:21:21 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:21:21 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:21:22 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:21:22 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:21:23 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:21:23 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:21:24 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:21:24 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 13:21:25 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 13:21:25 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 13:21:25 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 13:21:26 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 13:21:26 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 13:21:27 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 13:21:27 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 13:21:28 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 13:21:28 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 13:21:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD NOHANDOVER
2024-10-25 13:21:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:21:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:21:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:21:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:21:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:21:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:21:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:21:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:21:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:21:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:21:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:21:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:21:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:21:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:21:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4462 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:21:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4462 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:21:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4462 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:21:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4462 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:21:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4462 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:21:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4462 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:21:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:21:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:21:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:21:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:21:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:21:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:21:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:21:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:21:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:21:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:21:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:21:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:21:34 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:21:34 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:21:34 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:21:34 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:21:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:21:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:21:35 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:21:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:21:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:21:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:21:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:21:35 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:21:36 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:21:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:21:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:21:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:21:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:21:36 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:21:37 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:21:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:21:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:21:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:21:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:21:37 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:21:37 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:21:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:21:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:21:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:21:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:21:38 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:21:38 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:21:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:21:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:21:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:21:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:21:39 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:21:39 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:21:40 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:21:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:21:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:21:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:21:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:21:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:21:40 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:21:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD NOHANDOVER
2024-10-25 13:21:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:21:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:21:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:21:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:21:41 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:21:41 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:21:42 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:21:42 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:21:43 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:21:43 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:21:44 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:21:44 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:21:45 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:21:45 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:21:46 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:21:46 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:21:46 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:21:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD NOHANDOVER
2024-10-25 13:21:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:21:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:21:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:21:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:21:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:21:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:21:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:21:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:21:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:21:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:21:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:21:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:21:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:21:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:21:47 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2801 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:21:47 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2801 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:21:47 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2801 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:21:47 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2801 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:21:47 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2801 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:21:47 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2801 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:21:47 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2801 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:21:47 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2801 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:21:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:21:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:21:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:21:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:21:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:21:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:21:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:21:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:21:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:21:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:21:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:21:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:21:52 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:21:52 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:21:52 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:21:52 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:21:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:21:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:21:53 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:21:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:21:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:21:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:21:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:21:53 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:21:54 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:21:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:21:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:21:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:21:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:21:54 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:21:55 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:21:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:21:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:21:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:21:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:21:55 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:21:55 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:21:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:21:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:21:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:21:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:21:56 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:21:56 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:21:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:21:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:21:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:21:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:21:57 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:21:57 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:21:58 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:21:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:21:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:21:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:21:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:21:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:21:58 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:21:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD NOHANDOVER
2024-10-25 13:21:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:21:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:21:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:21:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:21:59 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:21:59 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:22:00 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:22:00 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:22:01 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:22:01 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:22:02 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:22:02 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:22:03 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:22:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD NOHANDOVER
2024-10-25 13:22:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:22:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:22:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:22:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:22:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:22:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:22:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:22:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:22:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:22:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:22:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:22:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:22:03 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2379 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:22:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:22:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:22:03 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2379 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:22:03 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2379 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:22:03 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2380 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:22:03 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2380 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:22:03 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2380 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:22:03 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2380 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:22:03 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2380 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:22:03 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2380 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:22:03 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2380 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:22:03 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2380 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:22:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:22:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:22:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:22:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:22:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:22:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:22:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:22:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:22:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:22:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:22:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:22:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:22:08 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:22:08 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:22:08 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:22:08 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:22:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:22:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:22:09 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:22:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:22:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:22:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:22:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:22:09 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:22:10 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:22:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:22:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:22:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:22:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:22:10 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:22:11 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:22:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:22:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:22:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:22:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:22:11 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:22:12 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:22:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:22:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:22:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:22:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:22:12 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:22:13 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:22:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:22:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:22:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:22:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:22:13 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:22:13 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:22:14 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:22:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:22:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:22:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:22:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:22:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:22:14 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:22:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD NOHANDOVER
2024-10-25 13:22:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:22:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:22:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:22:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:22:15 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:22:15 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:22:16 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:22:16 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:22:17 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:22:17 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:22:18 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:22:18 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:22:19 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:22:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD NOHANDOVER
2024-10-25 13:22:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:22:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:22:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:22:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:22:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:22:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:22:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:22:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:22:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:22:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:22:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:22:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:22:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:22:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:22:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:22:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:22:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:22:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:22:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:22:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:22:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:22:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:22:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:22:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:22:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:22:24 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:22:24 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:22:24 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:22:24 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:22:24 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:22:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:22:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:22:25 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:22:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:22:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:22:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:22:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:22:25 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:22:26 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:22:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:22:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:22:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:22:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:22:26 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:22:27 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:22:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:22:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:22:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:22:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:22:27 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:22:28 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:22:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:22:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:22:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:22:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:22:28 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:22:29 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:22:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:22:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:22:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:22:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:22:29 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:22:30 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:22:30 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:22:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:22:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:22:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:22:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:22:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:22:30 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:22:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD NOHANDOVER
2024-10-25 13:22:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:22:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:22:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:22:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:22:31 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:22:31 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:22:32 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:22:32 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:22:33 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:22:33 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:22:34 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:22:34 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:22:35 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:22:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD NOHANDOVER
2024-10-25 13:22:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:22:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:22:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:22:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:22:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:22:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:22:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:22:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:22:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:22:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:22:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:22:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:22:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:22:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:22:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2380 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:22:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2380 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:22:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2380 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:22:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2380 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:22:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2380 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:22:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2380 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:22:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2380 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:22:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2380 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:22:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:22:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:22:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:22:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:22:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:22:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:22:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:22:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:22:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:22:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:22:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:22:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:22:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:22:40 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:22:40 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:22:40 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:22:41 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:22:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:22:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:22:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:22:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:22:41 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:22:42 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:22:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:22:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:22:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:22:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:22:42 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:22:43 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:22:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:22:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:22:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:22:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:22:43 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:22:44 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:22:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:22:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:22:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:22:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:22:44 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:22:45 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:22:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:22:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:22:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:22:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:22:45 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:22:46 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:22:46 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:22:46 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:22:47 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:22:47 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:22:48 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:22:48 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:22:49 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:22:49 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:22:50 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:22:50 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:22:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:22:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:22:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:22:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:22:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:22:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:22:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:22:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:22:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:22:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:22:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:22:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:22:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:22:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:22:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:22:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:22:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:22:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:22:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:22:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:22:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:22:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:22:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:22:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:22:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:23:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:23:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:23:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:23:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:23:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:23:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:23:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:23:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:23:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:23:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:23:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:23:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:23:01 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:23:01 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:23:01 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:23:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:23:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:23:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:23:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:23:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:23:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:23:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:23:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:23:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:23:01 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:23:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:23:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:23:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:23:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:23:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:23:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:23:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:23:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:23:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:23:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:23:03 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:23:03 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:23:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:23:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:23:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:23:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:23:04 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:23:04 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:23:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:23:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:23:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:23:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:23:05 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:23:05 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:23:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:23:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:23:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:23:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:23:06 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:23:06 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:23:07 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:23:07 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:23:08 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:23:08 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:23:08 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:23:09 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:23:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:23:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:23:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:23:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:23:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:23:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:23:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:23:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:23:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:23:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:23:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:23:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:23:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:23:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:23:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:23:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:23:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:23:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:23:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:23:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:23:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:23:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:23:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:23:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:23:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:23:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:23:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:23:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:23:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:23:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:23:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:23:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:23:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:23:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:23:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:23:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:23:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:23:19 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:19 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:23:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:23:20 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:23:20 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:23:20 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:23:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:23:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:23:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:23:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:23:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:23:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:23:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:23:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:23:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:23:20 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:23:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:23:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:23:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:23:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:23:21 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:23:21 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:23:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:23:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:23:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:23:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:23:21 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:23:22 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:23:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:23:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:23:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:23:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:23:22 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:23:23 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:23:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:23:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:23:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:23:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:23:23 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:23:24 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:23:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:23:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:23:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:23:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:23:24 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:23:25 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:23:25 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:23:26 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:23:26 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:23:27 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:23:27 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:23:28 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:23:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:23:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:23:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:23:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:23:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:23:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:23:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:23:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:23:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:23:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:23:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:23:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:23:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:23:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:23:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:23:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:23:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:23:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:23:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:23:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:23:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:23:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:23:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:23:33 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:23:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:23:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:23:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:23:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:23:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:23:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:23:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:23:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:23:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:23:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:23:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:23:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:23:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:23:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:23:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:23:38 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:23:38 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:23:38 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:23:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:23:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:23:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:23:39 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:23:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:23:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:23:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:23:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:23:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:23:40 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:23:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:23:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:23:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:23:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:23:40 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:23:41 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:23:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:23:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:23:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:23:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:23:41 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:23:42 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:23:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:23:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:23:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:23:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:23:42 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:23:42 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:23:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:23:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:23:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:23:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:23:43 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:23:43 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:23:44 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:23:44 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:23:45 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:23:45 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:23:46 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:23:46 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:23:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:23:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:23:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:23:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:23:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:23:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:23:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:23:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:23:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:23:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:23:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:23:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:23:46 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:23:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1857 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:23:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1857 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:23:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1857 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:23:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1857 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:23:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1857 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:23:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1857 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:23:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1857 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:23:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1857 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:23:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:23:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:23:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:23:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:23:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:23:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:23:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:23:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:23:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:23:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:23:51 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:23:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:23:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:23:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:23:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:23:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:23:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:23:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:23:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:23:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:23:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:23:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:23:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:23:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:23:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:23:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:23:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:23:57 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:23:57 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:23:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:23:57 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:23:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:23:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:23:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:23:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:23:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:23:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:23:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:23:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:23:57 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:23:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:23:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:23:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:23:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:23:58 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:23:58 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:23:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:23:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:23:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:23:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:23:59 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:23:59 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:23:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:23:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:23:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:23:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:24:00 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:24:00 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:24:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:24:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:24:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:24:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:24:01 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:24:01 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:24:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:24:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:24:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:24:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:24:02 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:24:02 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:24:02 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:24:03 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:24:03 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:24:04 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:24:04 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:24:05 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:24:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:24:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:24:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:24:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:24:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:24:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:24:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:24:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:24:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:24:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:24:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:24:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:24:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:24:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1860 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:24:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1860 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:24:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1860 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:24:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1860 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:24:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1860 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:24:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1860 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:24:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:24:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:24:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:24:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:24:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:24:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:24:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:24:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:24:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:24:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:24:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:24:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:24:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:24:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:24:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:24:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:24:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:24:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:24:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:24:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:24:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:24:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:24:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:24:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:24:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:24:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:24:15 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:24:15 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:24:15 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:24:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:24:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:24:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:24:16 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:24:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:24:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:24:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:24:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:24:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:24:17 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:24:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:24:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:24:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:24:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:24:17 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:24:18 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:24:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:24:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:24:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:24:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:24:18 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:24:19 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:24:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:24:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:24:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:24:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:24:19 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:24:20 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:24:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:24:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:24:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:24:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:24:20 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:24:21 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:24:21 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:24:22 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:24:22 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:24:23 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:24:23 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:24:24 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:24:24 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:24:24 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:24:25 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:24:25 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:24:26 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:24:26 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:24:27 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:24:27 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:24:28 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:24:28 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:24:29 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:24:29 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:24:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:24:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:24:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:24:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:24:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:24:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:24:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:24:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:24:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:24:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:24:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:24:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:24:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:24:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:24:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:24:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:24:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:24:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:24:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:24:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:24:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:24:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:24:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:24:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:24:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:24:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:24:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:24:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:24:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:24:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:24:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:24:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:24:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:24:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:24:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:24:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:24:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:24:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:24:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:24:40 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:24:40 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:24:40 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:24:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:24:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:24:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:24:41 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:24:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:24:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:24:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:24:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:24:41 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:24:42 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:24:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:24:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:24:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:24:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:24:42 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:24:42 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:24:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:24:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:24:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:24:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:24:43 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:24:43 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:24:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:24:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:24:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:24:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:24:44 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:24:44 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:24:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:24:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:24:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:24:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:24:45 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:24:45 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:24:46 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:24:46 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:24:47 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:24:47 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:24:48 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:24:48 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:24:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:24:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:24:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:24:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:24:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:24:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:24:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:24:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:24:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:24:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:24:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:24:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:24:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:24:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:24:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:24:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:24:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:24:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:24:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:24:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:24:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:24:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:24:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:24:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:24:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:24:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:24:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:24:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:24:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:24:53 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:24:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:24:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:24:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:24:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:24:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:24:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:24:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:24:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:24:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:24:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:24:58 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:24:58 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:24:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:24:59 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:24:59 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:24:59 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:24:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:24:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:24:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:24:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:24:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:24:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:24:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:24:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:24:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:24:59 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:24:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:24:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:24:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:24:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:25:00 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:25:00 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:25:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:25:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:25:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:25:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:25:01 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:25:01 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:25:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:25:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:25:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:25:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:25:02 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:25:02 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:25:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:25:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:25:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:25:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:25:02 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:25:03 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:25:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:25:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:25:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:25:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:25:03 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:25:04 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:25:04 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:25:05 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:25:05 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:25:06 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:25:06 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:25:07 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:25:07 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:25:08 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:25:08 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:25:09 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:25:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:25:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:25:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:25:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:25:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:25:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:25:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:25:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:25:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:25:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:25:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2278 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:25:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:25:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:25:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:25:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2278 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:25:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2278 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:25:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2278 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:25:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:25:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:25:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:25:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:25:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:25:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:25:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:25:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:25:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:25:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:25:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:25:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:25:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:25:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:25:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:25:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:25:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:25:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:25:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:25:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:25:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:25:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:25:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:25:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:25:19 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:25:19 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:25:19 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:25:19 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:25:19 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:25:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:25:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:25:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:25:20 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:25:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:25:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:25:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:25:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:25:20 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:25:21 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:25:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:25:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:25:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:25:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:25:21 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:25:22 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:25:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:25:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:25:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:25:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:25:22 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:25:23 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:25:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:25:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:25:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:25:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:25:23 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:25:24 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:25:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:25:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:25:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:25:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:25:24 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:25:25 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:25:25 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:25:25 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:25:26 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:25:26 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:25:27 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:25:27 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:25:28 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:25:28 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:25:29 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:25:29 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:25:30 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:25:30 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:25:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:25:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:25:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:25:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:25:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:25:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:25:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:25:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:25:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:25:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:25:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:25:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:25:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:25:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:25:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:25:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:25:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:25:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:25:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:25:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:25:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:25:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:25:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:25:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:25:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:25:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:25:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:25:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:25:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:25:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:25:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:25:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:25:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:25:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:25:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:25:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:25:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:25:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:25:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:25:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:25:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:25:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:25:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:25:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:25:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:25:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:25:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:25:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:25:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:25:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:25:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:25:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:25:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:25:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:25:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:25:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:25:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:25:41 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:25:41 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:25:41 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:25:41 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:25:41 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:25:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:25:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:25:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:25:41 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:25:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:25:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:25:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:25:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:25:42 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:25:42 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:25:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:25:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:25:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:25:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:25:43 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:25:43 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:25:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:25:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:25:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:25:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:25:44 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:25:44 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:25:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:25:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:25:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:25:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:25:45 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:25:45 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:25:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:25:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:25:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:25:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:25:46 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:25:46 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:25:47 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:25:47 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:25:48 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:25:48 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:25:49 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:25:49 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:25:50 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:25:50 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:25:50 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:25:51 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:25:51 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:25:52 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:25:52 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:25:53 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:25:53 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:25:54 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:25:54 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:25:55 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:25:55 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:25:56 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:25:56 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:25:57 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 13:25:57 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 13:25:58 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 13:25:58 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 13:25:58 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 13:25:59 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 13:25:59 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 13:26:00 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 13:26:00 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 13:26:01 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 13:26:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:26:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:26:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:26:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:26:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:26:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:26:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:26:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:26:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:26:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:26:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:26:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:26:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4447 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:26:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:26:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4447 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:26:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4447 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:26:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4447 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:26:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4447 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:26:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4447 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:26:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4447 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:26:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4447 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:26:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:26:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:26:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:26:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:26:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:26:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:26:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:26:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:26:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:26:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:26:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:26:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:26:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:26:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:26:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:26:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:26:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:26:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:26:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:26:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:26:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:26:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:26:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:26:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:26:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:11 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:26:12 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:26:12 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:26:12 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:26:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:26:12 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:26:12 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:26:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:26:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:26:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:26:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:26:13 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:26:13 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:26:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:26:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:26:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:26:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:26:14 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:26:14 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:26:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:26:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:26:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:26:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:26:14 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:26:15 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:26:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:26:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:26:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:26:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:26:15 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:26:16 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:26:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:26:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:26:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:26:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:26:16 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:26:17 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:26:17 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:26:18 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:26:18 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:26:19 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:26:19 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:26:20 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:26:20 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:26:21 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:26:21 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:26:22 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:26:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:26:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:26:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:26:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:26:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:26:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:26:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:26:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:26:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:26:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:26:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:26:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:26:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:26:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:26:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:26:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:26:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:26:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:26:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:26:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:26:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:26:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:26:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:26:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:26:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:26:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:26:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:26:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:26:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:26:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:26:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:26:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:26:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:26:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:26:32 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:32 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:26:32 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:26:32 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:26:32 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:26:32 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:26:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:26:33 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:26:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:26:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:26:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:26:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:26:33 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:26:34 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:26:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:26:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:26:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:26:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:26:34 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:26:35 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:26:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:26:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:26:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:26:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:26:35 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:26:36 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:26:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:26:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:26:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:26:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:26:36 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:26:36 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:26:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:26:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:26:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:26:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:26:37 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:26:37 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:26:38 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:26:38 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:26:39 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:26:39 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:26:40 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:26:40 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:26:41 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:26:41 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:26:42 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:26:42 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:26:43 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:26:43 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:26:44 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:26:44 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:26:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:26:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:26:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:26:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:26:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:26:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:26:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:26:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:26:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:26:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:26:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:26:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:26:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:26:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:26:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:26:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:26:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:26:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:26:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:26:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:26:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:26:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:26:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:26:49 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:26:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:26:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:26:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:26:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:26:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:26:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:26:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:26:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:26:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:26:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:26:54 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:26:54 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:26:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:26:55 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:26:55 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:26:55 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:26:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:26:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:26:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:26:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:26:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:26:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:26:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:26:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:26:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:26:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:26:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:26:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:26:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:26:55 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:26:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:26:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:26:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:26:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:26:56 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:26:56 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:26:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:26:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:26:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:26:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:26:57 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:26:57 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:26:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:26:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:26:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:26:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:26:58 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:26:58 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:26:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:26:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:26:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:26:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:26:59 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:26:59 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:26:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:26:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:26:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:26:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:26:59 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:27:00 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:27:00 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:27:01 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:27:01 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:27:02 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:27:02 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:27:03 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:27:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:27:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:27:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:27:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:27:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:27:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:27:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:27:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:27:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:27:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:27:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:27:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:27:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:27:03 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1850 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:27:03 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1850 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:27:03 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1850 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:27:03 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1850 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:27:03 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1850 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:27:03 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1850 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:27:03 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1850 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:27:03 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1850 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:27:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:27:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:27:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:27:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:27:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:27:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:27:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:27:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:27:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:27:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:27:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:27:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:27:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:27:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:27:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:27:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:27:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:27:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:27:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:27:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:27:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:27:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:27:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:27:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:27:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:27:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:27:13 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:27:13 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:27:13 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:27:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:27:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:27:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:27:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:27:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:27:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:27:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:27:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:27:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:27:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:27:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:27:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:27:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:27:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:27:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:27:16 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:27:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:27:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:27:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:27:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:27:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:27:17 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:27:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:27:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:27:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:27:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:27:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:27:18 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:27:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:27:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:27:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:27:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:27:18 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:27:19 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:27:19 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:27:20 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:27:20 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:27:20 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:27:21 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:27:21 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:27:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:27:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:27:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:27:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:27:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:27:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:27:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:27:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:27:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:27:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:27:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:27:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:27:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:27:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1851 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:27:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1851 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:27:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1851 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:27:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1851 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:27:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1851 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:27:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1851 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:27:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1851 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:27:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1851 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:27:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:27:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:27:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:27:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:27:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:27:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:27:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:27:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:27:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:27:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:27:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:27:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:27:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:27:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:27:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:27:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:27:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:27:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:27:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:27:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:27:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:27:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:27:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:27:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:27:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:27:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:27:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:27:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:27:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:27:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:27:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:27:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:27:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:27:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:27:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:27:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:27:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:27:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:27:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:27:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:27:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:27:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:27:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:27:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:27:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:27:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:27:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:27:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:27:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:27:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:27:32 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:27:32 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:27:32 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:27:32 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:27:32 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:27:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:27:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:27:32 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:27:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:27:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:27:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:27:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:27:33 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:27:33 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:27:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:27:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:27:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:27:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:27:34 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:27:34 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:27:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:27:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:27:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:27:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:27:35 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:27:35 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:27:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:27:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:27:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:27:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:27:36 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:27:36 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:27:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:27:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:27:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:27:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:27:37 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:27:37 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:27:38 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:27:38 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:27:39 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:27:39 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:27:40 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:27:40 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:27:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:27:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:27:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:27:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:27:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:27:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:27:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:27:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:27:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:27:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:27:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:27:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:27:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:27:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:27:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:27:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:27:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:27:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:27:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:27:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:27:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:27:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:27:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:27:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:27:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:27:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:27:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:27:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:27:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:27:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:27:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:27:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:27:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:27:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:27:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:27:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:27:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:27:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:27:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:27:51 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:27:51 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:27:51 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:27:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:27:51 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:27:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:27:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:27:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:27:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:27:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:27:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:27:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:27:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:27:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:27:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:27:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:27:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:27:51 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:27:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:27:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:27:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:27:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:27:52 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:27:52 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:27:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:27:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:27:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:27:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:27:53 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:27:53 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:27:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:27:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:27:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:27:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:27:54 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:27:54 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:27:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:27:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:27:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:27:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:27:54 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:27:55 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:27:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:27:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:27:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:27:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:27:55 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:27:56 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:27:56 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:27:57 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:27:57 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:27:58 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:27:58 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:27:59 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:27:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:27:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:27:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:27:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:27:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:27:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:27:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:27:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:27:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:27:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:27:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:27:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:27:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:28:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:28:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:28:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:28:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:28:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:28:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:28:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:28:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:28:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:28:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:28:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:28:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:28:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:28:04 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:28:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:28:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:28:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:28:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:28:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:28:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:28:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:28:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:28:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:28:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:28:09 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:28:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:28:09 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:28:09 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:28:09 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:28:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:28:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:28:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:28:10 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:28:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:28:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:28:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:28:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:28:10 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:28:11 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:28:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:28:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:28:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:28:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:28:11 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:28:12 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:28:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:28:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:28:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:28:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:28:12 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:28:13 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:28:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:28:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:28:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:28:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:28:13 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:28:14 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:28:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:28:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:28:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:28:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:28:14 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:28:14 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:28:15 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:28:15 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:28:16 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:28:16 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:28:17 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:28:17 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:28:18 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:28:18 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:28:19 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:28:19 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:28:20 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:28:20 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:28:21 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:28:21 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:28:22 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:28:22 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:28:23 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:28:23 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:28:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:28:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:28:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:28:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:28:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:28:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:28:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:28:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:28:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:28:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:28:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:28:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:28:23 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:28:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3135 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:28:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3135 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:28:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3135 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:28:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3135 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:28:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3135 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:28:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3135 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:28:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3135 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:28:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:28:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:28:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:28:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:28:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:28:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:28:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:28:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:28:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:28:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:28:28 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:28:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:28:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:28:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:28:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:28:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:28:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:28:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:28:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:28:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:28:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:28:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:28:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:28:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:28:33 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:33 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:28:34 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:28:34 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:28:34 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:28:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:28:34 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:28:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:28:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:28:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:28:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:28:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:28:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:28:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:28:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:28:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:28:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:28:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:28:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:28:34 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:28:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:28:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:28:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:28:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:28:35 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:28:35 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:28:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:28:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:28:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:28:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:28:36 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:28:36 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:28:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:28:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:28:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:28:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:28:37 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:28:37 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:28:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:28:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:28:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:28:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:28:38 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:28:38 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:28:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:28:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:28:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:28:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:28:39 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:28:39 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:28:40 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:28:40 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:28:40 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:28:41 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:28:41 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:28:42 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:28:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:28:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:28:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:28:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:28:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:28:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:28:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:28:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:28:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:28:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:28:42 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1848 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:28:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:28:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:28:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:28:42 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1848 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:28:42 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1848 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:28:42 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1848 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:28:42 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1848 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:28:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:28:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:28:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:28:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:28:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:28:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:28:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:28:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:28:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:28:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:28:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:28:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:28:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:28:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:28:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:28:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:28:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:28:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:28:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:28:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:28:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:28:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:28:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:28:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:28:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:28:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:28:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:28:53 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:28:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:28:53 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:28:53 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:28:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:28:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:28:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:28:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:28:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:28:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:28:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:28:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:28:53 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:28:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:28:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:28:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:28:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:28:53 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:28:54 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:28:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:28:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:28:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:28:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:28:54 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:28:55 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:28:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:28:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:28:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:28:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:28:55 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:28:56 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:28:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:28:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:28:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:28:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:28:56 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:28:57 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:28:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:28:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:28:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:28:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:28:57 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:28:58 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:28:58 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:28:59 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:28:59 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:29:00 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:29:00 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:29:01 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:29:01 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:29:02 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:29:02 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:29:02 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:29:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:29:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:29:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:29:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:29:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:29:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:29:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:29:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:29:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:29:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:29:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:29:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:29:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:29:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:29:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:29:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:29:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:29:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:29:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:29:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:29:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:29:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:29:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:29:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:29:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:29:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:29:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:29:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:29:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:29:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:29:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:29:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:29:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:29:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:29:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:29:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:29:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:29:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:29:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:29:13 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:29:13 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:29:13 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:29:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:29:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:29:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:29:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:29:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:29:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:29:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:29:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:29:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:29:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:29:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:29:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:29:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:29:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:29:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:29:15 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:29:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:29:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:29:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:29:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:29:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:29:16 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:29:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:29:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:29:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:29:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:29:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:29:17 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:29:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:29:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:29:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:29:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:29:18 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:29:18 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:29:19 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:29:19 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:29:20 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:29:20 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:29:21 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:29:21 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:29:22 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:29:22 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:29:23 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:29:23 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:29:24 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:29:24 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:29:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:29:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:29:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:29:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:29:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:29:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:29:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:29:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:29:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:29:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:29:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:29:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:29:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:29:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:29:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:29:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:29:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:29:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:29:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:29:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:29:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:29:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:29:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:29:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:29:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:29:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:29:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:29:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:29:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:29:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:29:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:29:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:29:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:29:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:29:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:29:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:29:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:29:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:29:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:29:35 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:29:35 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:29:35 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:29:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:29:35 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:29:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:29:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:29:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:29:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:29:36 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:29:36 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:29:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:29:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:29:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:29:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:29:37 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:29:37 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:29:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:29:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:29:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:29:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:29:38 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:29:38 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:29:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:29:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:29:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:29:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:29:39 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:29:39 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:29:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:29:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:29:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:29:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:29:40 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:29:40 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:29:40 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:29:41 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:29:41 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:29:42 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:29:42 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:29:43 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:29:43 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:29:44 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:29:44 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:29:45 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:29:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:29:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:29:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:29:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:29:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:29:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:29:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:29:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:29:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:29:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:29:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:29:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2258 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:29:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2258 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:29:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2258 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:29:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2258 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:29:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2258 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:29:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2258 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:29:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2258 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:29:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:29:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:29:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:29:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:29:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:29:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:29:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:29:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:29:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:29:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:29:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:29:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:29:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:29:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:29:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:29:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:29:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:29:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:29:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:29:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:29:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:29:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:29:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:29:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:29:55 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:29:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:29:55 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:29:55 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:29:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:29:55 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:29:56 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:29:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:29:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:29:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:29:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:29:56 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:29:57 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:29:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:29:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:29:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:29:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:29:57 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:29:58 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:29:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:29:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:29:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:29:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:29:58 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:29:59 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:29:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:29:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:29:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:29:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:29:59 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:30:00 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:30:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:30:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:30:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:30:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:30:00 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:30:01 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:30:01 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:30:02 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:30:02 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:30:02 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:30:03 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:30:03 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:30:04 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:30:04 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:30:05 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:30:05 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:30:06 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:30:06 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:30:07 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:30:07 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:30:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:30:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:30:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:30:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:30:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:30:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:30:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:30:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:30:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:30:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:30:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:30:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2695 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:30:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2695 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:30:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2695 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:30:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2695 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:30:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2695 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:30:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2695 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:30:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2695 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:30:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:30:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:30:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:30:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:30:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:30:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:30:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:30:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:30:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:30:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:30:12 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:30:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:30:12 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:30:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:30:13 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:30:13 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:30:13 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:30:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:30:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:30:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:30:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:30:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:30:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:30:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:30:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:30:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:30:13 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:30:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:30:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:30:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:30:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:30:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:30:14 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:30:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:30:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:30:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:30:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:30:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:30:15 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:30:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:30:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:30:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:30:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:30:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:30:16 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:30:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:30:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:30:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:30:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:30:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:30:17 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:30:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:30:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:30:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:30:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:30:18 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:30:18 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:30:19 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:30:19 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:30:20 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:30:20 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:30:20 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:30:21 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:30:21 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:30:22 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:30:22 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:30:23 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:30:23 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:30:24 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:30:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:30:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:30:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:30:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:30:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:30:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:30:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:30:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:30:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:30:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:30:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:30:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:30:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:30:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2493 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:30:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2493 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:30:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2493 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:30:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2493 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:30:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2493 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:30:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2493 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:30:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:30:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:30:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:30:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:30:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:30:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:30:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:30:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:30:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:30:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:30:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:30:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:30:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:30:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:30:30 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:30:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:30:30 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:30:30 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:30:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:30:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:30:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:30:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:30:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:30:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:30:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:30:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:30:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:30:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:30:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:30:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:30:30 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:30:31 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:30:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:30:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:30:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:30:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:30:31 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:30:32 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:30:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:30:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:30:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:30:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:30:32 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:30:33 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:30:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:30:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:30:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:30:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:30:33 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:30:34 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:30:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:30:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:30:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:30:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:30:34 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:30:35 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:30:35 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:30:36 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:30:36 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:30:37 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:30:37 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:30:38 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:30:38 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:30:39 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:30:39 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:30:39 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:30:40 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:30:40 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:30:41 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:30:41 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:30:42 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:30:42 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:30:43 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:30:43 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:30:44 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:30:44 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:30:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:30:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:30:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:30:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:30:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:30:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:30:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:30:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:30:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:30:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:30:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:30:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:30:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:30:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:30:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:30:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:30:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:30:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:30:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:30:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:30:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:30:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:30:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:30:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:30:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:30:50 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:30:50 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:30:50 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:30:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:30:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:30:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:30:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:30:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:30:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:30:50 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:30:50 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:30:50 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:30:50 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:30:50 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:30:50 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:30:50 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:30:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:30:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:30:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:30:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:30:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:30:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:30:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:30:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:30:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:30:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:30:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:30:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:30:55 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:30:56 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:30:56 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:30:56 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:30:56 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:30:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:30:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:30:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:30:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:30:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:30:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:30:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:30:56 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:30:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:30:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:30:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:30:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:30:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:30:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:30:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:30:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:30:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:30:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:30:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:30:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:30:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:30:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:30:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:30:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:30:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:30:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:30:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:30:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:30:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:30:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:30:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:30:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:30:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:30:57 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:30:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:30:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:30:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:30:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:30:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:30:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:30:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:30:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:30:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:30:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:30:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:30:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:30:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:30:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:30:57 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:30:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=377 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:30:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=377 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:30:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=377 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:30:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=377 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:30:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=377 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:30:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=377 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:31:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:31:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:31:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:31:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:31:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:31:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:31:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:31:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:31:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:31:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:31:02 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:31:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:31:02 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:31:02 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:31:03 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:31:03 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:31:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:31:03 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:31:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:31:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:31:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:31:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:31:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:31:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:31:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:31:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:31:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:31:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:31:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:31:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:31:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:31:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:03 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:31:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:31:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:31:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:31:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:31:03 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:31:04 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:31:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:31:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:31:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:31:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:31:04 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:31:05 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:31:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:31:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:31:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:31:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:31:05 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:31:06 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:31:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:31:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:31:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:31:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:31:06 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:31:07 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:31:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:31:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:31:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:31:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:31:07 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:31:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:31:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:31:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:31:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:31:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:31:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:31:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:31:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:31:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:31:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:31:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:31:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:31:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:31:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:31:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:31:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:31:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:08 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:31:08 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:31:09 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:31:09 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:31:10 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:31:10 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:31:10 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:31:11 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:31:11 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:31:12 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:31:12 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:31:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:31:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:31:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:31:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:31:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:31:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:31:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:31:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:31:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:31:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:31:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:31:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:31:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:31:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:31:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:31:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:31:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:13 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:31:13 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:31:14 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:31:14 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:31:15 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:31:15 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:31:16 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:31:16 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:31:17 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:31:17 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:31:18 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:31:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:31:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:31:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:31:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:31:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:31:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:31:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:31:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:31:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:31:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:31:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:31:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:31:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:31:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:31:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:31:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:31:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:18 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 13:31:19 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 13:31:19 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 13:31:20 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 13:31:20 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 13:31:20 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 13:31:21 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 13:31:21 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 13:31:22 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 13:31:22 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 13:31:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:31:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:31:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:31:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:31:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:31:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:31:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:31:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:31:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:31:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:31:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:31:23 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:31:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:31:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:31:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4477 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:31:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4477 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:31:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4477 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:31:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4477 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:31:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4477 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:31:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4477 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:31:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4477 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:31:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4477 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:31:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:31:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:31:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:31:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:31:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:31:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:31:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:31:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:31:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:31:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:31:28 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:31:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:31:28 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:31:28 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:31:28 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:31:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:31:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:31:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:29 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:31:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:31:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:31:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:31:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:31:29 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:31:30 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:31:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:31:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:31:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:31:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:31:30 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:31:31 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:31:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:31:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:31:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:31:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:31:31 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:31:32 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:31:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:31:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:31:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:31:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:31:32 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:31:33 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:31:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:31:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:31:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:31:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:31:33 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:31:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:31:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:31:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:31:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:31:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:31:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:31:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:31:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:31:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:31:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:31:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:31:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:31:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:31:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:31:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:31:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:33 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:31:34 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:31:34 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:31:35 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:31:35 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:31:36 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:31:36 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:31:37 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:31:37 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:31:38 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:31:38 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:31:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:31:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:31:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:31:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:31:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:31:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:31:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:31:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:31:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:31:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:31:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:31:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:31:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:31:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:31:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:31:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:31:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:39 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:31:39 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:31:40 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:31:40 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:31:41 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:31:41 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:31:42 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:31:42 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:31:42 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:31:43 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:31:43 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:31:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:31:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:31:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:31:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:31:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:31:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:31:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:31:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:31:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:31:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:31:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:31:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:31:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:31:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:31:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:31:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:31:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:44 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 13:31:44 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 13:31:45 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 13:31:45 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 13:31:46 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 13:31:46 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 13:31:47 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 13:31:47 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 13:31:48 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 13:31:48 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 13:31:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:31:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:31:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:31:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:31:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:31:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:31:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:31:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:31:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:31:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:31:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:31:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:31:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:31:49 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:31:49 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4477 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:31:49 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4477 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:31:49 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4477 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:31:49 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4477 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:31:49 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4477 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:31:49 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4477 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:31:49 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4477 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:31:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:31:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:31:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:31:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:31:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:31:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:31:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:31:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:31:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:31:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:31:54 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:31:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:31:54 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:31:54 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:31:54 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:31:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:31:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:31:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:55 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:31:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:31:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:31:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:31:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:31:55 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:31:56 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:31:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:31:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:31:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:31:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:31:56 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:31:56 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:31:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:31:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:31:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:31:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:31:57 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:31:57 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:31:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:31:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:31:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:31:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:31:58 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:31:58 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:31:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:31:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:31:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:31:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:31:59 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:31:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:31:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:31:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:31:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:31:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:31:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:31:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:31:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:31:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:31:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:31:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:31:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:31:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:31:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:31:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:31:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:31:59 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:32:00 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:32:00 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:32:01 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:32:01 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:32:02 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:32:02 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:32:03 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:32:03 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:32:04 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:32:04 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:32:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:32:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:32:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:32:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:32:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:32:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:32:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:32:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:32:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:32:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:05 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:32:05 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:32:06 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:32:06 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:32:06 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:32:07 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:32:07 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:32:08 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:32:08 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:32:09 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:32:09 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:32:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:32:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:32:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:32:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:32:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:32:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:32:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:32:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:32:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:32:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:32:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:10 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 13:32:10 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 13:32:11 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 13:32:11 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 13:32:12 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 13:32:12 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 13:32:13 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 13:32:13 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 13:32:14 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 13:32:14 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 13:32:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:32:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:32:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:32:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:32:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:32:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:32:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:32:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:32:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:32:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4454 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:32:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:32:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:32:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4454 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4454 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4454 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4454 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4454 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4454 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4454 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4455 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4455 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4455 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4455 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4455 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4455 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4455 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4455 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:32:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:32:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:32:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:32:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:32:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:32:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:32:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:32:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:32:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:32:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:32:19 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:32:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:32:19 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:32:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:32:20 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:32:20 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:32:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:32:20 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:32:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:32:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:32:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:32:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:32:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:32:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:32:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:32:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:32:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:32:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:20 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:32:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:32:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:32:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:32:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:32:21 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:32:21 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:32:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:32:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:32:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:32:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:32:22 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:32:22 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:32:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:32:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:32:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:32:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:32:23 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:32:23 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:32:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:32:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:32:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:32:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:32:24 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:32:24 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:32:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:32:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:32:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:32:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:32:25 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:32:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:32:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:32:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:32:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:32:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:32:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:32:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:32:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:32:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:32:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:32:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:25 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:32:26 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:32:26 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:32:27 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:32:27 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:32:28 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:32:28 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:32:29 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:32:29 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:32:29 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:32:30 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:32:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:32:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:32:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:32:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:32:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:32:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:32:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:32:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:32:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:32:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:32:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:30 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:32:31 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:32:31 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:32:32 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:32:32 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:32:33 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:32:33 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:32:34 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:32:34 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:32:35 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:32:35 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:32:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:32:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:32:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:32:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:32:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:32:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:32:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:32:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:32:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:32:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:36 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 13:32:36 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 13:32:37 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 13:32:37 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 13:32:38 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 13:32:38 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 13:32:38 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 13:32:39 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 13:32:39 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 13:32:40 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 13:32:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:32:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:32:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:32:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:32:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:32:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:32:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:32:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:32:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:32:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4462 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:32:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:32:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:32:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4462 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4462 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4462 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4462 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4462 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4463 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4463 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4463 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4463 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4463 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4463 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4463 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4463 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:32:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:32:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:32:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:32:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:32:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:32:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:32:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:32:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:32:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:32:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:32:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:32:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:32:45 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:32:46 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:32:46 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:32:46 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:32:46 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:32:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:32:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:46 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:32:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:32:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:47 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:32:47 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:32:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:48 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:32:48 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:32:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:32:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:32:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:32:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:32:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:32:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:32:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:32:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:32:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:32:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:32:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:32:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=634 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:32:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=634 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=634 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=635 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=635 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=635 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=635 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=635 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=635 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=635 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=635 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=636 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=636 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=636 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=636 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=636 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=636 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=636 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=636 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:32:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:32:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:32:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:32:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:32:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:32:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:32:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:32:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:32:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:32:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:32:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:32:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:32:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:32:54 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:32:54 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:32:54 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:32:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:32:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:32:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:32:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:32:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:32:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:32:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:32:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:32:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:32:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:32:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:32:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:32:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:32:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:32:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:32:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:32:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:32:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:32:55 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:32:55 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:32:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:32:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:32:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:32:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:32:56 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:32:56 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:32:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:32:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:32:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:32:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:32:57 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:32:57 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:32:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:32:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:32:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:32:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:32:58 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:32:58 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:32:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:32:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:32:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:32:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:32:59 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:32:59 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:32:59 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:33:00 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:33:00 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:33:01 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:33:01 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:33:02 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:33:02 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:33:03 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:33:03 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:33:04 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:33:04 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:33:05 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:33:05 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:33:06 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:33:06 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:33:07 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:33:07 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:33:08 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:33:08 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:33:09 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:33:09 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:33:09 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 13:33:10 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 13:33:10 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 13:33:11 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 13:33:11 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 13:33:12 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 13:33:12 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 13:33:13 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 13:33:13 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 13:33:14 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 13:33:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:33:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:33:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:33:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:33:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:33:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:33:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:33:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:33:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:33:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:33:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:33:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:33:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:33:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:33:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:33:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:33:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:33:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:33:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:33:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:33:14 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 13:33:15 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 13:33:15 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 13:33:16 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 13:33:16 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 13:33:17 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 13:33:17 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 13:33:18 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 13:33:18 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 13:33:18 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 13:33:19 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 13:33:19 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 13:33:20 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 13:33:20 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 13:33:21 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 13:33:21 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 13:33:22 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 13:33:22 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 13:33:23 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 13:33:23 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-25 13:33:24 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-25 13:33:24 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-25 13:33:25 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-25 13:33:25 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-25 13:33:26 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-25 13:33:26 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-25 13:33:27 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-25 13:33:27 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-25 13:33:28 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-25 13:33:28 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-25 13:33:28 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-25 13:33:29 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-25 13:33:29 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-25 13:33:30 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-25 13:33:30 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-25 13:33:31 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-25 13:33:31 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-25 13:33:32 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-25 13:33:32 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-25 13:33:33 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-25 13:33:33 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-25 13:33:34 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-25 13:33:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:33:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:33:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:33:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:33:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:33:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:33:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:33:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:33:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:33:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:33:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:33:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:33:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:33:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:33:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:33:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:33:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:33:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:33:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:33:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:33:34 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-25 13:33:35 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-25 13:33:35 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-25 13:33:36 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-25 13:33:36 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-25 13:33:37 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-25 13:33:37 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-25 13:33:38 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-25 13:33:38 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-25 13:33:38 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-25 13:33:39 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-25 13:33:39 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-25 13:33:40 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-25 13:33:40 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-25 13:33:41 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-25 13:33:41 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-25 13:33:42 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-25 13:33:42 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-25 13:33:43 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-25 13:33:43 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-25 13:33:44 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-25 13:33:44 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-25 13:33:45 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-25 13:33:45 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-25 13:33:46 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-25 13:33:46 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-25 13:33:47 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-25 13:33:47 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-25 13:33:48 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-25 13:33:48 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-25 13:33:48 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-25 13:33:49 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-25 13:33:49 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-25 13:33:50 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-25 13:33:50 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-25 13:33:51 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-25 13:33:51 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-25 13:33:52 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-25 13:33:52 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-25 13:33:53 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-25 13:33:53 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-25 13:33:54 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-25 13:33:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:33:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:33:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:33:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:33:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:33:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:33:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:33:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:33:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:33:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:33:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:33:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:33:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:33:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:33:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:33:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:33:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:33:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:33:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:33:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:33:54 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-25 13:33:55 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-25 13:33:55 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-25 13:33:56 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-25 13:33:56 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-25 13:33:57 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-25 13:33:57 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-25 13:33:57 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-25 13:33:58 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-25 13:33:58 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-25 13:33:59 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-25 13:33:59 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-25 13:34:00 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-25 13:34:00 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-25 13:34:01 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-25 13:34:01 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-25 13:34:02 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-25 13:34:02 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-25 13:34:03 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-25 13:34:03 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-25 13:34:04 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-25 13:34:04 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-25 13:34:05 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-25 13:34:05 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-25 13:34:06 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-25 13:34:06 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-25 13:34:07 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-25 13:34:07 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-25 13:34:08 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-25 13:34:08 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-25 13:34:08 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-25 13:34:09 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-25 13:34:09 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-25 13:34:10 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-25 13:34:10 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-25 13:34:11 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-25 13:34:11 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-25 13:34:12 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-25 13:34:12 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-25 13:34:13 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-25 13:34:13 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-25 13:34:14 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-25 13:34:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:34:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:34:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:34:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:34:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:34:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:34:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:34:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:34:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:34:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:34:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:34:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=17333 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:34:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=17333 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:34:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=17333 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:34:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=17333 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:34:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=17333 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:34:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=17333 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:34:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=17334 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:34:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=17334 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:34:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=17334 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:34:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=17334 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:34:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=17334 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:34:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=17334 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:34:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=17334 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:34:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=17334 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:34:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:34:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:34:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:34:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:34:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:34:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:34:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:34:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:34:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:34:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:34:19 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:34:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:34:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:34:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:34:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:34:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:34:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:34:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:34:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:34:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:34:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:34:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:34:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:34:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:34:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:34:24 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:34:25 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:34:25 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:34:25 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:34:25 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:34:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:34:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:25 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:34:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:34:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:26 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:34:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:26 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:34:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:34:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:34:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:34:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:34:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:34:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:27 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:34:27 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:34:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:34:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:34:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:34:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:34:28 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:34:28 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:34:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:34:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:34:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:34:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:34:28 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:34:29 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:34:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:34:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:34:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:34:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:34:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:34:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:34:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:34:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:34:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:34:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:34:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:34:29 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:34:30 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:34:30 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:34:31 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:34:31 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:34:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:34:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:34:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:34:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:34:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:34:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:34:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:34:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:32 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:34:32 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:34:33 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:34:33 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:34:34 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:34:34 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:34:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:34:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:34:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:34:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:34:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:34:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:34:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:34:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:34:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:35 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:34:35 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:34:36 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:34:36 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:34:37 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:34:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:34:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:34:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:34:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:34:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:34:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:34:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:34:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:37 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:34:38 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:34:38 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:34:39 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:34:39 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:34:39 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:34:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:34:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:34:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:34:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:34:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:34:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:34:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:34:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:40 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:34:40 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 13:34:41 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 13:34:41 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 13:34:42 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 13:34:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:34:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:34:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:34:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:34:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:34:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:34:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:34:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:34:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:34:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:34:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:34:42 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3848 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:34:42 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3848 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:34:42 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3848 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:34:42 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3848 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:34:42 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3848 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:34:42 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3848 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:34:42 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3848 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:34:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:34:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:34:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:34:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:34:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:34:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:34:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:34:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:34:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:34:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:34:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:34:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:34:47 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:34:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:34:48 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:34:48 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:34:48 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:34:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:34:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:34:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:34:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:34:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:34:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:34:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:34:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:34:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:48 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:34:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:34:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:34:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:34:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:34:49 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:34:49 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:34:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:34:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:34:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:34:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:34:50 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:34:50 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:34:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:34:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:34:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:34:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:34:51 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:34:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:34:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:34:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:34:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:34:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:34:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:34:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:34:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:34:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:51 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:34:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:34:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:34:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:34:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:34:52 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:34:52 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:34:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:34:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:34:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:34:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:34:52 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:34:53 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:34:53 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:34:54 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:34:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:34:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:34:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:34:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:34:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:34:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:34:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:34:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:34:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:54 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:34:55 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:34:55 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:34:56 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:34:56 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:34:57 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:34:57 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:34:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:34:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:34:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:34:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:34:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:34:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:34:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:34:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:34:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:34:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:34:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:34:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:34:58 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:34:58 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:34:59 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:34:59 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:35:00 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:35:00 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:35:01 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:35:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:35:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:35:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:35:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:35:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:35:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:35:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:35:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:35:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:35:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:35:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:35:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:35:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:35:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:35:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:35:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:35:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:35:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:35:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:35:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:35:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:35:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:35:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:35:06 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:35:06 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:35:06 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:35:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:35:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:07 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:35:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:35:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:08 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:35:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:35:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:35:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:35:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:35:08 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:35:09 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:35:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:35:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:35:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:35:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:35:09 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:35:10 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:35:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:35:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:35:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:35:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:35:10 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:35:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:35:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:35:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:35:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:35:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:35:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:35:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:35:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:35:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:11 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:35:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:35:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:35:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:35:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:35:11 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:35:12 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:35:12 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:35:13 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:35:13 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:35:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:35:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:35:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:35:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:35:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:35:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:35:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:35:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:35:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:35:13 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:35:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:35:13 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1604 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:35:13 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1604 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:35:13 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1604 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:35:13 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1604 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:35:13 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1604 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:35:13 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1604 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:35:13 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1604 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:35:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:35:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:35:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:35:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:35:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:35:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:35:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:35:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:35:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:35:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:35:18 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:35:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:35:18 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:35:19 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:35:19 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:35:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:19 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:35:19 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:35:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:35:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:35:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:35:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:35:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:35:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:35:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:35:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:35:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:19 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:35:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:35:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:35:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:35:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:35:20 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:35:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:35:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:35:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:35:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:35:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:35:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:35:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:35:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:35:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:20 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:35:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:35:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:35:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:35:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:35:21 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:35:21 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:35:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:35:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:35:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:35:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:35:22 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:35:22 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:35:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:35:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:35:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:35:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:35:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:35:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:35:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:35:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:35:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:35:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:35:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:35:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:35:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:23 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:35:23 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:35:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:35:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:35:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:35:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:35:24 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:35:24 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:35:25 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:35:25 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:35:26 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:35:26 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:35:27 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:35:27 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:35:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:28 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:35:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:35:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:35:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:35:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:35:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:35:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:35:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:35:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:35:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:28 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:35:28 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:35:29 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:35:29 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:35:30 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:35:30 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:35:31 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:35:31 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:35:32 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:35:32 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:35:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:35:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:35:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:35:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:35:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:35:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:35:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:35:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:35:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:35:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:35:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:35:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:35:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:35:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:35:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:35:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:35:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:35:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:35:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:35:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:35:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:35:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:35:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:35:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:35:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:35:38 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:35:38 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:35:38 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:35:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:35:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:35:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:35:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:35:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:35:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:35:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:35:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:35:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:38 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:35:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:35:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:35:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:35:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:35:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:35:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:35:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:35:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:35:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:35:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:35:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:35:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:35:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:35:39 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:35:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:35:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:35:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:35:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:35:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:35:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:35:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:35:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:35:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:35:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:35:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:35:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:35:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:40 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:35:40 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:35:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:35:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:35:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:35:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:35:41 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:35:41 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:35:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:35:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:35:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:35:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:35:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:35:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:35:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:35:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:35:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:35:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:35:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:35:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:35:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:42 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:35:42 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:35:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:35:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:35:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:35:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:35:43 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:35:43 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:35:44 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:35:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:35:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:35:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:35:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:35:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:35:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:35:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:35:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:35:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:35:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:35:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:35:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:35:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:35:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:35:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:35:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:35:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:35:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:35:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:35:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:35:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:35:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:35:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:35:49 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:35:49 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:35:49 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:35:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:35:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:35:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:35:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:35:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:35:50 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:35:51 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:35:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:35:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:35:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:35:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:35:51 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:35:52 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:35:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:35:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:35:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:35:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:35:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:35:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:35:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:35:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:35:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:35:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:35:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:52 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:35:53 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:35:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:35:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:35:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:35:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:35:53 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:35:54 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:35:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:35:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:35:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:35:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:35:54 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:35:55 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:35:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:35:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:35:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:35:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:35:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:35:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:35:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:35:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:35:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:55 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:35:55 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:35:56 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:35:56 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:35:57 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:35:57 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:35:58 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:35:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:35:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:35:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:35:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:35:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:35:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:35:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:35:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:35:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:35:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:35:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:35:58 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:35:59 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:35:59 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:36:00 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:36:00 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:36:01 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:36:01 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:36:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:36:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:36:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:36:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:36:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:36:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:36:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:36:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:36:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:36:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:36:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:36:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:36:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:36:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:36:02 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:36:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2726 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:36:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2726 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:36:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2726 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:36:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2726 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:36:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2726 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:36:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2726 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:36:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2726 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:36:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2726 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:36:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:36:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:36:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:36:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:36:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:36:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:36:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:36:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:36:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:36:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:36:07 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:36:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:36:07 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:36:07 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:36:07 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:36:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:36:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:36:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:36:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:36:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:36:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:36:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:36:08 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:36:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:36:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:36:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:36:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:36:08 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:36:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:36:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:36:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:36:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:36:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:36:08 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:36:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:36:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:36:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:36:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:36:09 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:36:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:36:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:36:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:36:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:36:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:36:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:36:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:36:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:36:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:36:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:36:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:36:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=536 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:36:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:36:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:36:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=536 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:36:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=536 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:36:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=536 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:36:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=536 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:36:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=536 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:36:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=536 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:36:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=536 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:36:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:36:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:36:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:36:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:36:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:36:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:36:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:36:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:36:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:36:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:36:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:36:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:36:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:36:15 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:36:15 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:36:15 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:36:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:36:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:36:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:36:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:36:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:36:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:36:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:36:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:36:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:36:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:36:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:36:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:36:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:36:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:36:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:36:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:36:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:36:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:36:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:36:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:36:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:36:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:36:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:36:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:36:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:36:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:36:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:36:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:36:16 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:36:17 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:36:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:36:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:36:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:36:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:36:17 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:36:18 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:36:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:36:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:36:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:36:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:36:18 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:36:19 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:36:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:36:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:36:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:36:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:36:19 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:36:20 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:36:20 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:36:21 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:36:21 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:36:22 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:36:22 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:36:23 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:36:23 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:36:24 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:36:24 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:36:25 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:36:25 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:36:26 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:36:26 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:36:26 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:36:27 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:36:27 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:36:28 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:36:28 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:36:29 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:36:29 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:36:30 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:36:30 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 13:36:31 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 13:36:31 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 13:36:32 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 13:36:32 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 13:36:33 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 13:36:33 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 13:36:34 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 13:36:34 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 13:36:35 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 13:36:35 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 13:36:36 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 13:36:36 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 13:36:36 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 13:36:37 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 13:36:37 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 13:36:38 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 13:36:38 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 13:36:39 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 13:36:39 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 13:36:40 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 13:36:40 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 13:36:41 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 13:36:41 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 13:36:42 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 13:36:42 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 13:36:43 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 13:36:43 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 13:36:44 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 13:36:44 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-25 13:36:45 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-25 13:36:45 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-25 13:36:46 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-25 13:36:46 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-25 13:36:46 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-25 13:36:47 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-25 13:36:47 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-25 13:36:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:36:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:36:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:36:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:36:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:36:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:36:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:36:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:36:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:36:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:36:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:36:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:36:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:36:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:36:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:36:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:36:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:36:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:36:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:36:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:36:48 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-25 13:36:48 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-25 13:36:49 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-25 13:36:49 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-25 13:36:50 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-25 13:36:50 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-25 13:36:51 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-25 13:36:51 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-25 13:36:52 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-25 13:36:52 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-25 13:36:53 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-25 13:36:53 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-25 13:36:54 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-25 13:36:54 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-25 13:36:55 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-25 13:36:55 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-25 13:36:55 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-25 13:36:56 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-25 13:36:56 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-25 13:36:57 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-25 13:36:57 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-25 13:36:58 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-25 13:36:58 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-25 13:36:59 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-25 13:36:59 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-25 13:37:00 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-25 13:37:00 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-25 13:37:01 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-25 13:37:01 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-25 13:37:02 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-25 13:37:02 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-25 13:37:03 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-25 13:37:03 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-25 13:37:04 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-25 13:37:04 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-25 13:37:05 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-25 13:37:05 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-25 13:37:06 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-25 13:37:06 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-25 13:37:06 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-25 13:37:07 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-25 13:37:07 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-25 13:37:08 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-25 13:37:08 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-25 13:37:09 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-25 13:37:09 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-25 13:37:10 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-25 13:37:10 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-25 13:37:11 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-25 13:37:11 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-25 13:37:12 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-25 13:37:12 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-25 13:37:13 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-25 13:37:13 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-25 13:37:14 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-25 13:37:14 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-25 13:37:15 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-25 13:37:15 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-25 13:37:16 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-25 13:37:16 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-25 13:37:16 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-25 13:37:17 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-25 13:37:17 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-25 13:37:18 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-25 13:37:18 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-25 13:37:19 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-25 13:37:19 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-25 13:37:20 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-25 13:37:20 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-25 13:37:21 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-25 13:37:21 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-25 13:37:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:37:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:37:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:37:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:37:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:37:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:37:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:37:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:37:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:37:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:37:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:37:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:37:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:37:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:37:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:37:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:37:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:37:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:37:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:37:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:37:22 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-25 13:37:22 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-25 13:37:23 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-25 13:37:23 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-25 13:37:24 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-25 13:37:24 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-25 13:37:25 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-25 13:37:25 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-25 13:37:26 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-25 13:37:26 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-25 13:37:26 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-25 13:37:27 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-25 13:37:27 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-25 13:37:28 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-25 13:37:28 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-25 13:37:29 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-25 13:37:29 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-25 13:37:30 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-25 13:37:30 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-25 13:37:31 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-25 13:37:31 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-25 13:37:32 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-25 13:37:32 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-25 13:37:33 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-25 13:37:33 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-25 13:37:34 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-25 13:37:34 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-25 13:37:35 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-25 13:37:35 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-25 13:37:35 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-25 13:37:36 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-25 13:37:36 [DEBUG] clck_gen.py:102 IND CLOCK 17646
2024-10-25 13:37:37 [DEBUG] clck_gen.py:102 IND CLOCK 17748
2024-10-25 13:37:37 [DEBUG] clck_gen.py:102 IND CLOCK 17850
2024-10-25 13:37:38 [DEBUG] clck_gen.py:102 IND CLOCK 17952
2024-10-25 13:37:38 [DEBUG] clck_gen.py:102 IND CLOCK 18054
2024-10-25 13:37:39 [DEBUG] clck_gen.py:102 IND CLOCK 18156
2024-10-25 13:37:39 [DEBUG] clck_gen.py:102 IND CLOCK 18258
2024-10-25 13:37:40 [DEBUG] clck_gen.py:102 IND CLOCK 18360
2024-10-25 13:37:40 [DEBUG] clck_gen.py:102 IND CLOCK 18462
2024-10-25 13:37:41 [DEBUG] clck_gen.py:102 IND CLOCK 18564
2024-10-25 13:37:41 [DEBUG] clck_gen.py:102 IND CLOCK 18666
2024-10-25 13:37:42 [DEBUG] clck_gen.py:102 IND CLOCK 18768
2024-10-25 13:37:42 [DEBUG] clck_gen.py:102 IND CLOCK 18870
2024-10-25 13:37:43 [DEBUG] clck_gen.py:102 IND CLOCK 18972
2024-10-25 13:37:43 [DEBUG] clck_gen.py:102 IND CLOCK 19074
2024-10-25 13:37:44 [DEBUG] clck_gen.py:102 IND CLOCK 19176
2024-10-25 13:37:44 [DEBUG] clck_gen.py:102 IND CLOCK 19278
2024-10-25 13:37:45 [DEBUG] clck_gen.py:102 IND CLOCK 19380
2024-10-25 13:37:45 [DEBUG] clck_gen.py:102 IND CLOCK 19482
2024-10-25 13:37:45 [DEBUG] clck_gen.py:102 IND CLOCK 19584
2024-10-25 13:37:46 [DEBUG] clck_gen.py:102 IND CLOCK 19686
2024-10-25 13:37:46 [DEBUG] clck_gen.py:102 IND CLOCK 19788
2024-10-25 13:37:47 [DEBUG] clck_gen.py:102 IND CLOCK 19890
2024-10-25 13:37:47 [DEBUG] clck_gen.py:102 IND CLOCK 19992
2024-10-25 13:37:48 [DEBUG] clck_gen.py:102 IND CLOCK 20094
2024-10-25 13:37:48 [DEBUG] clck_gen.py:102 IND CLOCK 20196
2024-10-25 13:37:49 [DEBUG] clck_gen.py:102 IND CLOCK 20298
2024-10-25 13:37:49 [DEBUG] clck_gen.py:102 IND CLOCK 20400
2024-10-25 13:37:50 [DEBUG] clck_gen.py:102 IND CLOCK 20502
2024-10-25 13:37:50 [DEBUG] clck_gen.py:102 IND CLOCK 20604
2024-10-25 13:37:51 [DEBUG] clck_gen.py:102 IND CLOCK 20706
2024-10-25 13:37:51 [DEBUG] clck_gen.py:102 IND CLOCK 20808
2024-10-25 13:37:52 [DEBUG] clck_gen.py:102 IND CLOCK 20910
2024-10-25 13:37:52 [DEBUG] clck_gen.py:102 IND CLOCK 21012
2024-10-25 13:37:53 [DEBUG] clck_gen.py:102 IND CLOCK 21114
2024-10-25 13:37:53 [DEBUG] clck_gen.py:102 IND CLOCK 21216
2024-10-25 13:37:54 [DEBUG] clck_gen.py:102 IND CLOCK 21318
2024-10-25 13:37:54 [DEBUG] clck_gen.py:102 IND CLOCK 21420
2024-10-25 13:37:54 [DEBUG] clck_gen.py:102 IND CLOCK 21522
2024-10-25 13:37:55 [DEBUG] clck_gen.py:102 IND CLOCK 21624
2024-10-25 13:37:55 [DEBUG] clck_gen.py:102 IND CLOCK 21726
2024-10-25 13:37:56 [DEBUG] clck_gen.py:102 IND CLOCK 21828
2024-10-25 13:37:56 [DEBUG] clck_gen.py:102 IND CLOCK 21930
2024-10-25 13:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:37:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:37:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:37:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:37:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:37:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:37:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:37:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:37:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:37:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:37:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:37:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:37:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:37:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:37:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:37:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:37:57 [DEBUG] clck_gen.py:102 IND CLOCK 22032
2024-10-25 13:37:57 [DEBUG] clck_gen.py:102 IND CLOCK 22134
2024-10-25 13:37:58 [DEBUG] clck_gen.py:102 IND CLOCK 22236
2024-10-25 13:37:58 [DEBUG] clck_gen.py:102 IND CLOCK 22338
2024-10-25 13:37:59 [DEBUG] clck_gen.py:102 IND CLOCK 22440
2024-10-25 13:37:59 [DEBUG] clck_gen.py:102 IND CLOCK 22542
2024-10-25 13:38:00 [DEBUG] clck_gen.py:102 IND CLOCK 22644
2024-10-25 13:38:00 [DEBUG] clck_gen.py:102 IND CLOCK 22746
2024-10-25 13:38:01 [DEBUG] clck_gen.py:102 IND CLOCK 22848
2024-10-25 13:38:01 [DEBUG] clck_gen.py:102 IND CLOCK 22950
2024-10-25 13:38:02 [DEBUG] clck_gen.py:102 IND CLOCK 23052
2024-10-25 13:38:02 [DEBUG] clck_gen.py:102 IND CLOCK 23154
2024-10-25 13:38:03 [DEBUG] clck_gen.py:102 IND CLOCK 23256
2024-10-25 13:38:03 [DEBUG] clck_gen.py:102 IND CLOCK 23358
2024-10-25 13:38:04 [DEBUG] clck_gen.py:102 IND CLOCK 23460
2024-10-25 13:38:04 [DEBUG] clck_gen.py:102 IND CLOCK 23562
2024-10-25 13:38:04 [DEBUG] clck_gen.py:102 IND CLOCK 23664
2024-10-25 13:38:05 [DEBUG] clck_gen.py:102 IND CLOCK 23766
2024-10-25 13:38:05 [DEBUG] clck_gen.py:102 IND CLOCK 23868
2024-10-25 13:38:06 [DEBUG] clck_gen.py:102 IND CLOCK 23970
2024-10-25 13:38:06 [DEBUG] clck_gen.py:102 IND CLOCK 24072
2024-10-25 13:38:07 [DEBUG] clck_gen.py:102 IND CLOCK 24174
2024-10-25 13:38:07 [DEBUG] clck_gen.py:102 IND CLOCK 24276
2024-10-25 13:38:08 [DEBUG] clck_gen.py:102 IND CLOCK 24378
2024-10-25 13:38:08 [DEBUG] clck_gen.py:102 IND CLOCK 24480
2024-10-25 13:38:09 [DEBUG] clck_gen.py:102 IND CLOCK 24582
2024-10-25 13:38:09 [DEBUG] clck_gen.py:102 IND CLOCK 24684
2024-10-25 13:38:10 [DEBUG] clck_gen.py:102 IND CLOCK 24786
2024-10-25 13:38:10 [DEBUG] clck_gen.py:102 IND CLOCK 24888
2024-10-25 13:38:11 [DEBUG] clck_gen.py:102 IND CLOCK 24990
2024-10-25 13:38:11 [DEBUG] clck_gen.py:102 IND CLOCK 25092
2024-10-25 13:38:12 [DEBUG] clck_gen.py:102 IND CLOCK 25194
2024-10-25 13:38:12 [DEBUG] clck_gen.py:102 IND CLOCK 25296
2024-10-25 13:38:13 [DEBUG] clck_gen.py:102 IND CLOCK 25398
2024-10-25 13:38:13 [DEBUG] clck_gen.py:102 IND CLOCK 25500
2024-10-25 13:38:13 [DEBUG] clck_gen.py:102 IND CLOCK 25602
2024-10-25 13:38:14 [DEBUG] clck_gen.py:102 IND CLOCK 25704
2024-10-25 13:38:14 [DEBUG] clck_gen.py:102 IND CLOCK 25806
2024-10-25 13:38:15 [DEBUG] clck_gen.py:102 IND CLOCK 25908
2024-10-25 13:38:15 [DEBUG] clck_gen.py:102 IND CLOCK 26010
2024-10-25 13:38:16 [DEBUG] clck_gen.py:102 IND CLOCK 26112
2024-10-25 13:38:16 [DEBUG] clck_gen.py:102 IND CLOCK 26214
2024-10-25 13:38:17 [DEBUG] clck_gen.py:102 IND CLOCK 26316
2024-10-25 13:38:17 [DEBUG] clck_gen.py:102 IND CLOCK 26418
2024-10-25 13:38:18 [DEBUG] clck_gen.py:102 IND CLOCK 26520
2024-10-25 13:38:18 [DEBUG] clck_gen.py:102 IND CLOCK 26622
2024-10-25 13:38:19 [DEBUG] clck_gen.py:102 IND CLOCK 26724
2024-10-25 13:38:19 [DEBUG] clck_gen.py:102 IND CLOCK 26826
2024-10-25 13:38:20 [DEBUG] clck_gen.py:102 IND CLOCK 26928
2024-10-25 13:38:20 [DEBUG] clck_gen.py:102 IND CLOCK 27030
2024-10-25 13:38:21 [DEBUG] clck_gen.py:102 IND CLOCK 27132
2024-10-25 13:38:21 [DEBUG] clck_gen.py:102 IND CLOCK 27234
2024-10-25 13:38:22 [DEBUG] clck_gen.py:102 IND CLOCK 27336
2024-10-25 13:38:22 [DEBUG] clck_gen.py:102 IND CLOCK 27438
2024-10-25 13:38:23 [DEBUG] clck_gen.py:102 IND CLOCK 27540
2024-10-25 13:38:23 [DEBUG] clck_gen.py:102 IND CLOCK 27642
2024-10-25 13:38:23 [DEBUG] clck_gen.py:102 IND CLOCK 27744
2024-10-25 13:38:24 [DEBUG] clck_gen.py:102 IND CLOCK 27846
2024-10-25 13:38:24 [DEBUG] clck_gen.py:102 IND CLOCK 27948
2024-10-25 13:38:25 [DEBUG] clck_gen.py:102 IND CLOCK 28050
2024-10-25 13:38:25 [DEBUG] clck_gen.py:102 IND CLOCK 28152
2024-10-25 13:38:26 [DEBUG] clck_gen.py:102 IND CLOCK 28254
2024-10-25 13:38:26 [DEBUG] clck_gen.py:102 IND CLOCK 28356
2024-10-25 13:38:27 [DEBUG] clck_gen.py:102 IND CLOCK 28458
2024-10-25 13:38:27 [DEBUG] clck_gen.py:102 IND CLOCK 28560
2024-10-25 13:38:28 [DEBUG] clck_gen.py:102 IND CLOCK 28662
2024-10-25 13:38:28 [DEBUG] clck_gen.py:102 IND CLOCK 28764
2024-10-25 13:38:29 [DEBUG] clck_gen.py:102 IND CLOCK 28866
2024-10-25 13:38:29 [DEBUG] clck_gen.py:102 IND CLOCK 28968
2024-10-25 13:38:30 [DEBUG] clck_gen.py:102 IND CLOCK 29070
2024-10-25 13:38:30 [DEBUG] clck_gen.py:102 IND CLOCK 29172
2024-10-25 13:38:31 [DEBUG] clck_gen.py:102 IND CLOCK 29274
2024-10-25 13:38:31 [DEBUG] clck_gen.py:102 IND CLOCK 29376
2024-10-25 13:38:32 [DEBUG] clck_gen.py:102 IND CLOCK 29478
2024-10-25 13:38:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:38:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:38:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:38:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:38:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:38:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:38:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:38:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:38:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:38:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:38:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:38:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:38:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:38:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:38:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:38:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:38:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:38:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:38:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:38:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:38:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:38:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:38:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:38:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:38:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:38:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:38:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:38:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:38:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:38:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:38:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:38:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:38:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:38:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:38:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:38:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:38:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:38:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:38:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:38:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:38:42 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:38:42 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:38:42 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:38:42 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:38:42 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:38:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:38:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:38:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:38:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:38:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:38:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:38:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:38:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:38:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:38:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:38:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:38:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:38:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:38:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:38:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:38:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:38:43 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:38:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:38:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:38:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:38:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:38:43 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:38:44 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:38:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:38:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:38:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:38:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:38:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:38:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:38:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:38:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:38:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:38:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:38:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:38:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:38:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:38:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:38:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:38:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:38:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:38:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:38:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:38:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:38:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:38:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:38:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:38:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:38:44 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:38:45 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:38:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:38:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:38:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:38:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:38:45 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:38:46 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:38:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:38:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:38:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:38:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:38:46 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:38:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:38:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:38:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:38:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:38:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:38:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:38:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:38:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:38:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:38:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:38:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:38:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:38:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:38:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:38:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:38:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:38:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:38:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:38:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:38:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:38:47 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:38:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:38:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:38:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:38:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:38:47 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:38:48 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:38:48 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:38:49 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:38:49 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:38:49 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:38:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:38:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:38:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:38:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:38:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:38:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:38:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:38:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:38:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:38:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:38:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:38:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:38:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:38:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:38:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:38:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:38:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:38:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:38:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:38:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:38:50 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:38:50 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:38:51 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:38:51 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:38:52 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:38:52 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:38:53 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:38:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:38:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:38:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:38:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:38:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:38:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:38:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:38:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:38:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:38:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:38:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:38:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:38:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:38:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:38:53 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:38:53 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2417 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:38:53 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2417 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:38:53 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2417 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:38:53 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2417 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:38:53 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2417 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:38:53 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2417 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:38:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:38:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:38:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:38:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:38:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:38:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:38:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:38:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:38:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:38:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:38:58 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:38:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:38:58 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:38:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:38:59 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:38:59 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:38:59 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:38:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:38:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:38:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:38:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:38:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:38:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:38:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:38:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:38:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:38:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:38:59 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:38:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:38:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:38:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:38:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:39:00 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:39:00 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:39:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:39:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:39:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:39:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:39:01 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:39:01 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:39:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:39:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:39:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:39:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:39:01 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:39:02 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:39:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:39:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:39:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:39:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:39:02 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:39:03 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:39:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:39:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:39:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:39:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:39:03 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:39:04 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:39:04 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:39:05 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:39:05 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:39:06 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:39:06 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:39:07 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:39:07 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:39:08 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:39:08 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:39:09 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:39:09 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:39:10 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:39:10 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:39:10 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:39:11 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:39:11 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:39:12 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:39:12 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:39:13 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:39:13 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:39:14 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:39:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:39:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:39:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:39:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:39:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:39:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:39:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:39:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:39:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:39:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:39:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:39:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:39:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:39:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:39:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:39:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:39:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:39:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:39:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:39:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:39:14 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 13:39:15 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 13:39:15 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 13:39:16 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 13:39:16 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 13:39:17 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 13:39:17 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 13:39:18 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 13:39:18 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 13:39:19 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 13:39:19 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 13:39:20 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 13:39:20 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 13:39:20 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 13:39:21 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 13:39:21 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 13:39:22 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 13:39:22 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 13:39:23 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 13:39:23 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 13:39:24 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 13:39:24 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 13:39:25 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 13:39:25 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 13:39:26 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 13:39:26 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 13:39:27 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 13:39:27 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 13:39:28 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 13:39:28 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-25 13:39:28 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-25 13:39:29 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-25 13:39:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:39:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:39:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:39:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:39:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:39:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:39:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:39:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:39:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:39:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:39:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:39:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:39:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:39:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:39:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:39:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:39:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:39:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:39:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:39:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:39:29 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-25 13:39:30 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-25 13:39:30 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-25 13:39:31 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-25 13:39:31 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-25 13:39:32 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-25 13:39:32 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-25 13:39:33 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-25 13:39:33 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-25 13:39:34 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-25 13:39:34 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-25 13:39:35 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-25 13:39:35 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-25 13:39:36 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-25 13:39:36 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-25 13:39:37 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-25 13:39:37 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-25 13:39:38 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-25 13:39:38 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-25 13:39:38 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-25 13:39:39 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-25 13:39:39 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-25 13:39:40 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-25 13:39:40 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-25 13:39:41 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-25 13:39:41 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-25 13:39:42 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-25 13:39:42 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-25 13:39:43 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-25 13:39:43 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-25 13:39:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:39:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:39:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:39:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:39:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:39:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:39:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:39:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:39:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:39:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:39:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:39:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:39:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:39:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:39:44 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-25 13:39:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:39:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:39:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:39:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:39:44 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-25 13:39:45 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-25 13:39:45 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-25 13:39:46 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-25 13:39:46 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-25 13:39:47 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-25 13:39:47 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-25 13:39:47 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-25 13:39:48 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-25 13:39:48 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-25 13:39:49 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-25 13:39:49 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-25 13:39:50 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-25 13:39:50 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-25 13:39:51 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-25 13:39:51 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-25 13:39:52 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-25 13:39:52 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-25 13:39:53 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-25 13:39:53 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-25 13:39:54 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-25 13:39:54 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-25 13:39:55 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-25 13:39:55 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-25 13:39:56 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-25 13:39:56 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-25 13:39:57 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-25 13:39:57 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-25 13:39:57 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-25 13:39:58 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-25 13:39:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:39:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:39:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:39:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:39:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:39:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:39:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:39:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:39:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:39:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:39:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:39:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=12941 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:39:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:39:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:39:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:39:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=12941 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:39:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=12941 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:39:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=12941 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:39:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=12941 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:39:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=12941 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:39:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=12942 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:39:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=12942 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:39:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=12942 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:39:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=12942 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:39:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=12942 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:39:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=12942 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:39:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=12942 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:39:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=12942 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:40:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:40:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:40:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:40:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:40:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:40:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:40:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:40:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:40:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:40:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:40:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:40:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:40:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:40:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:40:04 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:40:04 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:40:04 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:40:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:40:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:40:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:40:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:40:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:40:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:40:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:40:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:40:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:40:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:40:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:40:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:40:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:40:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:40:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:40:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:40:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:40:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:40:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:40:05 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:40:05 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:40:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:40:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:40:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:40:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:40:06 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:40:06 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:40:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:40:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:40:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:40:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:40:07 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:40:07 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:40:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:40:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:40:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:40:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:40:08 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:40:08 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:40:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:40:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:40:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:40:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:40:09 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:40:09 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:40:10 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:40:10 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:40:11 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:40:11 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:40:11 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:40:12 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:40:12 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:40:13 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:40:13 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:40:14 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:40:14 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:40:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:40:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:40:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:40:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:40:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:40:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:40:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:40:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:40:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:40:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:40:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:40:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:40:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:40:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:40:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:40:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:40:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:15 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:40:15 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:40:16 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:40:16 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:40:17 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:40:17 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:40:18 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:40:18 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:40:19 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:40:19 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:40:20 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 13:40:20 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 13:40:20 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 13:40:21 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 13:40:21 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 13:40:22 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 13:40:22 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 13:40:23 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 13:40:23 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 13:40:24 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 13:40:24 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 13:40:25 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 13:40:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:40:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:40:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:40:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:40:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:40:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:40:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:40:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:40:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:40:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:40:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:40:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:40:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:40:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:40:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:40:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:40:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:25 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 13:40:26 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 13:40:26 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 13:40:27 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 13:40:27 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 13:40:28 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 13:40:28 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 13:40:29 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 13:40:29 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 13:40:30 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 13:40:30 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 13:40:30 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 13:40:31 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 13:40:31 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 13:40:32 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 13:40:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:40:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:40:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:40:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:40:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:40:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:40:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:40:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:40:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:40:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:40:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:40:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:40:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:40:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:40:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:40:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:40:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:32 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 13:40:33 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 13:40:33 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-25 13:40:34 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-25 13:40:34 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-25 13:40:35 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-25 13:40:35 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-25 13:40:36 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-25 13:40:36 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-25 13:40:37 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-25 13:40:37 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-25 13:40:38 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-25 13:40:38 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-25 13:40:39 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-25 13:40:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:40:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:40:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:40:39 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-25 13:40:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:40:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:40:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:40:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:40:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:40:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:40:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:40:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:40:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:40:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:40:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:40:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7654 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:40:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7654 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:40:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7654 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:40:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7654 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:40:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7654 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:40:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7654 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:40:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7654 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:40:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:40:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:40:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:40:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:40:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:40:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:40:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:40:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:40:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:40:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:40:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:40:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:40:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:40:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:40:45 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:40:45 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:40:45 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:40:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:40:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:40:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:40:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:40:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:40:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:40:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:40:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:46 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:40:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:40:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:40:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:40:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:46 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:40:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:40:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:40:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:40:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:46 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:40:47 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:40:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:40:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:40:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:40:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:40:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:40:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:40:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:40:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:40:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:40:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:40:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:40:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:40:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:40:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:40:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:40:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:40:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:40:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:40:47 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=687 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:40:47 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=687 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:40:47 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=687 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:40:47 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=687 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:40:47 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=687 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:40:47 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=687 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:40:47 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=687 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:40:47 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=687 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:40:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:40:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:40:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:40:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:40:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:40:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:40:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:40:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:40:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:40:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:40:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:40:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:40:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:40:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:40:53 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:40:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:40:53 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:40:53 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:40:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:40:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:40:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:40:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:40:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:40:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:40:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:40:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:40:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:40:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:40:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:40:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:40:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:40:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:53 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:40:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:40:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:40:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:40:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:40:54 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:40:54 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:40:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:40:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:40:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:40:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:40:55 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:40:55 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:40:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:40:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:40:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:40:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:40:56 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:40:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:40:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:40:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:40:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:40:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:40:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:40:56 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:40:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:40:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:40:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:40:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:40:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:40:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:40:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:40:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:40:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:40:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:40:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:40:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:40:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:40:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:40:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:40:57 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:40:57 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:40:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:40:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:40:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:40:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:40:58 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:40:58 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:40:58 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:40:59 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:40:59 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:41:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:41:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:41:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:41:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:41:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:41:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:41:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:41:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:41:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:41:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:41:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:00 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:41:00 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:41:01 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:41:01 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:41:02 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:41:02 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:41:03 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:41:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:41:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:41:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:41:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:41:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:41:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:41:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:41:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:41:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:41:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:41:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:03 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:41:04 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:41:04 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:41:05 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:41:05 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:41:06 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:41:06 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:41:07 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:41:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:41:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:41:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:41:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:41:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:41:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:41:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:41:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:41:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:41:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:41:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:41:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:41:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3132 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:41:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3132 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:41:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3132 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:41:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3132 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:41:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3132 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:41:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3132 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:41:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:41:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:41:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:41:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:41:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:41:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:41:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:41:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:41:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:41:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:41:12 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:41:12 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:41:12 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:41:12 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:41:12 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:41:12 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:41:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:41:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:41:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:41:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:41:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:41:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:41:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:41:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:41:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:13 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:41:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:41:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:41:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:41:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:41:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:41:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:41:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:41:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:41:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:41:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:41:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:41:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:41:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:41:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:13 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:41:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:41:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:41:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:41:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:41:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:41:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:41:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:41:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:41:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:41:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:41:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:14 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:41:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:41:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:41:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:41:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:41:14 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:41:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:41:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:41:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:41:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:41:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:41:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:41:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:41:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:41:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:41:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:41:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:15 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:41:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:41:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:41:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:41:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:41:15 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:41:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:41:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:41:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:41:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:41:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:41:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:41:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:41:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:41:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:41:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:41:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:41:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:41:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=788 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:41:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=788 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:41:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=788 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:41:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=788 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:41:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=788 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:41:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=788 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:41:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=788 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:41:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=788 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:41:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:41:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:41:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:41:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:41:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:41:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:41:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:41:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:41:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:41:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:41:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:41:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:41:21 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:41:21 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:41:21 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:41:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:22 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:41:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:41:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:41:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:41:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:41:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:41:23 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:41:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:41:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:41:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:41:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:41:23 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:41:24 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:41:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:41:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:41:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:41:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:41:24 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:41:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:41:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:41:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:41:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:41:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:41:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:41:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:41:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:41:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:41:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:41:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:24 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:41:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:41:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:41:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:41:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:41:25 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:41:25 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:41:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:41:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:41:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:41:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:41:26 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:41:26 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:41:27 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:41:27 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:41:28 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:41:28 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:41:29 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:41:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:41:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:41:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:41:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:41:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:41:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:41:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:41:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:41:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:41:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:41:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:29 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:41:30 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:41:30 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:41:31 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:41:31 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:41:32 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:41:32 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:41:33 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:41:33 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:41:33 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:41:34 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:41:34 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:41:35 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:41:35 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:41:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:41:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:41:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:41:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:41:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:41:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:41:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:41:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:36 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:41:36 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:41:37 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 13:41:37 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 13:41:38 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 13:41:38 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 13:41:39 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 13:41:39 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 13:41:40 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 13:41:40 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 13:41:41 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 13:41:41 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 13:41:42 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 13:41:42 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 13:41:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:41:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:41:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:41:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:41:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:41:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:41:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:41:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:41:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:41:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:41:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:41:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:41:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:41:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:41:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:41:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:41:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:41:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:41:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:41:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:41:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:41:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:41:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:41:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:41:47 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:41:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:41:48 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:41:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:41:48 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:41:48 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:41:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:41:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:41:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:41:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:41:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:41:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:41:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:41:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:41:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:41:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:48 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:41:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:41:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:41:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:41:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:41:49 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:41:49 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:41:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:41:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:41:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:41:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:41:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:41:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:41:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:41:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:41:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:41:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:41:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:41:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:41:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:41:50 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:41:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:41:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:50 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:41:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:41:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:41:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:41:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:41:51 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:41:51 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:41:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:41:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:41:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:41:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:41:52 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:41:52 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:41:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:41:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:41:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:41:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:41:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:41:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:41:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:41:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:41:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:41:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:41:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:41:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:41:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:41:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:41:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:53 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:41:53 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:41:54 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:41:54 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:41:55 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:41:55 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:41:56 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:41:56 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:41:56 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:41:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:41:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:41:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:41:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:41:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:41:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:41:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:41:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:41:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:41:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:41:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:41:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:41:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:41:57 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:41:57 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:41:58 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:41:58 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:41:59 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:41:59 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:42:00 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:42:00 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:42:01 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:42:01 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:42:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:42:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:42:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:42:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:42:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:42:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:42:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:42:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:42:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:42:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:42:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:42:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:42:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2980 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:42:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:42:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2980 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2980 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2980 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:01 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2980 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:42:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:42:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:42:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:42:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:42:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:42:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:42:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:42:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:42:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:42:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:42:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:42:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:42:07 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:42:07 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:42:07 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:42:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:07 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:42:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:42:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:42:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:42:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:42:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:08 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:42:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:42:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:42:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:42:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:42:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:42:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:42:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:42:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:42:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:42:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:42:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:42:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=401 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=401 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=401 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=401 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=401 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=401 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=401 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=401 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:42:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:42:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:42:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:42:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:42:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:42:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:42:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:42:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:42:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:42:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:42:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:42:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:42:14 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:42:14 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:42:14 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:42:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:42:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:42:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:42:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:42:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:42:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:15 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:42:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:42:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:42:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:42:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:42:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:42:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:42:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:42:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=401 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:42:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:42:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:42:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=401 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=401 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=401 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=401 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=401 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=401 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=401 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:42:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:42:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:42:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:42:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:42:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:42:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:42:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:42:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:42:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:42:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:42:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:42:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:42:21 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:42:21 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:42:21 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:42:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:42:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:42:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:42:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:42:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:42:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:42:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:42:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:42:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:42:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:42:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:42:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:42:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:42:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:42:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:42:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:42:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:42:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:42:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:42:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:42:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:42:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:42:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:42:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:42:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:42:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:42:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:42:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:42:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:42:28 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:42:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:28 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:42:28 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:42:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:28 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:42:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:42:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:42:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:42:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:42:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:28 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:42:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:42:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:42:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:42:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:42:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:42:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:42:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:42:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:42:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:42:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:42:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=398 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=398 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=398 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=398 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=398 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=398 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=398 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:42:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:42:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:42:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:42:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:42:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:42:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:42:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:42:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:42:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:42:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:42:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:42:34 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:42:34 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:42:34 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:42:34 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:35 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:42:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:42:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:42:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:42:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:35 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:42:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:42:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:42:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:42:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:42:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:42:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:42:36 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:42:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:42:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:42:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:42:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:42:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:42:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:42:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:42:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:42:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:42:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:42:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:42:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:42:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:42:41 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:42:41 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:42:41 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:42:41 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:41 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:42 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:42:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:42:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:42:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:42:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:42 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:42:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:42:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:42:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:42:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:42:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:42:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:42:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:42:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:42:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:42:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:42:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:42:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:42:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:42:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:42:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:42:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:42:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:42:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:42:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:42:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:42:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:42:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:42:48 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:42:48 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:42:48 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:49 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:42:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:42:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:42:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:42:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:49 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:42:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:42:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:42:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:42:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:42:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:42:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:42:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:42:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:42:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:42:50 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=400 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:42:50 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=400 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:50 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=400 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:50 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=400 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:50 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=400 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:50 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=400 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:50 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=400 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:50 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=400 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:42:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:42:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:42:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:42:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:42:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:42:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:42:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:42:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:42:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:42:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:42:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:42:55 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:42:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:42:55 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:42:55 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:55 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:42:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:42:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:42:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:43:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:43:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:43:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:43:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:43:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:43:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:43:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:43:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:43:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:43:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:43:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:43:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:43:01 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:43:01 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:43:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:43:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:43:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:43:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:43:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:43:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:43:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:43:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:43:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:43:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:43:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:43:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:43:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:43:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:43:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:43:06 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:43:06 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:06 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:43:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:43:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:43:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:43:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=135 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:43:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:43:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=135 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:43:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=135 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:43:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=135 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:43:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=135 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:43:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=135 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:43:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=135 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:43:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=135 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:43:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:43:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:43:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:43:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:43:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:43:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:43:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:43:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:43:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:43:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:43:12 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:12 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:43:12 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:43:12 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:43:12 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:43:12 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:43:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:43:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:43:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:43:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:43:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:43:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:43:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:43:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:43:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:43:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:43:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:43:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:43:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:43:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:43:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:43:18 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:43:18 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:43:18 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:43:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:43:18 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:43:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:43:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=129 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:43:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=129 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:43:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:43:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:43:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:43:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:43:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:43:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:43:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:43:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:43:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:43:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:43:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:43:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:43:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:43:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:43:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:43:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:43:23 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:43:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:43:23 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:43:23 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:43:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:43:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:43:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:43:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:43:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:43:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:43:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:43:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:43:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:43:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:43:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:43:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:43:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:43:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:43:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:43:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:43:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:43:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:43:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:43:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:43:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:43:29 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:43:29 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:43:29 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:43:29 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:43:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:43:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:43:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:43:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:43:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:43:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:43:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:43:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:43:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:43:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:43:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:43:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:43:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:43:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:43:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:43:35 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:43:35 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:43:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:35 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:43:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:43:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:43:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:43:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:43:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:43:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:43:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:43:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:43:35 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:43:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:43:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:43:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:43:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:43:36 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:43:36 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:43:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:43:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:43:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:43:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:43:37 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:43:37 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:43:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:43:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:43:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:43:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:43:38 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:43:38 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:43:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:43:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:43:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:43:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:43:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:43:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:43:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:43:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:43:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:43:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:43:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:43:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:43:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:43:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=854 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:43:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=854 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:43:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=854 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:43:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:43:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:43:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:43:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:43:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=855 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:43:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=855 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:43:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=855 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:43:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=855 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:43:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=855 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:43:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=855 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:43:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=855 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:43:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=855 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:43:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:43:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:43:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:43:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:43:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:43:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:43:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:43:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:43:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:43:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:43:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:43:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:43:44 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:43:44 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:44 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:43:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:43:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:43:44 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:43:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:43:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:43:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:43:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:43:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:43:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:43:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:43:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:43:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:43:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:43:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:43:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:43:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:43:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:43:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:43:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:43:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:43:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:43:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:43:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:43:50 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:43:50 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:43:50 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:43:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:43:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:43:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:43:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:43:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:43:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:43:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:43:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:43:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:43:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:43:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:43:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:43:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:43:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:43:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:43:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:43:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:43:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:43:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:43:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:43:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:43:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:43:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:43:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:43:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:43:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:43:51 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:43:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:43:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:43:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:43:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:43:52 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:43:52 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:43:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:43:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:43:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:43:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:43:53 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:43:53 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:43:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:43:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:43:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:43:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:43:54 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:43:54 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:43:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:43:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:43:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:43:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:43:55 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:43:55 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:43:56 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:43:56 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:43:57 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:43:57 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:43:58 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:43:58 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:43:58 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:43:59 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:43:59 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:44:00 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:44:00 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:44:01 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:44:01 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:44:02 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:44:02 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:44:03 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:44:03 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:44:04 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:44:04 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:44:05 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:44:05 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:44:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:44:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:44:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:44:05 [WARNING] transceiver.py:250 (MS@172.18.96.22:6700) RX TRXD message (fn=3432 tn=6 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:44:05 [WARNING] transceiver.py:250 (MS@172.18.96.22:6700) RX TRXD message (fn=3432 tn=7 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:44:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:44:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:44:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:44:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:44:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:44:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:44:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:44:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:44:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:44:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:44:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:44:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:44:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:44:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:44:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:44:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:44:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:44:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3440 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:44:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:44:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:44:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:44:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3440 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:44:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3440 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:44:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3440 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:44:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3440 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:44:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3440 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:44:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3441 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:44:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3441 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:44:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3441 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:44:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3441 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:44:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3441 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:44:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3441 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:44:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3441 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:44:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3441 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:44:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:44:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:44:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:44:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:44:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:44:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:44:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:44:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:44:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:44:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:44:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:44:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:44:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:44:11 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:44:11 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:44:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:44:11 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:44:11 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:44:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:44:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:44:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:44:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:44:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:44:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:44:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:44:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:44:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:44:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:44:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:44:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:44:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:44:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:44:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:44:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:44:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:44:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:44:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:44:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:44:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:44:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:44:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:44:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:44:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:44:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:44:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:44:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:44:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:44:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:44:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:44:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:44:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:44:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:44:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:44:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:44:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:44:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:44:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=197 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:44:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=197 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:44:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=197 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:44:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=197 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:44:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=197 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:44:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=197 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:44:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=197 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:44:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=197 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:44:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:44:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:44:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:44:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:44:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:44:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:44:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:44:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:44:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:44:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:44:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:44:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:44:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:44:17 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:44:17 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:44:17 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:44:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:44:17 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:44:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:44:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:44:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:44:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:44:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:44:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:44:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:44:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:44:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:44:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:44:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:44:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:44:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:44:17 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:44:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:44:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:44:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:44:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:44:18 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:44:18 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:44:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:44:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:44:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:44:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:44:19 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:44:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:44:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:44:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:44:19 [WARNING] transceiver.py:250 (MS@172.18.96.22:6700) RX TRXD message (fn=554 tn=0 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:44:19 [WARNING] transceiver.py:250 (MS@172.18.96.22:6700) RX TRXD message (fn=554 tn=1 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:44:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:44:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:44:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:44:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:44:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:44:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:44:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:44:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:44:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:44:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:44:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:44:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:44:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:44:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:44:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:44:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:44:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:44:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:44:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:44:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:44:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=566 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:44:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=566 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:44:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=566 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:44:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=566 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:44:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=566 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:44:19 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=566 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:44:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:44:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:44:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:44:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:44:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:44:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:44:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:44:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:44:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:44:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:44:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:44:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:44:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:44:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:44:29 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.96.20:5700'
2024-10-25 13:44:29 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.96.20:5802)
2024-10-25 13:44:29 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.96.20:5801)
2024-10-25 13:44:29 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.96.22:6700'
2024-10-25 13:44:29 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.96.22:6802)
2024-10-25 13:44:29 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.96.22:6801)
2024-10-25 13:44:29 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.96.20:5700/1'
2024-10-25 13:44:29 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.96.20:5804)
2024-10-25 13:44:29 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.96.20:5803)
2024-10-25 13:44:29 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.96.20:5700/2'
2024-10-25 13:44:29 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.96.20:5806)
2024-10-25 13:44:29 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.96.20:5805)
2024-10-25 13:44:29 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.96.20:5700/3'
2024-10-25 13:44:29 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.96.20:5808)
2024-10-25 13:44:29 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.96.20:5807)
2024-10-25 13:44:29 [INFO] fake_trx.py:423 Init complete
2024-10-25 13:44:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:44:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:44:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:44:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:44:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:44:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:44:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:44:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:44:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:44:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:44:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:44:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:44:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:44:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:44:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:44:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:44:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:44:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:44:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:44:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:44:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:44:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:44:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:44:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:44:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:44:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:44:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:44:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:44:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:44:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:44:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:44:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:44:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:44:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:44:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:44:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:44:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:44:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:44:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:44:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:45:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:45:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:45:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:45:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:45:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:45:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:45:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:45:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:45:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:45:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:45:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:45:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:45:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:45:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:45:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:45:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:45:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:45:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:45:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:45:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:45:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:45:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:45:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:45:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:45:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:45:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:45:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:45:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:45:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:45:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:45:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:45:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:45:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:45:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:45:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:45:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:45:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:45:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:45:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:45:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:45:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:45:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:45:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:45:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:45:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:45:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:45:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:45:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:45:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:45:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:45:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:45:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:45:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:45:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:45:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:45:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:45:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:45:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:45:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:45:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:45:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:45:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:45:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:45:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:45:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:45:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:45:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:45:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:45:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:45:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:45:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:45:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:45:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:45:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:45:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:45:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:45:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:45:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:45:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:45:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:45:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 0 -> 1
2024-10-25 13:45:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:45:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 0 -> 1
2024-10-25 13:45:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:45:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 0 -> 1
2024-10-25 13:45:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:45:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:45:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:45:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 0 -> 1
2024-10-25 13:45:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:45:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:45:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:45:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:45:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:45:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:45:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:45:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:45:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:45:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:45:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:45:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:45:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:45:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:45:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:45:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:45:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:45:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:45:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:45:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:45:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:45:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:45:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:45:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:45:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:45:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:45:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:45:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:45:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:45:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:45:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:45:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:45:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:45:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:45:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:45:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:45:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:45:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:45:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:45:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:45:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:45:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:45:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:45:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:45:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:45:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:45:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:45:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:45:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:45:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:45:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:45:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:45:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:45:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:45:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:45:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:45:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:45:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:46:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:46:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:46:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:46:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:46:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:46:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:46:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:46:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:46:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:46:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:46:09 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.96.20:5700'
2024-10-25 13:46:09 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.96.20:5802)
2024-10-25 13:46:09 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.96.20:5801)
2024-10-25 13:46:09 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.96.22:6700'
2024-10-25 13:46:09 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.96.22:6802)
2024-10-25 13:46:09 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.96.22:6801)
2024-10-25 13:46:09 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.96.20:5700/1'
2024-10-25 13:46:09 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.96.20:5804)
2024-10-25 13:46:09 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.96.20:5803)
2024-10-25 13:46:09 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.96.20:5700/2'
2024-10-25 13:46:09 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.96.20:5806)
2024-10-25 13:46:09 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.96.20:5805)
2024-10-25 13:46:09 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.96.20:5700/3'
2024-10-25 13:46:09 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.96.20:5808)
2024-10-25 13:46:09 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.96.20:5807)
2024-10-25 13:46:09 [INFO] fake_trx.py:423 Init complete
2024-10-25 13:46:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:46:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:46:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:46:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:46:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:46:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:46:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:46:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 0 -> 1
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:46:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:46:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 0 -> 1
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:46:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:46:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 0 -> 1
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:46:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:46:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 0 -> 1
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:46:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:46:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:46:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:46:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:14 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:46:14 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:46:14 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:46:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:46:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:46:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:46:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:46:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:46:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:46:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:46:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:46:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:46:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:46:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:46:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:46:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:46:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:46:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:46:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:46:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:46:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:15 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:46:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:46:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:46:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:46:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:46:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:46:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:46:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:46:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:46:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:46:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:46:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:46:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:46:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:46:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:46:16 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:46:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:46:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:46:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:46:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:46:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:46:16 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:46:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:46:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:46:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:46:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:46:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:46:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:17 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:46:17 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:46:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:46:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:46:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:46:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:46:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:46:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:46:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:46:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:46:17 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:46:17 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-25 13:46:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:18 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:46:18 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:46:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:18 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:46:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:46:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:46:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:46:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:46:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:18 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:46:18 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-25 13:46:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:19 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:19 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:46:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:46:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:46:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:46:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:46:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:19 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:46:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:46:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:20 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:46:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:46:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:46:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:46:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:46:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:20 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:46:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:46:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:46:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:20 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:46:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:46:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:46:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:46:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:46:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:21 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:46:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:46:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:46:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:21 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:46:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:46:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:46:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:46:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:46:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:22 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:46:22 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:46:22 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 13:46:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:22 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:23 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:46:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:23 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:46:23 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:23 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:46:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:46:23 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:46:23 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:23 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:46:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:46:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:24 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:46:24 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:46:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:24 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:46:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:24 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:46:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:46:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:46:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:46:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:46:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:24 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:46:24 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:46:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:24 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:46:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:24 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:46:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:46:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:46:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:46:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:46:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:25 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:46:25 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:46:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:25 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:46:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:25 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:46:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:46:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:46:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:46:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:46:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:25 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:46:25 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:46:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:25 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:46:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:46:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:46:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:46:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:46:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:25 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:46:25 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:46:25 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:46:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:26 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:46:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:46:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:46:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:46:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:46:26 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:46:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:26 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:46:26 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:46:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:26 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:46:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:46:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:46:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:46:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:46:26 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:46:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:26 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:46:26 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:46:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:27 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:46:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:46:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:46:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:46:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:46:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:46:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:46:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:46:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:46:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:46:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:46:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:46:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2856 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:46:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2856 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:46:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2856 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:46:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2856 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:46:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2856 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:46:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2856 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:46:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2856 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:46:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:46:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:46:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:46:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:46:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:46:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:46:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:46:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:46:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:46:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:46:32 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:32 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:46:32 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:46:32 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:46:32 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
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2024-10-25 13:46:33 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:46:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
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2024-10-25 13:46:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:46:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:46:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:46:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:46:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
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2024-10-25 13:46:34 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
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2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
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2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
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2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:46:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:46:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:46:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:46:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=506 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:46:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=506 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:46:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=506 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:46:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=506 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:46:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=506 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:46:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=506 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:46:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:46:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:46:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:46:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:46:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:46:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:46:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:46:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:46:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:46:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:46:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:46:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:46:40 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:46:40 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:46:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:40 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:46:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:46:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:46:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:46:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:46:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:46:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:46:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:46:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:46:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=127 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:46:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:46:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:46:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:46:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=127 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:46:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=127 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:46:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=127 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:46:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=127 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:46:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=127 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:46:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:46:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:46:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:46:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:46:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:46:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:46:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:46:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:46:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:46:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:46:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:45 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:46:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:46:45 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:45 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:46:45 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:46:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:46:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:46:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:46:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:46:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:46:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=119 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:46:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=119 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:46:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=119 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:46:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=119 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:46:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=119 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:46:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=119 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:46:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=119 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:46:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=119 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:46:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:46:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:46:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:46:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:46:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:46:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:46:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:46:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:46:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:46:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:46:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:46:51 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:46:51 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:46:51 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:46:51 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:46:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:46:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:46:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:46:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:46:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:46:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:46:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:46:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:46:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:46:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:46:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:46:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:46:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:46:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:46:56 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:46:56 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:46:56 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:46:56 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:46:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:46:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:46:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:46:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:46:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:46:57 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:46:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:46:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:46:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:46:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:46:57 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:46:58 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:46:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:46:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:46:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:46:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:46:58 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:46:59 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:46:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:46:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:46:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:46:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:46:59 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:47:00 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:47:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:47:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:47:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:47:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:47:00 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:47:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:47:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:47:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:47:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:47:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:47:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:47:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:47:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:47:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:47:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:01 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:47:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:47:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:47:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:47:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:01 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:47:02 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:47:02 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:47:03 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:47:03 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:47:04 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:47:04 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:47:05 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:47:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:47:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:47:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:47:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:47:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:47:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:47:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:47:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:47:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:47:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:05 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:47:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:47:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:47:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:06 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:47:06 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:47:06 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:47:07 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:47:07 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:47:08 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:47:08 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:47:09 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:47:09 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:47:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:47:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:47:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:47:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:47:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:47:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:47:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:47:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:47:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:47:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:47:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:47:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:10 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:47:10 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:47:11 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:47:11 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:47:12 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:47:12 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 13:47:13 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 13:47:13 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 13:47:14 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 13:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:47:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:47:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:47:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:47:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:47:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:47:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:47:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:47:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:47:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:47:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:14 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 13:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:15 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 13:47:15 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 13:47:16 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 13:47:16 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 13:47:16 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 13:47:17 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 13:47:17 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 13:47:18 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 13:47:18 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 13:47:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:47:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:47:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:47:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:47:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:47:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:47:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:47:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:47:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:47:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:18 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:47:18 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-25 13:47:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:19 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 13:47:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:19 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 13:47:20 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 13:47:20 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 13:47:21 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 13:47:21 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 13:47:22 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 13:47:22 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 13:47:23 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 13:47:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:47:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:47:23 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:47:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:47:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:47:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:47:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:47:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:47:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:47:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:47:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:47:23 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-25 13:47:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:23 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 13:47:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:24 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 13:47:24 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 13:47:25 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 13:47:25 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 13:47:26 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 13:47:26 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-25 13:47:26 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-25 13:47:27 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-25 13:47:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:47:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:47:27 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:47:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:47:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:47:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:47:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:47:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:47:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:47:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:47:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:47:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:47:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:47:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:27 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-25 13:47:28 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-25 13:47:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:28 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-25 13:47:29 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-25 13:47:29 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-25 13:47:30 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-25 13:47:30 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-25 13:47:31 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-25 13:47:31 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-25 13:47:32 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-25 13:47:32 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-25 13:47:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:47:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:47:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:47:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:47:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:47:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:47:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:47:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:47:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:47:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:47:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:47:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:33 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-25 13:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:33 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-25 13:47:34 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-25 13:47:34 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-25 13:47:35 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-25 13:47:35 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-25 13:47:35 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-25 13:47:36 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-25 13:47:36 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-25 13:47:37 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-25 13:47:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:47:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:47:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:47:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:47:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:47:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:47:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:47:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:47:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:47:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:47:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:47:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:47:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:37 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-25 13:47:38 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-25 13:47:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:38 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-25 13:47:39 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-25 13:47:39 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-25 13:47:40 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-25 13:47:40 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-25 13:47:41 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-25 13:47:41 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-25 13:47:42 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-25 13:47:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:47:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:47:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:47:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:47:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:47:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:47:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:47:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:47:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:47:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:42 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:47:42 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 13:47:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:42 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-25 13:47:43 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-25 13:47:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:43 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-25 13:47:44 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-25 13:47:44 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-25 13:47:44 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-25 13:47:45 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-25 13:47:45 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-25 13:47:46 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-25 13:47:46 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-25 13:47:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:47:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:47:47 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:47:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:47:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:47:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:47:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:47:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:47:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:47:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:47:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:47 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:47:47 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 13:47:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:47 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-25 13:47:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:47 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-25 13:47:48 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-25 13:47:48 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-25 13:47:49 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-25 13:47:49 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-25 13:47:50 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-25 13:47:50 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-25 13:47:51 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-25 13:47:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:47:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:47:51 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:47:51 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-25 13:47:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:47:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:47:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:47:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:47:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:47:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:47:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:47:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:51 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:47:51 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:47:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:52 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-25 13:47:52 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-25 13:47:53 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-25 13:47:53 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-25 13:47:54 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-25 13:47:54 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-25 13:47:54 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-25 13:47:55 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-25 13:47:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:47:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:47:55 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:47:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:47:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:47:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:47:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:47:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:47:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:47:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:47:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:55 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:47:55 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:47:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:47:55 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-25 13:47:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:47:56 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-25 13:47:56 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-25 13:47:57 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-25 13:47:57 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-25 13:47:58 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-25 13:47:58 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-25 13:47:59 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-25 13:47:59 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-25 13:48:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:00 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:48:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:00 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:48:00 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:48:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:00 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-25 13:48:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:00 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-25 13:48:01 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-25 13:48:01 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-25 13:48:02 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-25 13:48:02 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-25 13:48:03 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-25 13:48:03 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-25 13:48:03 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-25 13:48:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:04 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:48:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:04 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:48:04 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:48:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:04 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-25 13:48:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:04 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-25 13:48:05 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-25 13:48:05 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-25 13:48:06 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-25 13:48:06 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-25 13:48:07 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-25 13:48:07 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-25 13:48:08 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-25 13:48:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:08 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:48:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:08 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-25 13:48:08 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:48:08 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:48:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:09 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-25 13:48:09 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-25 13:48:10 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-25 13:48:10 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-25 13:48:11 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-25 13:48:11 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-25 13:48:12 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-25 13:48:12 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-25 13:48:12 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-25 13:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:13 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:48:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:13 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:48:13 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:48:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:13 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-25 13:48:13 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-25 13:48:14 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-25 13:48:14 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-25 13:48:15 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-25 13:48:15 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-25 13:48:16 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-25 13:48:16 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-25 13:48:17 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-25 13:48:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:17 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:48:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:17 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:48:17 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:48:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:17 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-25 13:48:18 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-25 13:48:18 [DEBUG] clck_gen.py:102 IND CLOCK 17646
2024-10-25 13:48:19 [DEBUG] clck_gen.py:102 IND CLOCK 17748
2024-10-25 13:48:19 [DEBUG] clck_gen.py:102 IND CLOCK 17850
2024-10-25 13:48:20 [DEBUG] clck_gen.py:102 IND CLOCK 17952
2024-10-25 13:48:20 [DEBUG] clck_gen.py:102 IND CLOCK 18054
2024-10-25 13:48:21 [DEBUG] clck_gen.py:102 IND CLOCK 18156
2024-10-25 13:48:21 [DEBUG] clck_gen.py:102 IND CLOCK 18258
2024-10-25 13:48:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:21 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:48:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:21 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:48:21 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:48:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:21 [DEBUG] clck_gen.py:102 IND CLOCK 18360
2024-10-25 13:48:22 [DEBUG] clck_gen.py:102 IND CLOCK 18462
2024-10-25 13:48:22 [DEBUG] clck_gen.py:102 IND CLOCK 18564
2024-10-25 13:48:23 [DEBUG] clck_gen.py:102 IND CLOCK 18666
2024-10-25 13:48:23 [DEBUG] clck_gen.py:102 IND CLOCK 18768
2024-10-25 13:48:24 [DEBUG] clck_gen.py:102 IND CLOCK 18870
2024-10-25 13:48:24 [DEBUG] clck_gen.py:102 IND CLOCK 18972
2024-10-25 13:48:25 [DEBUG] clck_gen.py:102 IND CLOCK 19074
2024-10-25 13:48:25 [DEBUG] clck_gen.py:102 IND CLOCK 19176
2024-10-25 13:48:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:25 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:48:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:48:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:48:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:48:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:48:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:48:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:48:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:48:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:48:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:48:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=19214 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:48:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:48:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:48:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=19214 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:48:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:48:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:48:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:48:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:48:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:48:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:48:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:48:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:48:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:48:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:48:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:48:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:48:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:48:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:48:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:48:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:48:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:48:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:48:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:48:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:48:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:48:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:48:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:48:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:48:36 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:48:36 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:48:36 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:48:36 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:36 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:37 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:37 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:48:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:48:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:48:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:48:38 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:48:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:38 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:48:38 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-25 13:48:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:38 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:48:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:38 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:48:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:48:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:48:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:48:39 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:48:39 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-25 13:48:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:48:39 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:48:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:39 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:48:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:48:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:39 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:40 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:40 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:48:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:48:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:48:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:48:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:48:41 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:48:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:41 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:48:41 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 13:48:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:41 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:42 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:48:42 [WARNING] transceiver.py:250 (MS@172.18.96.22:6700) RX TRXD message (fn=1287 tn=7 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:48:42 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:42 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:42 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:48:42 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:42 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:42 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:48:42 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:43 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:48:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:43 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:48:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:43 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:48:43 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:48:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:43 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:48:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:43 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:48:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:43 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:48:43 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:48:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:44 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:48:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:44 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:48:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:44 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:48:44 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:48:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:44 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:48:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:44 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:48:44 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:48:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:44 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:48:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:44 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:45 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:48:45 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:45 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:45 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:48:45 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:45 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:48:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:48:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:48:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:48:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:48:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:48:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:48:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:48:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:48:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:48:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:48:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:48:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:48:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:48:51 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:48:51 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:48:51 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:51 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:48:51 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:51 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:48:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:48:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:48:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:48:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:48:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:52 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:48:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:52 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:48:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:48:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:48:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:48:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:48:53 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:48:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:53 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:48:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:48:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:48:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:48:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:54 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:54 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:48:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:48:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:48:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:48:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:48:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:55 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:48:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:55 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:48:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:48:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:48:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:48:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:48:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:56 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:48:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:56 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:48:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:57 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:48:57 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:48:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:58 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:48:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:58 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:48:58 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-25 13:48:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:58 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:48:59 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:59 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:59 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:48:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:48:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:48:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:48:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:48:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:48:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:48:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:48:59 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:48:59 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-25 13:48:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:48:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:00 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:49:00 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:49:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:00 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:49:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:01 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:49:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:49:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:49:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:49:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:49:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:49:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:49:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:49:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:49:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:01 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:49:01 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:49:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:02 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:49:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:49:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:49:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:49:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:49:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:49:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:49:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:49:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:02 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:49:03 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:49:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:03 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:49:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:04 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:49:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:49:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:49:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:49:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:49:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:49:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:04 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:49:05 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:05 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:49:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:06 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:49:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:49:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:49:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:49:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:49:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:49:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:06 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:49:06 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 13:49:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:06 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:49:07 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 13:49:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:07 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 13:49:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:07 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:49:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:49:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:49:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:49:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:49:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:49:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:07 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:49:07 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 13:49:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:08 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 13:49:08 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 13:49:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:08 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 13:49:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:09 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:49:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:49:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:49:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:49:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:49:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:49:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:09 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:49:09 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:49:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:09 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 13:49:09 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 13:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:10 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 13:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:10 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:49:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:49:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:49:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:49:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:49:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:10 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:49:10 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:49:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:10 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 13:49:11 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 13:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:11 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 13:49:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:12 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:49:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:49:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:49:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:49:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:49:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:12 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:49:12 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:12 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 13:49:12 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 13:49:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:13 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 13:49:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:13 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:49:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:49:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:49:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:49:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:49:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:49:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:13 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:49:13 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:49:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:13 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 13:49:14 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 13:49:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:14 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 13:49:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:14 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:49:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:49:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:49:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:49:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:49:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:49:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:14 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:49:14 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:49:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:15 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 13:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:15 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 13:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:16 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:49:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:49:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:49:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:49:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:49:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:49:16 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 13:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:16 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:49:16 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:49:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:16 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 13:49:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:17 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 13:49:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:17 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:49:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:49:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:49:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:49:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:49:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:49:17 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 13:49:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:17 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:49:17 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:49:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:18 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 13:49:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:18 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 13:49:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:18 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:49:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:49:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:49:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:49:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:49:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:49:18 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 13:49:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:18 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:49:18 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:49:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:19 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 13:49:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:19 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 13:49:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:20 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:49:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:49:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:49:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:49:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:49:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:49:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:49:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:49:20 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:49:20 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6324 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:49:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:49:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:49:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:49:20 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6324 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:49:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:49:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:49:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:49:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:49:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:49:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:49:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:49:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:49:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:49:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:49:25 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:49:25 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:49:25 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:49:25 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:49:25 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:49:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:49:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:49:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:49:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:49:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:26 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:49:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:49:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:49:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:49:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:49:26 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:49:27 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:49:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:49:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:49:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:49:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:49:27 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:49:28 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:49:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:49:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:49:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:49:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:49:28 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:49:29 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:49:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:49:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:49:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:49:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:49:29 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:49:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:49:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:49:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:49:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:49:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:49:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:49:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:49:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:30 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:49:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:49:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:49:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:49:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:49:30 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:49:31 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:49:31 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:49:32 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:49:32 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:49:33 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:49:33 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:49:33 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:49:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:49:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:49:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:49:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:49:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:49:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:49:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:49:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:34 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:49:34 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:49:35 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:49:35 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:49:36 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:49:36 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:49:37 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:49:37 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:49:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:49:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:49:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:49:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:49:38 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:49:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:49:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:49:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:38 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:49:39 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:49:39 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:49:40 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:49:40 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:49:41 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:49:41 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 13:49:41 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 13:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:42 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 13:49:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:49:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:49:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:49:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:49:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:49:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:49:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:42 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 13:49:43 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 13:49:43 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 13:49:44 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 13:49:44 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 13:49:45 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 13:49:45 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 13:49:46 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 13:49:46 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 13:49:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:49:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:49:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:49:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:49:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:49:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:47 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:49:47 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-25 13:49:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:47 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 13:49:47 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 13:49:48 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 13:49:48 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 13:49:49 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 13:49:49 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 13:49:49 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 13:49:50 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 13:49:50 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 13:49:51 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 13:49:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:51 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:49:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:49:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:49:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:49:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:49:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:49:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:51 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:49:51 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-25 13:49:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:51 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 13:49:52 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 13:49:52 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 13:49:53 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 13:49:53 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 13:49:54 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 13:49:54 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 13:49:55 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-25 13:49:55 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-25 13:49:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:55 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:49:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:49:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:49:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:49:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:49:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:49:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:49:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:49:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:49:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:49:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:49:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:49:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:49:56 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-25 13:49:56 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-25 13:49:57 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-25 13:49:57 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-25 13:49:57 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-25 13:49:58 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-25 13:49:58 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-25 13:49:59 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-25 13:49:59 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-25 13:50:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:50:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:50:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:50:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:50:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:50:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:50:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:50:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:50:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:50:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:50:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:50:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:50:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:50:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:00 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-25 13:50:00 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-25 13:50:01 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-25 13:50:01 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-25 13:50:02 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-25 13:50:02 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-25 13:50:03 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-25 13:50:03 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-25 13:50:04 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-25 13:50:04 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-25 13:50:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:50:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:50:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:50:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:50:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:50:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:50:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:50:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:50:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:50:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:50:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:50:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:50:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:50:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:50:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:05 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-25 13:50:05 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-25 13:50:05 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-25 13:50:06 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-25 13:50:06 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-25 13:50:07 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-25 13:50:07 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-25 13:50:08 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-25 13:50:08 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-25 13:50:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:50:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:50:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:50:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:50:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:50:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:50:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:50:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:50:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:50:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:50:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:50:08 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:50:08 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 13:50:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:09 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-25 13:50:09 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-25 13:50:10 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-25 13:50:10 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-25 13:50:11 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-25 13:50:11 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-25 13:50:12 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-25 13:50:12 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-25 13:50:12 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-25 13:50:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:50:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:50:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:50:13 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:50:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:50:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:50:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:50:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:50:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:50:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:50:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:50:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:50:13 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:50:13 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 13:50:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:13 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-25 13:50:13 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-25 13:50:14 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-25 13:50:14 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-25 13:50:15 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-25 13:50:15 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-25 13:50:16 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-25 13:50:16 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-25 13:50:17 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-25 13:50:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:50:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:50:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:50:17 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:50:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:50:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:50:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:50:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:50:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:50:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:50:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:50:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:50:17 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:50:17 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:50:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:17 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-25 13:50:18 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-25 13:50:18 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-25 13:50:19 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-25 13:50:19 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-25 13:50:20 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-25 13:50:20 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-25 13:50:20 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-25 13:50:21 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-25 13:50:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:50:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:50:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:50:21 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:50:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:50:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:50:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:50:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:50:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:50:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:50:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:50:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:50:21 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:50:21 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:50:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:21 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-25 13:50:22 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-25 13:50:22 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-25 13:50:23 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-25 13:50:23 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-25 13:50:24 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-25 13:50:24 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-25 13:50:25 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-25 13:50:25 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-25 13:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:50:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:50:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:50:25 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:50:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:50:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:50:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:50:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:50:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:50:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:50:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:50:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:50:25 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:50:25 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:50:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:26 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-25 13:50:26 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-25 13:50:27 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-25 13:50:27 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-25 13:50:28 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-25 13:50:28 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-25 13:50:29 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-25 13:50:29 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-25 13:50:29 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-25 13:50:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:50:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:50:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:50:30 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:50:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:50:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:50:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:50:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:50:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:50:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:50:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:50:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:50:30 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:50:30 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:50:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:30 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-25 13:50:30 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-25 13:50:31 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-25 13:50:31 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-25 13:50:32 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-25 13:50:32 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-25 13:50:33 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-25 13:50:33 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-25 13:50:34 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-25 13:50:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:50:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:50:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:50:34 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:50:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:50:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:50:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:50:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:50:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:50:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:50:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:50:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:50:34 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:50:34 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:50:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:34 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-25 13:50:35 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-25 13:50:35 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-25 13:50:36 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-25 13:50:36 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-25 13:50:37 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-25 13:50:37 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-25 13:50:38 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-25 13:50:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:50:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:50:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:50:38 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:50:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:50:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:50:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:50:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:50:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:50:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:50:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:50:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:50:38 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:50:38 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:50:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:38 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-25 13:50:38 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-25 13:50:39 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-25 13:50:39 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-25 13:50:40 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-25 13:50:40 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-25 13:50:41 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-25 13:50:41 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-25 13:50:42 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-25 13:50:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:50:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:50:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:50:42 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:50:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:50:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:50:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:50:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:50:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:50:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:50:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:50:42 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-25 13:50:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:50:42 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:50:42 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:50:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:43 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-25 13:50:43 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-25 13:50:44 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-25 13:50:44 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-25 13:50:45 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-25 13:50:45 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-25 13:50:46 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-25 13:50:46 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-25 13:50:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:50:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:50:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:50:46 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:50:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:50:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:50:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:50:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:50:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:50:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:50:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:50:47 [DEBUG] clck_gen.py:102 IND CLOCK 17646
2024-10-25 13:50:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:50:47 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:50:47 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:50:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:47 [DEBUG] clck_gen.py:102 IND CLOCK 17748
2024-10-25 13:50:48 [DEBUG] clck_gen.py:102 IND CLOCK 17850
2024-10-25 13:50:48 [DEBUG] clck_gen.py:102 IND CLOCK 17952
2024-10-25 13:50:48 [DEBUG] clck_gen.py:102 IND CLOCK 18054
2024-10-25 13:50:49 [DEBUG] clck_gen.py:102 IND CLOCK 18156
2024-10-25 13:50:49 [DEBUG] clck_gen.py:102 IND CLOCK 18258
2024-10-25 13:50:50 [DEBUG] clck_gen.py:102 IND CLOCK 18360
2024-10-25 13:50:50 [DEBUG] clck_gen.py:102 IND CLOCK 18462
2024-10-25 13:50:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:50:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:50:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:50:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:50:51 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:50:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:50:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:50:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:50:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:50:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:50:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:50:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:50:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:50:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:50:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:50:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:50:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=18564 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:50:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=18564 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:50:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=18564 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:50:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=18564 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:50:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=18564 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:50:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=18564 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:50:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=18564 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:50:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=18565 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:50:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=18565 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:50:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=18565 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:50:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=18565 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:50:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=18565 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:50:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=18565 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:50:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=18565 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:50:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=18565 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:50:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:50:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:50:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:50:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:50:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:50:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:50:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:50:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:50:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:50:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:50:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:50:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:50:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:50:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:51:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:51:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:51:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:51:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:51:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:51:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:51:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:51:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:51:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:51:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:51:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:51:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:51:01 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:51:01 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:51:01 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:51:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:51:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:02 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:51:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:51:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:51:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:51:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:51:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:51:03 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:51:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:51:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:51:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:51:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:51:03 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:51:04 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:51:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:51:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:51:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:51:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:51:04 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:51:05 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:51:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:51:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:51:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:51:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:51:05 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:51:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:51:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:51:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:51:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:51:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:51:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:51:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:51:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:51:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:51:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:51:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:51:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:51:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:51:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:06 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:51:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:51:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:51:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:51:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:51:06 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:51:07 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:51:07 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:51:07 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:51:08 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:51:08 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:51:09 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:51:09 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:51:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:51:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:51:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:51:10 [WARNING] transceiver.py:250 (MS@172.18.96.22:6700) RX TRXD message (fn=1919 tn=7 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:51:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:51:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:51:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:51:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:51:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:51:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:51:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:51:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:51:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:51:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:51:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:10 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:51:10 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:51:11 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:51:11 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:51:12 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:51:12 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:51:13 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:51:13 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:51:14 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:51:14 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:51:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:51:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:51:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:51:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:51:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:51:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:51:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:51:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:51:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:51:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:51:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:51:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:51:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:51:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:15 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:51:15 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:51:16 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:51:16 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:51:17 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:51:17 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 13:51:17 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 13:51:18 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 13:51:18 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 13:51:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:51:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:51:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:51:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:51:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:51:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:51:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:51:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:51:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:51:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:51:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:51:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:51:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:51:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:19 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 13:51:19 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 13:51:20 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 13:51:20 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 13:51:21 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 13:51:21 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 13:51:22 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 13:51:22 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 13:51:23 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 13:51:23 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 13:51:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:51:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:51:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:51:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:51:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:51:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:51:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:51:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:51:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:51:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:51:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:51:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:51:23 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-25 13:51:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:24 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 13:51:24 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 13:51:25 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 13:51:25 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 13:51:26 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 13:51:26 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 13:51:27 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 13:51:27 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 13:51:27 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 13:51:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:51:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:51:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:51:28 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:51:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:51:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:51:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:51:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:51:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:51:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:51:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:51:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:51:28 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:51:28 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-25 13:51:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:28 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 13:51:28 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 13:51:29 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 13:51:29 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 13:51:30 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 13:51:30 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 13:51:31 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-25 13:51:31 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-25 13:51:32 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-25 13:51:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:51:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:51:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:51:32 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:51:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:51:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:51:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:51:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:51:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:51:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:51:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:51:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:51:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:51:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:51:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:51:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:32 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-25 13:51:33 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-25 13:51:33 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-25 13:51:34 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-25 13:51:34 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-25 13:51:35 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-25 13:51:35 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-25 13:51:36 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-25 13:51:36 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-25 13:51:36 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-25 13:51:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:51:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:51:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:51:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:51:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:51:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:51:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:51:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:51:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:51:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:51:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:51:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:51:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:51:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:37 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-25 13:51:37 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-25 13:51:38 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-25 13:51:38 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-25 13:51:39 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-25 13:51:39 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-25 13:51:40 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-25 13:51:40 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-25 13:51:41 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-25 13:51:41 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-25 13:51:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:51:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:51:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:51:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:51:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:51:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:51:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:51:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:51:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:51:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:51:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:51:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:51:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:51:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:51:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:42 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-25 13:51:42 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-25 13:51:43 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-25 13:51:43 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-25 13:51:44 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-25 13:51:44 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-25 13:51:45 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-25 13:51:45 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-25 13:51:45 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-25 13:51:46 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-25 13:51:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:51:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:51:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:51:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:51:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:51:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:51:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:51:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:51:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:51:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:51:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:51:46 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:51:46 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 13:51:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:46 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-25 13:51:47 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-25 13:51:47 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-25 13:51:48 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-25 13:51:48 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-25 13:51:49 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-25 13:51:49 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-25 13:51:50 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-25 13:51:50 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-25 13:51:51 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-25 13:51:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:51:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:51:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:51:51 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:51:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:51:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:51:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:51:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:51:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:51:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:51:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:51:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:51:51 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:51:51 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 13:51:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:51 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-25 13:51:52 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-25 13:51:52 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-25 13:51:53 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-25 13:51:53 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-25 13:51:54 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-25 13:51:54 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-25 13:51:54 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-25 13:51:55 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-25 13:51:55 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-25 13:51:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:51:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:51:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:51:56 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:51:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:51:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:51:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:51:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:51:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:51:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:51:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:51:56 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-25 13:51:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:51:56 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:51:56 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:51:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:51:56 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-25 13:51:57 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-25 13:51:57 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-25 13:51:58 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-25 13:51:58 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-25 13:51:59 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-25 13:51:59 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-25 13:52:00 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-25 13:52:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:00 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:52:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:52:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:52:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:52:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:52:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:52:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:00 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:52:00 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:52:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:00 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-25 13:52:01 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-25 13:52:01 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-25 13:52:02 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-25 13:52:02 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-25 13:52:03 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-25 13:52:03 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-25 13:52:03 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-25 13:52:04 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-25 13:52:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:04 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:52:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:52:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:52:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:52:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:52:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:52:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:04 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:52:04 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:52:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:04 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-25 13:52:05 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-25 13:52:05 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-25 13:52:06 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-25 13:52:06 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-25 13:52:07 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-25 13:52:07 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-25 13:52:08 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-25 13:52:08 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-25 13:52:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:09 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:52:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:52:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:52:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:52:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:52:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:52:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:09 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:52:09 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:52:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:09 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-25 13:52:09 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-25 13:52:10 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-25 13:52:10 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-25 13:52:11 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-25 13:52:11 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-25 13:52:12 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-25 13:52:12 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-25 13:52:13 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-25 13:52:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:13 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:52:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:52:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:52:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:52:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:52:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:52:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:13 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:52:13 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:52:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:13 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-25 13:52:14 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-25 13:52:14 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-25 13:52:14 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-25 13:52:15 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-25 13:52:15 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-25 13:52:16 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-25 13:52:16 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-25 13:52:17 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-25 13:52:17 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-25 13:52:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:17 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:52:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:52:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:52:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:52:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:52:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:52:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:17 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:52:17 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:52:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:18 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-25 13:52:18 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-25 13:52:19 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-25 13:52:19 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-25 13:52:20 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-25 13:52:20 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-25 13:52:21 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-25 13:52:21 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-25 13:52:22 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-25 13:52:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:22 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:52:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:52:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:52:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:52:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:52:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:52:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:22 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:52:22 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:52:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:22 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2024-10-25 13:52:23 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2024-10-25 13:52:23 [DEBUG] clck_gen.py:102 IND CLOCK 17646
2024-10-25 13:52:23 [DEBUG] clck_gen.py:102 IND CLOCK 17748
2024-10-25 13:52:24 [DEBUG] clck_gen.py:102 IND CLOCK 17850
2024-10-25 13:52:24 [DEBUG] clck_gen.py:102 IND CLOCK 17952
2024-10-25 13:52:25 [DEBUG] clck_gen.py:102 IND CLOCK 18054
2024-10-25 13:52:25 [DEBUG] clck_gen.py:102 IND CLOCK 18156
2024-10-25 13:52:26 [DEBUG] clck_gen.py:102 IND CLOCK 18258
2024-10-25 13:52:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:26 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:52:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:52:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:52:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:52:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:52:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:52:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:26 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:52:26 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:52:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:26 [DEBUG] clck_gen.py:102 IND CLOCK 18360
2024-10-25 13:52:27 [DEBUG] clck_gen.py:102 IND CLOCK 18462
2024-10-25 13:52:27 [DEBUG] clck_gen.py:102 IND CLOCK 18564
2024-10-25 13:52:28 [DEBUG] clck_gen.py:102 IND CLOCK 18666
2024-10-25 13:52:28 [DEBUG] clck_gen.py:102 IND CLOCK 18768
2024-10-25 13:52:29 [DEBUG] clck_gen.py:102 IND CLOCK 18870
2024-10-25 13:52:29 [DEBUG] clck_gen.py:102 IND CLOCK 18972
2024-10-25 13:52:30 [DEBUG] clck_gen.py:102 IND CLOCK 19074
2024-10-25 13:52:30 [DEBUG] clck_gen.py:102 IND CLOCK 19176
2024-10-25 13:52:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:30 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:52:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:52:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:52:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:52:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:52:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:52:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:52:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:52:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:52:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:52:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:52:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:52:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:52:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:52:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:52:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:52:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:52:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:52:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:52:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:52:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:52:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:52:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:52:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:52:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:52:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:52:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:52:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:52:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:52:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:52:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:52:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:52:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:52:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:52:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:52:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:52:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:52:41 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:52:41 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:52:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:41 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:52:41 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:52:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:52:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:52:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:52:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:52:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:52:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:52:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:52:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:41 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:52:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:52:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:52:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:52:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:52:42 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:52:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:52:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:52:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:52:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:52:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:52:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:52:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:52:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:42 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:52:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:52:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:52:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:52:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:52:43 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:52:43 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:52:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:52:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:52:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:52:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:52:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:52:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:52:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:52:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:52:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:52:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:52:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:52:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:44 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:52:44 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:52:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:52:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:52:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:52:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:52:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:52:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:52:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:52:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:52:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:52:45 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:52:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:52:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:52:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:45 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:52:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:52:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:52:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:52:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:52:46 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:52:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:52:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:52:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:52:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:52:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:52:46 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:52:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:52:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:52:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:46 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:52:47 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:52:47 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:52:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:52:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:52:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:52:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:52:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:52:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:48 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:52:48 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-25 13:52:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:48 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:52:48 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:52:49 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:52:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:49 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:52:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:52:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:52:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:52:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:52:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:52:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:49 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:52:49 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-25 13:52:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:49 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:52:50 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:52:50 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:52:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:51 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:52:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:52:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:52:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:52:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:52:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:52:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:52:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:52:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:52:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:51 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:52:51 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:52:52 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:52:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:52:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:52:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:52:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:52:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:52:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:52:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:52:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:52 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:52:53 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:52:53 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:52:54 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:52:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:52:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:52:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:52:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:52:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:52:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:52:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:52:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:52:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:54 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:52:54 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:52:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:52:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:52:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:52:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:52:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:52:55 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:52:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:55 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:52:55 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 13:52:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:55 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:52:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:56 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:52:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:52:56 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:52:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:52:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:52:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:52:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:52:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:56 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:52:56 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 13:52:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:56 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 13:52:57 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 13:52:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:57 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:52:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:52:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:52:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:52:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:52:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:52:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:57 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:52:57 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:52:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:57 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 13:52:58 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 13:52:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:58 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:52:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:52:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:52:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:52:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:52:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:52:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:58 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:52:58 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:52:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:58 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 13:52:59 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 13:52:59 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 13:52:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:59 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:52:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:52:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:52:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:52:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:52:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:52:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:52:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:52:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:52:59 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:52:59 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:52:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:52:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:00 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 13:53:00 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 13:53:01 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 13:53:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:53:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:53:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:53:01 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:53:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:53:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:53:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:53:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:53:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:53:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:53:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:53:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:53:01 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:53:01 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:53:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:01 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 13:53:02 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 13:53:02 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 13:53:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:53:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:53:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:53:02 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:53:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:53:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:53:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:53:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:53:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:53:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:53:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:53:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:53:02 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:53:02 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:53:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:02 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 13:53:03 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 13:53:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:53:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:53:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:53:03 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:53:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:53:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:53:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:53:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:53:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:53:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:53:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:53:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:53:03 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:53:03 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:53:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:03 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 13:53:04 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 13:53:04 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 13:53:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:53:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:53:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:53:05 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:53:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:53:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:53:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:53:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:53:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:53:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:53:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:53:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:53:05 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 13:53:05 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:53:05 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:53:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:05 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 13:53:06 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 13:53:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:53:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:53:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:53:06 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:53:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:53:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:53:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:53:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:53:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:53:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:53:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:53:06 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 13:53:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:53:06 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:53:06 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:53:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:07 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 13:53:07 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 13:53:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:53:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:53:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:53:08 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:53:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:53:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:53:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:53:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:53:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:53:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:53:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:53:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:53:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5916 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:53:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:53:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:53:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:53:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5916 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:53:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5916 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:53:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5916 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:53:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5916 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:53:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5916 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:53:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5916 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:53:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5916 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:53:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5917 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:53:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5917 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:53:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5917 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:53:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5917 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:53:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5917 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:53:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5917 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:53:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5917 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:53:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5917 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:53:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:53:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:53:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:53:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:53:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:53:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:53:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:53:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:53:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:53:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:53:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:53:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:53:13 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:53:13 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:53:13 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:53:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:53:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:53:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:53:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:53:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:53:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:53:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:53:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:53:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:53:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:53:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:53:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:53:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:53:16 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:53:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:53:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:53:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:53:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:53:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:53:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:53:16 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:53:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:53:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:53:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:53:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:53:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:53:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:53:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:53:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:53:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:53:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:53:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:53:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:53:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:53:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:53:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:53:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:53:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:17 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:53:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:53:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:53:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:53:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:53:18 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:53:18 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:53:19 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:53:19 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:53:20 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:53:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:53:20 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:53:21 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:53:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:53:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:53:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:53:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:53:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:53:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:53:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:53:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:53:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:53:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:53:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:53:21 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:53:21 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 13:53:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:21 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:53:22 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:53:22 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:53:23 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:53:23 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:53:24 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:53:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:53:24 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:53:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:53:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:53:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:53:24 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:53:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:53:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:53:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:53:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:53:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:53:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:53:25 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:53:25 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 13:53:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:25 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:53:25 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:53:25 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:53:26 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:53:26 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:53:27 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:53:27 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:53:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:53:28 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:53:28 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:53:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:53:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:53:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:53:28 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:53:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:53:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:53:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:53:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:53:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:53:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:53:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:53:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:53:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:53:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:53:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:29 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 13:53:29 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 13:53:30 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 13:53:30 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 13:53:31 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 13:53:31 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 13:53:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:53:32 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 13:53:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:53:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:53:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:53:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:53:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:53:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:53:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:53:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:53:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:53:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:53:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:53:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:32 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 13:53:33 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 13:53:33 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 13:53:33 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 13:53:34 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 13:53:34 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 13:53:35 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 13:53:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:53:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:53:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:53:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:53:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:53:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:53:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:53:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:53:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:53:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:53:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:53:35 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 13:53:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:53:35 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:53:35 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:53:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:36 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 13:53:36 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 13:53:37 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 13:53:37 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 13:53:38 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 13:53:38 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 13:53:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:53:39 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 13:53:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:53:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:53:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:53:39 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:53:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:53:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:53:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:53:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:53:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:53:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:53:39 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:53:39 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:53:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:39 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 13:53:40 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 13:53:40 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 13:53:41 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 13:53:41 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 13:53:41 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 13:53:42 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 13:53:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:53:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:53:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:53:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:53:42 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:53:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:53:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:53:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:53:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:53:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:53:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:53:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:53:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:53:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:53:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:53:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:53:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:53:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:53:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:53:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:53:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:53:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:53:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:53:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:53:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:53:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:53:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:53:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:53:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:53:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:53:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:53:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:53:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:53:53 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:53:53 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:53:53 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:53:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:53:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:53:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:53:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:53:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:53:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:53:54 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:53:55 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:53:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:53:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:53:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:53:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:53:55 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:53:56 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:53:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:53:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:53:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:53:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:53:56 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:53:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:53:56 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:53:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:53:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:53:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:53:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:53:57 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:53:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:53:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:53:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:53:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:53:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:53:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:53:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:53:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:53:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:53:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:53:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:53:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:53:57 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:53:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:53:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:53:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:53:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:53:58 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:53:58 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:53:59 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:53:59 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:54:00 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:54:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:54:00 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:54:01 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:54:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:54:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:54:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:54:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:54:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:54:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:54:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:54:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:54:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:54:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:54:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:54:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:01 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:54:02 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:54:02 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:54:03 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:54:03 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:54:04 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:54:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:54:04 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:54:05 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:54:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:54:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:54:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:54:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:54:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:54:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:54:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:54:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:54:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:54:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:54:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:54:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:05 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:54:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:54:05 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:54:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:54:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:54:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:54:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:54:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:54:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:54:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:54:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:54:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:54:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:54:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:54:06 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:54:06 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 13:54:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:06 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:54:06 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:54:07 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:54:07 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:54:08 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:54:08 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:54:09 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 13:54:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:54:09 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 13:54:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:54:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:54:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:54:09 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:54:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:54:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:54:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:54:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:54:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:54:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:54:09 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:54:09 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 13:54:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:10 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 13:54:10 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 13:54:11 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 13:54:11 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 13:54:12 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 13:54:12 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 13:54:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:54:13 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 13:54:13 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 13:54:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:54:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:54:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:54:13 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:54:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:54:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:54:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:54:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:54:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:54:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:54:13 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:54:13 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 13:54:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:13 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 13:54:14 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 13:54:14 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 13:54:15 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 13:54:15 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 13:54:16 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 13:54:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:54:16 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 13:54:17 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 13:54:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:54:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:54:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:54:17 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:54:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:54:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:54:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:54:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:54:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:54:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:54:17 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:54:17 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 13:54:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:17 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 13:54:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:54:18 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 13:54:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:54:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:54:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:54:18 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:54:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:54:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:54:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:54:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:54:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:54:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:54:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:54:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:54:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:54:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:54:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:18 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 13:54:19 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 13:54:19 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 13:54:20 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 13:54:20 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 13:54:21 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 13:54:21 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 13:54:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:54:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:54:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:54:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:54:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:54:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:54:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:54:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:54:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:54:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:54:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:54:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:54:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:21 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 13:54:22 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 13:54:22 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-25 13:54:23 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-25 13:54:23 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-25 13:54:24 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-25 13:54:24 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-25 13:54:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:54:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:54:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:54:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:54:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:54:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:54:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:54:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:54:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:54:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:54:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:54:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:54:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:25 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-25 13:54:25 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-25 13:54:26 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-25 13:54:26 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-25 13:54:27 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-25 13:54:27 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-25 13:54:28 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-25 13:54:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:54:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:54:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:54:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:54:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:54:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:54:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:54:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:54:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:54:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:54:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:54:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:54:28 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-25 13:54:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:54:29 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-25 13:54:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:54:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:54:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:54:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:54:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:54:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:54:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:54:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:54:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:54:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:54:29 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-25 13:54:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:54:29 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:54:29 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:54:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:30 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-25 13:54:30 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-25 13:54:30 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-25 13:54:31 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-25 13:54:31 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-25 13:54:32 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-25 13:54:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:54:32 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-25 13:54:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:54:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:54:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:54:33 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:54:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:54:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:54:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:54:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:54:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:54:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:54:33 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:54:33 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:54:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:33 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-25 13:54:33 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-25 13:54:34 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-25 13:54:34 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-25 13:54:35 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-25 13:54:35 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-25 13:54:36 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-25 13:54:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:54:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:54:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:54:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:54:36 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:54:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:54:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:54:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:54:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:54:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:54:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:54:36 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:54:36 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:54:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:36 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-25 13:54:37 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-25 13:54:37 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-25 13:54:38 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-25 13:54:38 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-25 13:54:38 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-25 13:54:39 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-25 13:54:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:54:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:54:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:54:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:54:39 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:54:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:54:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:54:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:54:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:54:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:54:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:54:39 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:54:39 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:54:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:39 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-25 13:54:40 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-25 13:54:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:54:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:54:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:54:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:54:40 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:54:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:54:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:54:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:54:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:54:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:54:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:54:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:54:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:54:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:54:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:54:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:54:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=10291 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:54:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=10291 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:54:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=10291 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:54:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=10291 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:54:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=10291 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:54:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=10291 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:54:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=10291 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:54:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:54:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:54:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:54:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:54:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:54:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:54:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:54:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:54:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:54:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:54:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:54:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:54:45 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:54:46 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:54:46 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:54:46 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:54:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:54:46 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:54:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:54:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:54:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:54:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:54:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:54:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:54:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:54:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:54:46 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:54:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:54:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:54:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:54:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:54:47 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:54:47 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:54:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:54:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:54:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:54:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:54:48 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:54:48 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:54:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:54:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:54:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:54:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:54:49 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:54:49 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:54:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:54:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:54:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:54:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:54:50 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:54:50 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:54:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:54:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:54:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:54:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:54:51 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:54:51 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:54:52 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:54:52 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:54:52 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:54:53 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:54:53 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:54:54 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:54:54 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:54:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:54:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:54:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:54:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:54:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:54:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:54:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:54:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:54:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:54:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:54:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:54:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:54:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:54:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2026 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:54:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2026 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:54:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2026 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:54:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2026 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:54:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2026 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:55:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:55:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:55:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:55:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:55:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:55:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:55:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:55:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:55:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:55:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:55:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:55:00 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:55:00 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:55:00 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:00 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:55:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:55:01 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:55:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:55:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:55:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:55:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:55:01 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:55:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:55:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:55:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:55:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:55:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:55:02 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:55:03 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:55:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:55:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:55:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:55:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:55:03 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:55:04 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:55:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:55:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:55:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:55:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:55:04 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:55:05 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:55:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:55:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:55:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:55:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:55:05 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:55:05 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:55:06 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:55:06 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:55:07 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:55:07 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:55:08 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:55:08 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:55:09 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:55:09 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:55:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:55:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:55:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:55:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:55:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:55:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:55:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:55:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:55:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2059 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:55:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:55:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:55:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2059 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2059 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2059 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2059 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2059 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2059 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2059 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:55:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:55:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:55:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:55:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:55:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:55:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:55:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:55:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:55:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:55:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:55:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:55:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:55:15 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:55:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:15 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:55:15 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:55:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:55:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:55:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:55:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:55:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:55:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:55:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:55:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:55:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:55:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:55:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:55:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:55:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:55:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:55:17 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:55:17 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:55:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:55:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:55:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:55:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:55:18 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:55:18 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:55:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:55:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:55:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:55:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:55:19 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:55:19 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:55:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:55:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:55:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:55:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:55:20 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:55:20 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:55:20 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:55:21 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:55:21 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:55:22 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:55:22 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:55:23 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:55:23 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:55:24 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:55:24 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:55:25 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:55:25 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:55:26 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:55:26 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:55:27 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:55:27 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:55:28 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:55:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:55:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:55:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:55:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:55:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:55:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:55:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:55:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:55:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:55:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:55:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:55:28 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2884 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:28 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2884 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:28 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2884 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:28 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2884 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:28 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2884 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:28 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2884 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:28 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2884 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:55:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:55:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:55:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:55:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:55:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:55:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:55:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:55:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:55:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:55:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:55:33 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:55:33 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:55:33 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:55:33 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:55:33 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:55:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:55:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:34 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:55:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:55:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:55:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:55:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:55:34 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:55:34 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:55:35 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:55:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:55:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:55:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:55:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:55:35 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:55:35 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:55:35 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:55:36 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:55:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:55:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:55:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:55:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:55:36 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:55:37 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:55:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:55:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:55:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:55:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:55:37 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:55:37 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:55:37 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:55:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:55:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:55:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:55:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:55:38 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:55:38 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:55:38 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:55:38 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:55:39 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:55:39 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:55:39 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:55:40 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:55:40 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:55:41 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:55:41 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:55:41 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:55:42 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:55:42 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:55:43 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:55:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:55:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:55:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:55:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:55:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:55:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:55:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:55:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:55:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2207 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:55:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:55:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:55:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2207 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:55:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:55:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:55:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:55:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:55:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:55:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:55:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:55:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:55:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:55:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:55:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:55:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:55:49 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:55:49 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:55:49 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:55:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:49 [WARNING] transceiver.py:250 (MS@172.18.96.22:6700) RX TRXD message (fn=140 tn=4 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:55:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:55:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:55:49 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:55:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:49 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:55:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:55:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:55:50 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:50 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:55:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:55:50 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:50 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:55:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:55:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:55:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:55:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:55:50 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:50 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:55:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:55:50 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:50 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:55:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:55:50 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:50 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:55:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:55:50 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:50 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:55:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:55:50 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:50 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:51 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:55:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:55:51 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:51 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:55:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:55:51 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:51 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:51 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:55:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:55:51 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:51 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:55:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:55:51 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:55:51 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:52 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:55:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:55:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:55:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:55:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:55:52 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:55:52 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:55:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:52 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:55:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:55:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:55:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:55:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:55:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:55:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:55:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:55:52 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:55:52 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=811 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:55:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:55:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:55:52 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=811 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:52 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=811 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:52 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=812 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:52 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=812 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:52 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=812 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:52 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=812 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:52 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=812 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:52 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=812 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:52 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=812 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:52 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=812 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:52 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=813 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:52 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=813 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:52 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=813 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:52 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=813 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:52 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=813 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:52 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=813 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:52 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=813 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:52 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=813 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:55:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:55:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:55:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:55:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:55:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:55:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:55:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:55:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:55:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:55:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:55:57 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:55:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:55:57 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:55:57 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:55:57 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:55:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:55:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:55:58 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:55:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:55:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:55:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:55:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:55:58 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:55:59 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:55:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:55:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:55:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:55:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:55:59 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:55:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:55:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:55:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:55:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:55:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:55:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:55:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:55:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:55:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:55:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:55:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:56:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:56:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:56:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:56:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:56:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:56:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:56:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:56:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:56:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:56:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:56:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:56:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:56:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:56:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:56:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:56:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:56:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:56:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:56:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:56:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:56:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:56:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:56:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:56:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:56:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:56:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:56:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:56:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:56:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:56:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:56:10 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:56:10 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:56:10 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:56:10 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:56:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:56:11 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:56:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:56:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:56:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:56:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:56:11 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:56:11 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:56:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:56:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:56:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:56:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:56:12 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:56:12 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:56:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:56:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:56:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:56:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:56:13 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:56:13 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:56:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:56:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:56:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:56:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:56:14 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:56:14 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:56:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:56:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:56:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:56:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:56:15 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:56:15 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:56:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:56:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:56:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:56:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:56:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:56:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:56:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:56:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:56:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:56:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:56:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:56:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1304 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:56:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1304 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:56:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1304 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:56:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1304 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:56:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1304 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:56:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1304 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:56:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1304 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:56:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:56:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:56:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:56:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:56:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:56:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:56:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:56:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:56:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:56:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:56:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:56:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:56:21 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:56:21 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:56:21 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:56:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:56:22 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:56:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:56:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:56:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:56:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:56:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:56:23 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:56:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:56:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:56:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:56:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:56:23 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:56:23 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:56:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:56:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:56:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:56:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:56:24 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:56:24 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:56:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:56:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:56:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:56:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:56:25 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:56:25 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:56:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:56:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:56:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:56:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:56:26 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:56:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:56:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:56:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:56:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:56:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:56:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:56:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:56:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:56:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1194 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:56:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:56:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:56:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:56:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:56:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:56:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:56:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:56:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:56:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:56:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:56:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:56:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:56:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:56:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:56:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:56:31 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:56:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:56:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:56:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:56:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:56:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:56:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:56:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:56:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:56:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:56:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:56:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:56:36 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:36 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:56:37 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:56:37 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:56:37 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:56:37 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:56:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:56:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:56:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:56:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:56:37 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:56:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:56:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:56:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:56:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:56:38 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:56:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:56:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:56:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:56:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:56:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:56:38 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:56:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:56:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:56:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:56:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:56:39 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:56:39 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:56:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:56:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:56:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:56:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:56:40 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:56:40 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:56:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:56:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:56:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:56:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:56:40 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:56:41 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:56:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:56:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:56:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:56:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:56:41 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:56:42 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:56:42 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:56:43 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:56:43 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:56:44 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:56:44 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:56:45 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:56:45 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:56:46 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:56:46 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:56:47 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:56:47 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:56:48 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:56:48 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:56:49 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:56:49 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:56:49 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:56:50 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:56:50 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:56:51 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:56:51 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:56:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:56:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:56:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:56:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:56:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:56:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:56:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:56:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:56:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:56:52 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:56:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:56:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:56:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:56:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:56:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:56:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:56:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:56:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:56:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:56:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:56:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:56:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:56:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:56:57 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:56:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:56:57 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:56:57 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:56:57 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:56:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:56:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:56:57 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:56:57 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:56:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:56:58 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:56:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:56:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:56:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:56:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:56:58 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:56:59 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:56:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:56:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:56:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:56:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:56:59 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:57:00 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:57:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:57:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:57:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:57:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:57:00 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:57:01 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:57:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:57:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:57:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:57:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:57:01 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:57:01 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:57:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:57:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:57:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:57:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:57:02 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:57:02 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:57:03 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:57:03 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:57:04 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:57:04 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:57:05 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:57:05 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:57:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:57:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:57:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:57:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:57:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:57:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:57:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:57:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:57:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:57:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:57:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:57:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:57:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:57:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:57:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:57:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1854 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:57:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1854 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:57:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1854 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:57:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1854 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:57:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1854 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:57:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1854 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:57:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:57:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:57:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:57:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:57:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:57:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:57:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:57:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:57:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:57:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:57:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:57:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:57:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:57:11 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:57:11 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:57:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:57:11 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:57:11 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:57:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:57:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:57:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:57:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:57:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:57:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:57:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:57:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:57:11 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:57:11 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:57:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:57:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:57:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:57:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:57:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:57:11 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:57:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:57:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:57:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:57:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:57:12 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:57:12 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:57:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:57:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:57:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:57:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:57:13 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:57:13 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:57:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:57:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:57:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:57:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:57:14 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:57:14 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:57:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:57:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:57:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:57:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:57:15 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:57:15 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:57:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:57:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:57:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:57:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:57:15 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:57:16 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:57:16 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:57:17 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:57:17 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:57:18 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:57:18 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:57:19 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:57:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:57:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:57:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:57:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:57:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:57:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:57:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:57:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:57:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:57:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:57:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:57:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:57:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:57:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:57:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:57:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:57:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:57:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:57:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:57:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:57:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:57:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:57:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:57:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:57:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:57:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:57:24 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:57:24 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:57:24 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:57:24 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:57:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:57:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:57:24 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:57:24 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:57:24 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:57:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:57:25 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:57:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:57:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:57:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:57:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:57:25 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:57:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:57:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:57:26 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:57:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:57:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:57:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:57:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:57:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:57:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:57:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:57:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:57:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:57:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:57:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:57:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=351 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:57:26 [WARNING] transceiver.py:250 (TRX1@172.18.96.20:5700/1) RX TRXD message (ver=1 fn=351 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:57:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=351 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:57:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=351 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:57:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=351 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:57:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=351 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:57:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=351 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:57:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=351 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:57:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=351 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:57:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:57:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:57:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:57:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:57:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:57:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:57:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:57:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:57:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:57:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:57:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:57:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:57:31 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:57:31 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:57:31 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:57:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:57:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:57:31 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:57:31 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:57:31 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:57:31 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:57:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:57:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:57:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:57:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:57:32 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:57:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:57:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:57:32 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:57:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:57:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:57:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:57:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:57:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:57:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:57:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:57:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:57:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:57:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:57:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:57:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=356 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:57:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=356 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:57:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=356 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:57:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=356 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:57:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=356 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:57:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=356 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:57:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=356 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:57:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=356 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:57:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:57:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:57:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:57:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:57:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:57:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:57:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:57:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:57:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:57:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:57:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:57:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:57:38 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:57:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:57:38 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:57:38 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:57:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:57:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:57:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:57:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:57:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:57:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:57:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:57:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:57:38 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:57:38 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:57:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:57:38 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:57:38 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 13:57:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:57:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:57:38 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:57:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:57:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:57:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:57:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:57:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:57:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:57:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:57:39 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:57:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:57:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:57:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:57:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:57:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:57:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:57:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:57:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:57:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:57:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:57:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:57:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:57:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:57:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:57:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:57:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:57:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:57:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:57:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:57:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:57:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:57:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:57:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:57:44 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:57:44 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:57:44 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:57:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:57:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:57:44 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:57:44 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:57:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:57:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:57:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:57:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:57:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:57:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:57:45 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:57:46 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:57:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:57:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:57:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:57:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:57:46 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:57:47 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:57:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:57:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:57:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:57:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:57:47 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:57:48 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:57:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:57:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:57:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:57:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:57:48 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:57:49 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:57:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:57:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:57:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:57:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:57:49 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:57:50 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:57:50 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:57:50 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:57:51 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:57:51 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:57:52 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:57:52 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:57:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:57:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:57:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:57:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:57:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:57:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:57:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:57:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:57:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:57:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:57:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:57:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:57:53 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:57:53 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:57:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:57:53 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:57:53 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-25 13:57:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:57:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:57:53 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:57:53 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:57:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:57:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:57:54 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:57:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:57:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:57:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:57:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:57:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:57:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:57:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:57:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:57:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:57:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:57:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:57:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:57:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:57:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:57:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:57:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:57:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:57:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:57:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:57:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:57:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:57:59 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:57:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:57:59 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:57:59 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:57:59 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:57:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:57:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:57:59 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:57:59 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:57:59 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:57:59 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:58:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:58:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:58:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:58:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:58:00 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:58:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:58:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:58:00 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:58:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:58:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:58:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:58:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:58:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:58:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:58:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:58:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:58:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:58:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:58:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:58:00 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=351 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:58:00 [WARNING] transceiver.py:250 (TRX1@172.18.96.20:5700/1) RX TRXD message (ver=1 fn=351 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:58:00 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=351 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:58:00 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=351 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:58:00 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=351 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:58:00 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=351 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:58:00 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=351 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:58:00 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=351 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:58:00 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=351 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:58:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:58:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:58:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:58:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:58:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:58:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:58:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:58:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:58:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:58:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:58:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:58:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:58:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:58:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:58:06 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:58:06 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:58:06 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:58:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:58:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:58:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:58:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:58:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:58:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:58:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:58:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:58:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:58:06 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:58:06 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:58:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:58:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:58:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:58:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:58:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:58:06 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:58:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:58:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:58:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:58:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:58:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:58:07 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:58:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:58:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:58:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:58:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:58:08 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:58:08 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:58:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:58:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:58:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:58:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:58:08 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:58:09 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:58:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:58:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:58:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:58:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:58:09 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:58:10 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:58:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:58:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:58:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:58:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:58:10 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:58:11 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:58:11 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:58:12 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:58:12 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:58:13 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:58:13 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:58:14 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:58:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:58:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:58:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:58:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:58:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:58:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:58:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:58:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:58:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:58:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:58:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:58:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:58:14 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:58:14 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:58:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:58:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:58:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:58:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:58:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:58:14 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:58:15 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:58:15 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:58:15 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 13:58:16 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 13:58:16 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 13:58:17 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 13:58:17 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 13:58:18 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 13:58:18 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 13:58:19 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 13:58:19 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 13:58:20 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 13:58:20 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 13:58:21 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 13:58:21 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 13:58:22 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 13:58:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:58:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:58:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:58:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:58:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:58:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:58:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:58:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:58:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:58:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:58:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:58:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:58:22 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:58:22 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:58:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:58:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:58:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:58:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:58:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:58:22 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 13:58:23 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 13:58:23 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 13:58:23 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 13:58:24 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 13:58:24 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 13:58:25 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 13:58:25 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 13:58:26 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 13:58:26 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 13:58:27 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 13:58:27 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 13:58:28 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 13:58:28 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 13:58:29 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 13:58:29 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 13:58:30 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 13:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:58:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:58:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:58:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:58:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:58:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:58:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:58:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:58:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:58:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:58:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:58:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:58:30 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:58:30 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:58:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:58:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:58:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:58:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:58:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:58:30 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 13:58:31 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 13:58:31 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 13:58:31 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 13:58:32 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 13:58:32 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 13:58:33 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 13:58:33 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 13:58:34 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 13:58:34 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 13:58:35 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-25 13:58:35 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-25 13:58:36 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-25 13:58:36 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-25 13:58:37 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-25 13:58:37 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-25 13:58:38 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-25 13:58:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:58:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:58:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:58:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:58:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:58:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:58:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:58:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:58:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:58:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:58:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:58:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:58:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:58:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:58:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:58:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7101 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:58:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7101 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:58:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7101 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:58:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7101 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:58:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7101 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:58:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7101 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:58:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:58:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:58:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:58:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:58:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:58:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:58:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:58:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:58:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:58:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:58:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:58:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:58:43 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:58:43 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:58:43 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:58:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:58:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:58:43 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:58:43 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:58:43 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:58:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:58:44 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:58:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:58:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:58:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:58:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:58:44 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:58:45 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:58:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:58:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:58:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:58:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:58:45 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:58:46 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:58:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:58:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:58:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:58:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:58:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:58:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:58:46 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:58:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:58:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:58:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:58:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:58:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:58:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:58:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:58:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:58:46 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:58:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:58:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:58:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:58:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:58:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:58:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:58:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:58:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:58:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:58:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:58:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:58:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:58:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:58:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:58:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:58:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:58:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:58:54 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:58:54 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:58:54 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:58:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:58:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:58:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:58:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:58:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:58:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:58:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:58:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:58:54 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:58:54 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:58:54 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:58:54 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 13:58:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:58:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:58:55 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:58:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:58:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:58:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:58:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:58:55 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:58:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:58:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:58:55 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:58:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:58:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:58:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:58:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:58:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:58:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:58:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:58:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:58:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:58:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:58:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:58:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=455 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:58:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=455 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:58:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=455 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:58:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=455 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:58:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=455 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:58:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=455 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:58:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=455 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:58:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=455 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:59:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:59:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:59:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:59:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:59:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:59:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:59:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:59:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:59:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:59:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:59:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:59:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:59:01 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:59:01 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:59:01 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:59:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:59:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:59:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:59:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:59:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:59:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:59:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:59:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:59:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:59:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:59:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:59:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:59:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:59:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:59:01 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:59:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:59:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:59:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:59:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:59:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:59:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:59:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:59:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:59:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:59:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:59:03 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:59:03 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:59:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:59:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:59:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:59:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:59:04 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:59:04 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:59:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:59:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:59:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:59:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:59:05 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:59:05 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:59:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:59:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:59:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:59:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:59:05 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:59:06 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:59:06 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:59:07 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:59:07 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:59:08 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:59:08 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:59:09 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:59:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:59:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:59:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:59:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:59:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:59:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:59:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:59:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:59:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:59:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:59:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:59:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:59:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:59:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:59:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:59:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:59:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:59:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:59:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:59:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:59:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:59:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:59:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:59:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:59:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:59:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:59:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:59:14 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:59:14 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:59:14 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:59:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:59:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 13:59:14 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:59:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:59:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:59:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:59:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:59:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:59:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:59:15 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:59:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:59:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:59:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:59:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:59:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:59:16 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:59:17 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:59:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:59:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:59:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:59:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:59:17 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:59:18 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:59:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:59:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:59:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:59:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:59:18 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:59:19 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:59:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:59:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:59:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:59:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:59:19 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:59:20 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:59:20 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:59:21 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:59:21 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:59:21 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:59:22 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:59:22 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:59:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:59:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:59:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:59:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:59:22 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 13:59:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:59:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:59:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:59:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:59:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:59:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:59:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:59:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:59:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:59:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:59:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:59:22 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1847 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:59:22 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1847 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:59:22 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1847 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:59:22 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1847 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:59:22 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1847 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:59:22 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1847 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:59:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:59:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:59:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:59:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:59:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:59:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:59:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:59:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:59:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:59:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:59:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:59:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:59:28 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:59:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:59:28 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:59:28 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:59:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:59:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:59:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:59:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:59:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:59:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:59:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:59:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:59:28 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:59:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:59:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:59:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:59:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:59:29 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:59:29 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:59:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:59:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:59:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:59:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:59:30 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:59:30 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:59:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:59:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:59:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:59:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:59:31 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:59:31 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:59:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:59:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:59:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:59:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:59:32 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:59:32 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:59:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:59:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:59:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:59:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:59:33 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:59:33 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:59:34 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:59:34 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:59:35 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:59:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:59:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:59:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:59:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:59:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:59:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:59:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:59:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:59:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:59:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:59:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:59:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:59:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:59:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1558 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:59:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1558 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:59:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1558 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:59:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1558 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:59:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1558 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:59:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1558 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:59:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:59:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:59:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:59:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:59:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:59:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:59:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:59:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:59:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:59:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:59:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:59:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:59:40 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:59:40 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:59:40 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:59:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:59:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:59:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:59:41 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:59:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:59:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:59:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:59:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:59:41 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:59:42 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:59:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:59:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:59:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:59:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:59:42 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:59:43 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:59:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:59:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:59:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:59:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:59:43 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:59:44 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:59:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:59:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:59:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:59:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:59:44 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 13:59:45 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 13:59:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:59:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:59:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:59:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:59:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:59:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:59:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:59:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:59:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:59:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:59:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:59:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:59:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:59:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:59:45 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 13:59:46 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 13:59:46 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 13:59:46 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 13:59:47 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 13:59:47 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 13:59:48 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 13:59:48 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 13:59:49 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 13:59:49 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 13:59:50 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:59:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:59:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:59:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:59:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:59:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:59:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:59:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:59:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:59:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:59:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:59:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:59:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:59:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:59:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:59:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 13:59:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 13:59:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:59:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 13:59:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:59:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 13:59:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:59:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 13:59:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:59:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 13:59:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 13:59:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 13:59:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 13:59:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 13:59:55 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 13:59:55 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 13:59:55 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 13:59:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 13:59:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 13:59:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 13:59:56 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 13:59:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:59:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:59:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:59:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:59:56 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 13:59:57 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 13:59:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:59:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:59:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:59:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:59:57 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 13:59:58 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 13:59:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:59:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:59:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:59:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:59:58 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 13:59:59 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 13:59:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 13:59:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 13:59:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 13:59:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 13:59:59 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:00:00 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:00:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:00:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:00:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:00:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:00:00 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:00:01 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:00:01 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:00:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:00:02 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:00:02 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:00:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:00:02 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:00:03 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:00:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:00:03 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:00:04 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:00:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:00:04 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:00:05 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:00:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:00:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:00:05 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:00:06 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:00:06 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:00:07 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:00:07 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:00:08 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:00:08 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:00:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:00:09 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:00:09 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:00:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:00:10 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:00:10 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:00:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:00:11 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:00:11 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:00:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:00:11 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 14:00:12 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 14:00:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:00:12 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 14:00:13 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 14:00:13 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 14:00:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:00:14 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 14:00:14 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 14:00:15 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 14:00:15 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 14:00:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:00:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:00:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:00:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:00:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:00:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:00:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:00:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:00:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:00:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:00:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:00:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:00:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:00:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4431 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:00:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4431 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:00:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4431 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:00:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4431 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:00:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4431 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:00:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4431 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:00:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4431 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:00:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:00:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:00:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:00:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:00:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:00:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:00:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:00:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:00:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:00:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:00:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:00:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:00:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:00:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:00:21 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:00:21 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:00:21 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:00:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:00:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:00:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:00:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:00:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:00:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:00:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:00:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:00:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:00:21 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:00:21 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:00:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD NOHANDOVER
2024-10-25 14:00:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:00:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:00:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:00:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:21 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=216 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:00:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:00:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:00:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:00:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:00:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD NOHANDOVER
2024-10-25 14:00:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:00:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:00:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:00:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:00:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:00:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:00:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:00:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:00:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:00:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:00:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:00:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:00:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:00:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:00:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:00:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:00:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:00:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:00:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:00:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:00:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:00:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:00:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:00:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:00:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:00:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:00:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:00:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:00:28 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:00:28 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:00:28 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:00:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:00:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:00:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:00:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:00:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:00:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:00:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:00:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:00:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:00:28 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:00:28 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:00:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD NOHANDOVER
2024-10-25 14:00:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:00:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:00:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:00:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:00:28 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:28 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:28 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:28 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:28 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:28 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:28 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:28 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:28 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:28 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:28 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:28 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:28 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:28 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:28 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:28 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:28 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:28 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:28 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:28 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:28 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:28 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:28 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:28 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:28 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:00:28 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:28 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:28 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=216 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2024-10-25 14:00:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:00:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:00:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:00:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:00:29 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:00:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD NOHANDOVER
2024-10-25 14:00:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:00:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:00:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:00:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:00:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:00:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:00:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:00:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:00:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:00:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:00:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:00:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=406 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:00:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:00:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:00:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:00:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=407 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:00:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=407 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:00:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=407 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:00:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=407 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:00:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=407 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:00:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=407 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:00:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=407 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:00:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=407 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:00:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:00:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:00:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:00:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:00:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:00:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:00:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:00:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:00:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:00:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:00:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:00:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:00:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:00:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:00:35 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:00:35 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:00:35 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:00:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:00:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:00:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:00:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:00:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:00:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:00:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:00:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:00:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:00:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:00:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:00:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:00:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:00:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:00:35 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:00:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:00:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:00:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:00:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:00:36 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:00:36 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:00:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:00:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:00:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:00:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:00:37 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:00:37 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:00:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:00:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:00:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:00:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:00:38 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:00:38 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:00:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:00:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:00:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:00:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:00:39 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:00:39 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:00:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:00:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:00:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:00:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:00:40 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:00:40 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:00:40 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:00:41 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:00:41 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:00:42 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:00:42 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:00:43 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:00:43 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:00:44 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:00:44 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:00:45 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:00:45 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:00:46 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:00:46 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:00:47 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:00:47 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:00:48 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:00:48 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:00:49 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:00:49 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:00:49 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:00:50 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:00:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:00:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:00:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:00:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:00:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:00:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:00:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:00:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:00:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:00:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:00:50 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:00:50 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-25 14:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:00:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:00:50 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:00:51 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 14:00:51 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 14:00:52 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 14:00:52 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 14:00:53 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 14:00:53 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 14:00:54 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 14:00:54 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 14:00:55 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 14:00:55 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 14:00:56 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 14:00:56 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 14:00:57 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 14:00:57 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 14:00:57 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 14:00:58 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 14:00:58 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 14:00:59 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 14:00:59 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 14:01:00 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 14:01:00 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 14:01:01 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 14:01:01 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 14:01:02 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 14:01:02 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 14:01:03 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 14:01:03 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 14:01:04 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 14:01:04 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-25 14:01:05 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-25 14:01:05 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-25 14:01:06 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-25 14:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:01:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:01:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:01:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:01:06 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:01:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:01:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:01:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:01:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:01:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:01:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:01:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:01:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:01:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:01:06 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:01:06 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-25 14:01:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:01:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:01:06 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-25 14:01:06 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-25 14:01:07 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-25 14:01:07 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-25 14:01:08 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-25 14:01:08 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-25 14:01:09 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-25 14:01:09 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-25 14:01:10 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-25 14:01:10 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-25 14:01:11 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-25 14:01:11 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-25 14:01:12 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-25 14:01:12 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-25 14:01:13 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-25 14:01:13 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-25 14:01:14 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-25 14:01:14 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-25 14:01:15 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-25 14:01:15 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-25 14:01:15 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-25 14:01:16 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-25 14:01:16 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-25 14:01:17 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-25 14:01:17 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-25 14:01:18 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-25 14:01:18 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-25 14:01:19 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-25 14:01:19 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-25 14:01:20 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-25 14:01:20 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-25 14:01:21 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-25 14:01:21 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-25 14:01:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:01:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:01:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:01:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:01:21 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:01:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:01:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:01:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:01:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:01:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:01:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:01:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:01:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:01:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:01:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:01:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:01:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:01:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:01:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:01:22 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-25 14:01:22 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-25 14:01:23 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-25 14:01:23 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-25 14:01:24 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-25 14:01:24 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-25 14:01:24 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-25 14:01:25 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-25 14:01:25 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-25 14:01:26 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-25 14:01:26 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-25 14:01:27 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-25 14:01:27 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-25 14:01:28 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-25 14:01:28 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-25 14:01:29 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-25 14:01:29 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-25 14:01:30 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-25 14:01:30 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-25 14:01:31 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-25 14:01:31 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-25 14:01:32 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-25 14:01:32 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-25 14:01:32 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-25 14:01:33 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-25 14:01:33 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-25 14:01:34 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-25 14:01:34 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-25 14:01:35 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-25 14:01:35 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-25 14:01:36 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-25 14:01:36 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-25 14:01:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:01:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:01:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:01:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:01:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:01:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:01:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:01:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:01:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:01:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:01:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:01:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:01:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:01:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:01:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:01:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=13459 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:01:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=13459 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:01:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=13459 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:01:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=13459 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:01:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=13459 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:01:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=13459 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:01:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=13459 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:01:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=13459 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:01:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:01:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:01:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:01:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:01:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:01:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:01:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:01:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:01:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:01:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:01:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:01:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:01:42 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:01:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:01:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:01:47 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:01:47 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:01:47 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:01:47 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:01:47 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:01:47 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:01:47 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:01:47 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:01:47 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:01:47 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:01:47 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:01:47 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:01:47 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:01:47 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:01:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:01:47 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:01:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:01:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:01:48 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:01:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:01:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:01:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:01:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:01:48 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:01:49 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:01:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:01:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:01:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:01:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:01:49 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:01:50 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:01:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:01:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:01:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:01:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:01:50 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:01:51 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:01:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:01:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:01:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:01:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:01:51 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:01:51 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:01:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:01:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:01:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:01:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:01:52 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:01:52 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:01:53 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:01:53 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:01:54 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:01:54 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:01:55 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:01:55 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:01:56 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:01:56 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:01:57 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:01:57 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:01:58 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:01:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:01:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:01:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:01:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:01:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:01:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:01:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:01:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:01:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:01:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:01:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:01:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:01:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:01:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:01:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2367 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:01:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:01:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2367 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:01:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2367 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:01:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2367 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:01:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2367 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:01:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2367 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:01:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2367 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:01:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2367 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:02:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:02:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:02:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:02:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:02:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:02:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:02:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:02:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:02:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:02:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:02:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:02:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:02:03 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:02:03 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:02:03 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:02:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:02:03 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:02:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:02:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:02:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:02:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:02:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:02:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:02:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:02:04 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:02:05 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:02:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:02:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:02:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:02:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:02:05 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:02:06 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:02:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:02:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:02:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:02:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:02:06 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:02:07 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:02:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:02:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:02:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:02:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:02:07 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:02:08 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:02:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:02:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:02:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:02:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:02:08 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:02:08 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:02:09 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:02:09 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:02:10 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:02:10 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:02:11 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:02:11 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:02:12 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:02:12 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:02:13 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:02:13 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:02:14 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:02:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:02:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:02:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:02:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:02:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:02:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:02:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:02:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:02:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:02:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:02:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:02:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:02:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:02:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:02:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:02:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2373 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:02:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2373 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:02:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2373 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:02:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2373 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:02:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2373 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:02:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2373 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:02:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2373 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:02:14 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2373 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:02:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:02:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:02:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:02:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:02:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:02:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:02:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:02:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:02:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:02:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:02:19 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:02:19 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:02:19 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:02:19 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:02:19 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:02:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:02:19 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:02:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:02:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:02:20 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:02:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:02:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:02:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:02:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:02:20 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:02:20 [DEBUG] fake_trx.py:263 (MS@172.18.96.22:6700) Recv SETTA cmd
2024-10-25 14:02:21 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:02:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:02:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:02:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:02:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:02:21 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:02:22 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:02:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:02:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:02:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:02:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:02:22 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:02:23 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:02:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:02:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:02:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:02:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:02:23 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:02:24 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:02:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:02:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:02:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:02:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:02:24 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:02:24 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:02:25 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:02:25 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:02:26 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:02:26 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:02:27 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:02:27 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:02:28 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:02:28 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:02:29 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:02:29 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:02:30 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:02:30 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:02:31 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:02:31 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:02:32 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:02:32 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:02:32 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:02:33 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:02:33 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:02:34 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:02:34 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:02:35 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:02:35 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 14:02:36 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 14:02:36 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 14:02:37 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 14:02:37 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 14:02:38 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 14:02:38 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 14:02:39 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 14:02:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:02:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:02:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:02:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:02:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:02:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:02:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:02:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:02:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:02:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:02:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:02:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:02:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:02:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:02:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:02:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4363 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:02:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4363 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:02:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4363 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:02:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4363 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:02:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4363 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:02:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4363 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:02:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4363 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:02:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:02:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:02:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:02:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:02:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:02:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:02:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:02:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:02:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:02:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:02:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:02:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:02:44 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:02:44 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:02:44 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:02:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:02:44 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:02:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:02:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:02:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:02:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:02:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:02:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:02:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:02:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:02:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:02:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:02:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:02:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:02:45 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:02:46 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:02:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:02:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:02:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:02:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:02:46 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:02:47 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:02:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:02:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:02:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:02:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:02:47 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:02:48 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:02:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:02:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:02:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:02:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:02:48 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:02:49 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:02:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:02:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:02:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:02:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:02:49 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:02:50 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:02:50 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:02:51 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:02:51 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:02:51 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:02:52 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:02:52 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:02:53 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:02:53 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:02:54 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:02:54 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:02:55 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:02:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:02:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:02:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:02:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:02:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:02:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:02:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:02:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:02:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:02:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:02:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:02:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:02:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:02:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:02:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:03:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:03:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:03:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:03:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:03:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:03:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:03:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:03:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:03:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:03:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:03:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:03:00 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:03:00 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:03:00 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:03:00 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:03:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:03:00 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:03:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:03:00 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:01 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:03:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:03:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:03:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:03:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:03:01 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:03:01 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:03:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:03:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:03:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:03:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:03:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:03:02 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:03:03 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:03:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:03:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:03:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:03:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:03:03 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:03:04 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:03:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:03:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:03:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:03:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:03:04 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:03:05 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:03:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:03:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:03:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:03:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:03:05 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:03:06 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:03:06 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:03:07 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:03:07 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:03:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:03:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:03:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:03:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:03:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:03:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:03:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:03:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:03:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:03:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:03:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:03:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:03:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:03:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:03:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1562 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:03:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1562 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:03:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1562 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:03:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1562 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:03:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1562 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:03:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1562 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:03:07 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1562 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:03:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:03:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:03:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:03:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:03:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:03:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:03:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:03:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:03:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:03:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:03:12 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:12 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:03:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:03:13 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:03:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:03:13 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:03:13 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:03:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:03:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:03:13 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:03:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:03:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:03:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:03:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:03:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:03:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:13 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:03:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:03:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:03:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:03:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:03:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:03:14 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:03:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:03:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:03:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:03:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:03:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:03:15 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:03:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:03:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:03:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:03:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:03:15 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:03:16 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:03:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:03:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:03:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:03:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:03:16 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:03:17 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:03:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:03:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:03:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:03:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:03:17 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:03:18 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:03:18 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:03:19 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:03:19 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:03:20 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:03:20 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:03:21 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:03:21 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:03:22 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:03:22 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:03:22 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:03:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:03:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:03:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:03:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:03:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:03:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:03:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:03:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:03:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:03:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:03:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:03:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:03:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:03:23 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:03:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:03:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:03:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:03:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:03:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:03:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:03:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:03:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:03:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:03:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:03:28 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:03:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:03:28 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:03:28 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:03:28 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:03:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:03:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:29 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:03:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:03:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:03:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:03:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:03:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:03:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:03:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:03:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:03:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:03:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:03:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:03:29 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:03:29 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:03:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:03:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:03:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:03:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:03:29 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:03:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:03:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:03:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:03:29 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:03:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:03:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:03:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:03:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:03:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:03:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:03:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:03:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:03:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:03:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:03:30 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:30 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:03:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:03:30 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:03:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:03:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:03:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:03:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:03:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:03:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:03:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:03:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:03:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:03:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:03:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:03:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:03:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:03:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:03:36 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:03:36 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:03:36 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:03:36 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:03:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:03:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:03:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:03:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:03:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:03:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:03:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:03:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:03:36 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:03:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:03:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:03:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:03:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:03:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:03:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:03:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:03:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:03:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:03:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:03:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:03:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:03:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:03:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:03:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:03:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:03:36 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:03:36 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=216 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:03:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:03:36 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=216 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:03:36 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=216 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:03:36 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=216 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:03:36 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=216 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:03:36 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=216 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:03:36 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=216 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:03:36 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=216 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:03:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:03:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:03:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:03:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:03:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:03:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:03:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:03:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:03:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:03:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:03:41 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:03:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:03:41 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:03:42 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:03:42 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:03:42 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:03:42 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:03:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:03:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:03:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:03:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:03:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:03:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:03:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:03:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:03:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:03:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:03:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:03:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:03:42 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:03:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:03:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:03:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:03:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:03:43 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:03:43 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:03:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:03:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:03:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:03:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:03:43 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:03:44 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:03:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:03:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:03:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:03:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:03:44 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:03:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:03:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:03:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:03:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:03:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:03:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:03:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:03:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:03:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:03:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:03:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:03:45 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:03:45 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:03:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:45 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:03:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:03:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:03:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:03:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:03:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:03:45 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:03:46 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:03:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:03:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:03:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:03:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:03:46 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:03:47 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:03:47 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:03:48 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:03:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:03:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:03:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:03:48 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:03:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:03:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:03:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:03:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:03:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:03:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:03:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:03:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:03:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:03:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:03:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:48 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:03:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:03:49 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:03:49 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:03:50 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:03:50 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:03:51 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:03:51 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:03:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:03:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:03:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:03:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:03:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:03:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:03:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:03:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:03:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:03:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:03:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:03:51 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:03:51 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:03:51 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:03:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:03:52 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:03:52 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:03:53 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:03:53 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:03:54 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:03:54 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:03:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:03:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:03:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:03:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:03:55 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:03:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:03:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:03:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:03:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:03:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:03:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:03:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:03:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:03:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:03:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:03:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:04:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:04:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:04:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:04:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:04:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:04:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:04:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:04:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:04:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:04:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:04:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:04:00 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:04:00 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:04:00 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:04:00 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:04:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:04:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:04:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:04:01 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:04:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:04:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:04:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:04:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:04:01 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:04:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:04:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:04:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:04:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:04:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:04:02 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:04:02 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:04:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:04:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:04:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:04:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:04:03 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:04:03 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:04:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:04:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:04:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:04:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:04:04 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:04:04 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:04:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:04:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:04:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:04:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:04:05 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:04:05 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:04:06 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:04:06 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:04:07 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:04:07 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:04:08 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:04:08 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:04:09 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:04:09 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:04:09 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:04:10 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:04:10 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:04:11 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:04:11 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:04:12 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:04:12 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:04:13 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:04:13 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:04:14 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:04:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:04:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:04:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:04:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:04:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:04:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:04:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:04:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:04:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:04:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:04:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:04:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:04:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:04:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:04:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:04:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:04:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:04:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:04:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:04:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:04:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:04:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:04:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:04:19 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:04:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:04:19 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:04:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:04:20 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:04:20 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:04:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:04:20 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:04:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:04:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:04:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:04:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:04:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:04:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:04:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:04:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:04:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:04:20 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:04:20 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:04:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:04:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:04:20 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:04:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:04:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:04:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:04:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:04:21 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:04:21 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:04:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:04:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:04:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:04:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:04:21 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:04:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:04:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:04:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:04:22 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:04:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:04:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:04:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:04:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:04:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:04:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:04:22 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:04:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:04:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:04:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:04:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:04:22 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:04:23 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:04:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:04:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:04:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:04:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:04:23 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:04:24 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:04:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:04:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:04:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:04:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:04:24 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:04:25 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:04:25 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:04:26 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:04:26 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:04:27 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:04:27 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:04:28 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:04:28 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:04:29 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:04:29 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:04:29 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:04:30 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:04:30 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:04:31 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:04:31 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:04:32 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:04:32 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:04:33 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:04:33 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:04:34 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:04:34 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:04:35 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:04:35 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:04:36 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 14:04:36 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 14:04:37 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 14:04:37 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 14:04:37 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 14:04:38 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 14:04:38 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 14:04:39 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 14:04:39 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 14:04:40 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 14:04:40 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 14:04:41 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 14:04:41 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 14:04:42 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 14:04:42 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 14:04:43 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 14:04:43 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 14:04:44 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 14:04:44 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 14:04:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:04:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:04:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:04:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:04:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:04:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:04:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:04:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:04:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:04:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:04:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:04:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:04:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:04:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:04:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:04:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:04:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:04:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:04:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:04:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:04:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:04:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:04:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:04:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:04:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:04:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:04:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:04:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:04:50 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:04:50 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:04:50 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:04:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:04:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:04:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:04:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:04:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:04:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:04:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:04:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:04:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:04:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:04:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:04:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:04:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:04:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:04:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:04:51 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:04:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:04:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:04:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:04:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:04:52 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:04:52 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:04:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:04:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:04:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:04:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:04:53 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:04:53 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:04:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:04:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:04:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:04:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:04:54 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:04:54 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:04:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:04:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:04:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:04:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:04:55 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:04:55 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:04:56 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:04:56 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:04:56 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:04:57 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:04:57 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:04:58 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:04:58 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:04:59 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:04:59 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:05:00 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:05:00 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:05:01 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:05:01 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:05:02 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:05:02 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:05:03 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:05:03 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:05:04 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:05:04 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:05:05 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:05:05 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:05:05 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:05:06 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 14:05:06 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 14:05:07 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 14:05:07 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 14:05:08 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 14:05:08 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 14:05:09 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 14:05:09 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 14:05:10 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 14:05:10 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 14:05:11 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 14:05:11 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 14:05:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:05:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:05:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:05:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:05:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:05:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:05:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:05:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:05:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:05:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:05:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:05:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:05:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:05:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:05:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:05:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:05:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:05:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:05:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:05:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:05:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:05:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:05:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:05:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:05:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:05:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:05:17 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:05:17 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:05:17 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:05:17 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:05:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:05:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:05:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:05:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:05:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:05:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:05:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:05:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:05:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:05:17 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:05:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:05:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:05:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:05:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:05:18 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:05:18 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:05:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:05:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:05:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:05:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:05:19 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:05:19 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:05:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:05:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:05:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:05:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:05:20 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:05:20 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:05:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:05:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:05:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:05:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:05:21 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:05:21 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:05:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:05:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:05:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:05:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:05:22 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:05:22 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:05:23 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:05:23 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:05:24 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:05:24 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:05:24 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:05:25 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:05:25 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:05:26 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:05:26 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:05:27 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:05:27 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:05:28 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:05:28 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:05:29 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:05:29 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:05:30 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:05:30 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:05:31 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:05:31 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:05:32 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:05:32 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:05:33 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:05:33 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 14:05:33 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 14:05:34 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 14:05:34 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 14:05:35 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 14:05:35 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 14:05:36 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 14:05:36 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 14:05:37 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 14:05:37 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 14:05:38 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 14:05:38 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 14:05:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:05:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:05:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:05:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:05:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:05:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:05:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:05:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:05:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:05:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:05:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:05:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:05:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:05:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:05:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:05:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:05:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:05:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:05:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:05:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:05:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:05:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:05:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:05:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:05:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:05:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:05:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:05:44 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:05:44 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:05:44 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:05:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:05:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:05:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:05:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:05:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:05:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:05:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:05:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:05:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:05:44 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:05:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:05:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:05:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:05:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:05:45 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:05:45 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:05:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:05:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:05:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:05:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:05:46 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:05:46 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:05:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:05:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:05:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:05:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:05:47 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:05:47 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:05:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:05:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:05:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:05:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:05:48 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:05:48 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:05:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:05:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:05:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:05:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:05:49 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:05:49 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:05:50 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:05:50 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:05:51 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:05:51 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:05:52 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:05:52 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:05:52 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:05:53 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:05:53 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:05:54 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:05:54 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:05:55 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:05:55 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:05:56 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:05:56 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:05:57 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:05:57 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:05:58 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:05:58 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:05:59 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:05:59 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:06:00 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:06:00 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 14:06:01 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 14:06:01 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 14:06:02 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 14:06:02 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 14:06:02 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 14:06:03 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 14:06:03 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 14:06:04 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 14:06:04 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 14:06:05 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 14:06:05 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 14:06:06 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 14:06:06 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 14:06:07 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 14:06:07 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 14:06:08 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 14:06:08 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 14:06:09 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 14:06:09 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 14:06:10 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 14:06:10 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 14:06:11 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 14:06:11 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 14:06:12 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 14:06:12 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 14:06:12 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 14:06:13 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 14:06:13 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-25 14:06:14 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-25 14:06:14 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-25 14:06:15 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-25 14:06:15 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-25 14:06:16 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-25 14:06:16 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-25 14:06:17 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-25 14:06:17 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-25 14:06:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:06:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:06:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:06:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:06:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:06:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:06:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:06:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:06:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:06:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:06:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7295 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:06:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:06:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:06:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:06:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7295 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:06:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7295 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:06:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7296 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:06:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7296 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:06:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7296 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:06:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7296 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:06:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7296 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:06:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7296 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:06:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7296 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:06:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7296 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:06:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:06:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:06:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:06:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:06:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:06:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:06:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:06:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:06:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:06:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:06:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:06:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:06:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:06:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:06:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:06:23 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:06:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:06:23 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:06:23 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:06:23 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:06:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:06:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:06:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:06:23 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:06:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:06:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:06:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:06:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:06:24 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:06:24 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:06:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:06:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:06:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:06:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:06:25 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:06:25 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:06:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:06:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:06:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:06:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:06:26 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:06:26 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:06:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:06:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:06:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:06:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:06:27 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:06:27 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:06:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:06:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:06:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:06:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:06:28 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:06:28 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:06:29 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:06:29 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:06:30 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:06:30 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:06:31 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:06:31 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:06:32 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:06:32 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:06:33 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:06:33 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:06:33 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:06:34 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:06:34 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:06:35 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:06:35 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:06:36 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:06:36 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:06:37 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:06:37 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:06:38 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:06:38 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:06:39 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:06:39 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 14:06:40 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 14:06:40 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 14:06:41 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 14:06:41 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 14:06:42 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 14:06:42 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 14:06:43 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 14:06:43 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 14:06:43 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 14:06:44 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 14:06:44 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 14:06:45 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 14:06:45 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 14:06:46 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 14:06:46 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 14:06:47 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 14:06:47 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 14:06:48 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 14:06:48 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 14:06:49 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 14:06:49 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 14:06:50 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 14:06:50 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 14:06:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:06:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:06:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:06:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:06:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:06:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:06:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:06:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:06:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:06:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:06:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:06:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:06:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:06:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:06:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:06:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:06:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:06:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:06:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:06:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:06:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:06:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:06:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:06:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:06:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:06:56 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:06:56 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:06:56 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:06:56 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:06:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:06:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:06:56 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:06:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:06:56 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:06:56 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:06:56 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:06:56 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:06:56 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:06:56 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:06:56 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:06:56 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:06:56 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:06:56 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:06:56 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:06:56 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:06:56 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:07:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:07:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:07:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:07:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:07:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:07:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:07:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:07:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:07:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:07:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:07:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:07:02 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:07:02 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:07:02 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:07:02 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:07:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:07:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:07:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:07:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:07:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:07:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:07:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:07:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:07:02 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:07:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=113 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:07:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:07:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:07:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=113 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=114 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=114 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=114 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=114 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=114 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=114 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=114 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=114 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:07:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:07:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:07:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:07:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:07:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:07:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:07:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:07:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:07:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:07:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:07:07 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:07 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:07:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:07:07 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:07:07 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:07:07 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:07:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:07:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:07:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:07:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:07:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:07:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:07:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:07:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:07:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:07:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:07:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:07:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:07:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:07:12 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:12 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:07:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:07:13 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:07:13 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:07:13 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:07:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:07:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:07:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:07:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:07:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:07:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:07:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:07:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:07:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:07:13 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:07:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:07:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:07:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:07:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:07:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:07:14 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:07:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:07:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:07:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:07:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:07:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:07:15 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:07:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:07:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:07:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:07:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:07:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:07:16 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:07:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:07:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:07:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:07:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:07:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:07:17 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:07:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:07:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:07:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:07:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:07:18 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:07:18 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:07:19 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:07:19 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:07:20 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:07:20 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:07:20 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:07:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:07:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:07:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:07:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:07:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:07:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:07:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:07:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:07:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:07:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:07:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:07:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:07:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:07:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1836 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1836 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1836 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1836 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1836 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1836 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1837 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1837 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1837 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1837 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1837 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1837 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1837 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1837 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:07:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:07:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:07:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:07:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:07:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:07:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:07:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:07:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:07:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:07:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:07:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:07:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:07:27 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:07:27 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:07:27 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:07:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:07:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:07:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:07:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:07:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:07:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:07:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:07:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:07:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:07:27 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:07:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:07:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:07:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:07:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:07:27 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:07:28 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:07:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:07:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:07:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:07:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:07:28 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:07:29 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:07:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:07:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:07:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:07:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:07:29 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:07:30 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:07:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:07:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:07:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:07:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:07:30 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:07:31 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:07:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:07:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:07:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:07:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:07:31 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:07:32 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:07:32 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:07:33 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:07:33 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:07:34 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:07:34 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:07:35 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:07:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:07:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:07:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:07:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:07:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:07:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:07:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:07:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:07:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:07:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:07:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:07:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1841 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:07:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:07:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1841 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1841 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1841 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1841 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1841 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1841 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1841 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:07:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:07:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:07:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:07:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:07:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:07:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:07:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:07:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:07:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:07:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:07:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:07:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:07:40 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:07:40 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:07:40 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:07:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:07:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:07:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:07:41 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:07:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:07:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:07:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:07:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:07:41 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:07:42 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:07:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:07:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:07:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:07:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:07:42 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:07:42 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:07:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:07:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:07:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:07:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:07:43 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:07:43 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:07:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:07:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:07:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:07:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:07:44 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:07:44 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:07:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:07:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:07:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:07:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:07:45 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:07:45 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:07:46 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:07:46 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:07:47 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:07:47 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:07:48 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:07:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:07:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:07:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:07:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:07:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:07:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:07:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:07:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:07:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:07:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:07:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:07:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:07:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:07:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:07:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:07:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:07:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:07:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:07:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:07:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:07:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:07:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:07:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:07:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:07:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:07:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:07:54 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:07:54 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:07:54 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:07:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:07:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:07:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:07:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:07:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:07:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:07:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:07:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:07:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:07:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:07:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:07:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:07:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:07:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:07:55 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:07:55 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:07:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:07:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:07:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:07:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:07:56 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:07:56 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:07:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:07:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:07:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:07:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:07:57 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:07:57 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:07:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:07:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:07:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:07:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:07:57 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:07:58 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:07:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:07:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:07:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:07:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:07:58 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:07:59 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:07:59 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:08:00 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:08:00 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:08:01 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:08:01 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:08:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:08:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:08:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:08:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:08:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:08:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:08:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:08:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:08:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:08:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:08:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:08:02 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:08:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:08:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1832 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1832 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1832 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1832 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1832 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1832 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1832 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1833 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1833 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1833 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1833 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1833 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1833 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1833 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:02 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1833 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:08:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:08:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:08:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:08:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:08:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:08:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:08:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:08:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:08:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:08:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:08:07 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:08:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:08:07 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:08:07 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:08:07 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:08:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:08:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:08:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:08:08 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:08:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:08:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:08:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:08:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:08:08 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:08:09 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:08:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:08:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:08:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:08:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:08:09 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:08:10 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:08:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:08:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:08:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:08:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:08:10 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:08:11 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:08:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:08:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:08:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:08:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:08:11 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:08:12 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:08:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:08:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:08:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:08:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:08:12 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:08:12 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:08:13 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:08:13 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:08:14 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:08:14 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:08:15 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:08:15 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:08:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:08:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:08:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:08:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:08:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:08:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:08:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:08:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:08:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:08:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:08:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:08:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:08:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:08:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1842 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1842 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1842 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1842 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1842 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1842 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1842 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:08:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:08:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:08:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:08:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:08:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:08:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:08:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:08:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:08:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:08:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:08:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:08:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:08:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:08:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:08:21 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:08:21 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:08:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:08:21 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:08:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:08:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:08:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:08:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:08:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:08:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:08:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:08:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:08:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:08:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:08:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:08:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:08:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:08:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:08:22 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:08:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:08:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:08:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:08:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:08:23 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:08:23 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:08:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:08:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:08:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:08:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:08:24 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:08:24 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:08:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:08:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:08:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:08:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:08:25 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:08:25 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:08:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:08:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:08:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:08:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:08:26 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:08:26 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:08:27 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:08:27 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:08:28 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:08:28 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:08:28 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:08:29 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:08:29 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:08:30 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:08:30 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:08:31 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:08:31 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:08:32 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:08:32 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:08:33 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:08:33 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:08:34 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:08:34 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:08:35 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:08:35 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:08:36 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:08:36 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:08:37 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:08:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:08:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:08:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:08:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:08:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:08:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:08:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:08:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:08:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:08:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:08:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:08:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:08:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:08:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3556 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3556 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3556 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3556 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3556 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3556 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3556 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3557 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3557 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3557 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3557 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3557 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3557 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3557 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3557 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:08:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:08:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:08:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:08:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:08:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:08:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:08:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:08:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:08:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:08:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:08:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:08:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:08:42 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:08:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:08:43 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:08:43 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:08:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:08:43 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:08:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:08:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:08:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:08:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:08:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:08:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:08:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:08:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:08:43 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:08:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:08:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:08:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:08:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:08:43 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:08:44 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:08:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:08:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:08:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:08:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:08:44 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:08:45 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:08:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:08:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:08:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:08:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:08:45 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:08:46 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:08:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:08:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:08:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:08:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:08:46 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:08:47 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:08:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:08:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:08:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:08:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:08:47 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:08:48 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:08:48 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:08:49 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:08:49 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:08:50 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:08:50 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:08:51 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:08:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:08:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:08:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:08:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:08:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:08:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:08:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:08:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:08:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:08:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:08:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:08:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:08:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:08:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:08:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:08:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:08:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:08:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:08:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:08:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:08:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:08:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:08:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:08:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:08:56 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:08:56 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:08:56 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:08:56 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:08:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:08:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:08:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:08:57 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:08:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:08:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:08:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:08:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:08:57 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:08:58 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:08:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:08:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:08:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:08:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:08:58 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:08:59 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:08:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:08:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:08:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:08:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:08:59 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:08:59 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:09:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:09:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:09:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:09:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:09:00 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:09:00 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:09:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:09:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:09:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:09:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:09:01 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:09:01 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:09:02 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:09:02 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:09:03 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:09:03 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:09:04 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:09:04 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:09:05 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:09:05 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:09:06 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:09:06 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:09:07 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:09:07 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:09:08 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:09:08 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:09:09 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:09:09 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:09:09 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:09:10 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:09:10 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:09:11 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:09:11 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:09:12 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:09:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:09:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:09:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:09:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:09:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:09:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:09:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:09:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:09:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:09:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:09:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:09:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:09:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:09:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:09:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:09:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:09:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:09:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:09:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:09:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:09:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:09:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:09:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:09:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:09:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:09:18 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:09:18 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:09:18 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:09:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:09:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:09:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:09:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:09:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:09:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:09:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:09:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:09:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:09:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:09:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:09:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:09:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:09:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:09:18 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:09:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:18 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:09:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:09:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:09:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:09:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:09:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:09:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:09:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:09:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:09:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:09:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:09:23 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:23 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:09:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:09:23 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:09:23 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:09:23 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:09:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:09:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:09:23 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:09:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:09:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:09:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:09:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:09:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:09:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:09:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:09:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:09:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:09:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:09:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:09:28 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:09:29 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:09:29 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:09:29 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:09:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:09:29 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:09:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:09:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:09:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:09:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:09:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:09:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:09:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:09:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:09:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:09:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:09:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:09:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:09:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:09:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:09:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:29 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:09:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:09:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:09:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:09:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:09:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:09:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:09:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:09:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:09:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:09:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:09:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:09:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:09:35 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:09:35 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:09:35 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:09:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:09:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:09:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:09:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:09:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:09:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:09:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:09:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:09:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:09:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:09:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:09:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:09:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:09:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:09:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:09:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:09:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:09:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:09:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:09:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:09:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:09:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:09:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:09:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:09:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:09:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:09:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:09:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:09:40 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:09:40 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:09:40 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:09:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:09:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:09:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:09:40 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:09:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:09:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=125 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:40 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:09:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:09:45 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:09:45 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:09:45 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:09:45 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:09:45 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:09:45 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:09:45 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:09:45 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:09:45 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:09:45 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:45 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:45 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:09:46 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:09:46 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:09:46 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:09:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:09:46 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:09:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:09:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:09:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:09:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:09:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:09:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:09:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:09:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:09:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:09:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:09:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:09:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:09:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:09:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:09:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:09:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:09:46 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:09:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:09:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:09:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:09:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:09:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:09:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:09:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:09:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:09:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:09:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:09:51 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:09:51 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:09:51 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:09:51 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:09:51 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:09:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:09:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:09:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:09:52 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:09:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:09:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:09:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:09:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:09:52 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:09:53 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:09:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:09:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:09:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:09:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:09:53 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:09:54 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:09:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:09:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:09:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:09:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:09:54 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:09:55 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:09:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:09:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:09:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:09:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:09:55 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:09:56 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:09:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:09:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:09:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:09:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:09:56 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:09:57 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:09:57 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:09:58 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:09:58 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:09:59 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:09:59 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:09:59 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:10:00 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:10:00 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:10:01 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:10:01 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:10:02 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:10:02 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:10:03 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:10:03 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:10:04 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:10:04 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:10:05 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:10:05 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:10:06 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:10:06 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:10:07 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:10:07 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:10:08 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 14:10:08 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 14:10:09 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 14:10:09 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 14:10:09 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 14:10:10 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 14:10:10 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 14:10:11 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 14:10:11 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 14:10:12 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 14:10:12 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 14:10:13 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 14:10:13 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 14:10:14 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 14:10:14 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 14:10:15 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 14:10:15 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 14:10:16 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 14:10:16 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 14:10:17 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 14:10:17 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 14:10:18 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 14:10:18 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 14:10:18 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 14:10:19 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 14:10:19 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 14:10:20 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 14:10:20 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 14:10:21 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-25 14:10:21 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-25 14:10:22 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-25 14:10:22 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-25 14:10:23 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-25 14:10:23 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-25 14:10:24 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-25 14:10:24 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-25 14:10:25 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-25 14:10:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:10:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:10:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:10:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:10:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:10:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:10:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:10:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:10:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:10:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:10:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:10:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:10:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:10:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7317 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7317 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7318 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7318 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7318 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7318 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7318 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7318 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7318 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7318 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7319 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7319 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7319 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7319 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7319 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7319 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7319 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7319 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:10:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:10:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:10:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:10:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:10:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:10:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:10:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:10:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:10:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:10:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:10:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:10:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:10:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:10:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:10:31 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:10:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:10:31 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:10:31 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:10:31 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:10:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:10:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:10:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:10:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:10:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:10:32 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:10:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:10:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:10:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:10:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:10:32 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:10:33 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:10:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:10:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:10:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:10:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:10:33 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:10:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:10:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:10:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:10:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:10:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:10:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:10:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:10:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:10:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:10:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:10:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:10:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:10:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=761 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=761 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=761 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=761 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=761 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=761 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=761 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=762 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=762 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=762 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=762 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=762 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=762 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=762 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=762 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:10:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:10:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:10:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:10:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:10:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:10:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:10:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:10:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:10:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:10:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:10:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:10:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:10:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:10:39 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:10:39 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:10:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:10:39 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:10:40 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:10:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:10:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:10:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:10:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:10:40 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:10:41 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:10:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:10:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:10:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:10:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:10:41 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:10:42 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:10:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:10:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:10:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:10:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:10:42 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:10:42 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:10:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:10:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:10:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:10:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:10:43 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:10:43 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:10:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:10:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:10:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:10:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:10:44 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:10:44 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:10:45 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:10:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:10:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:10:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:10:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:10:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:10:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:10:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:10:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:10:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:10:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:10:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:10:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:10:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:10:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:10:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:10:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:10:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:10:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:10:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:10:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:10:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:10:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:10:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:10:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:10:51 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:10:51 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:10:51 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:10:51 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:10:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:10:51 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:10:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:10:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:10:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:10:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:10:52 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:10:52 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:10:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:10:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:10:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:10:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:10:53 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:10:53 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:10:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:10:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:10:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:10:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:10:54 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:10:54 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:10:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:10:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:10:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:10:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:10:55 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:10:55 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:10:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:10:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:10:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:10:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:10:55 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:10:56 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:10:56 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:10:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:10:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:10:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:10:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:10:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:10:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:10:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:10:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:10:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:10:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:10:57 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:11:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:11:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:11:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:11:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:11:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:11:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:11:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:11:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:11:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:11:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:11:02 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:02 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:11:02 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:11:02 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:11:02 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:11:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:11:02 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:11:03 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:11:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:11:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:11:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:11:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:11:03 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:11:04 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:11:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:11:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:11:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:11:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:11:04 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:11:05 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:11:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:11:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:11:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:11:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:11:05 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:11:06 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:11:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:11:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:11:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:11:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:11:06 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:11:07 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:11:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:11:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:11:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:11:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:11:07 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:11:08 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:11:08 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:11:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:11:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:11:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:11:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:11:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:11:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:11:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:11:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:11:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:11:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:11:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:11:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1398 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1398 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1398 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1398 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1398 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1398 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:11:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:11:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:11:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:11:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:11:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:11:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:11:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:11:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:11:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:11:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:11:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:11:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:11:14 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:11:14 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:11:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:11:14 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:11:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:11:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:11:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:11:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:11:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:11:15 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:11:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:11:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:11:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:11:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:11:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:11:16 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:11:16 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:11:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:11:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:11:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:11:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:11:17 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:11:17 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:11:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:11:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:11:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:11:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:11:18 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:11:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:11:18 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:11:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:11:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:11:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:11:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:11:19 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:11:19 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:11:20 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:11:20 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:11:21 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:11:21 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:11:21 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:11:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:11:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:11:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:11:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:11:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:11:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:11:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:11:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:11:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:11:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:11:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:11:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:11:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:11:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:11:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:11:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:11:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:11:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:11:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:11:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:11:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:11:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:11:27 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:11:28 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:11:28 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:11:28 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:11:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:11:28 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:11:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:11:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:11:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:11:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:11:28 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:11:29 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:11:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:11:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:11:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:11:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:11:29 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:11:30 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:11:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:11:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:11:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:11:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:11:30 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:11:31 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:11:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:11:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:11:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:11:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:11:31 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:11:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:11:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:11:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:11:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:11:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:11:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:11:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:11:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:11:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:11:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:11:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:11:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:11:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:11:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:11:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:11:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:11:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:11:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:11:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:11:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:11:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:11:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:11:37 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:11:37 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:11:37 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:11:37 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:11:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:11:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:11:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:11:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:11:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:11:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:11:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:11:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:11:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:11:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:11:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:11:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:11:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:11:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:11:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:11:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:42 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:11:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:11:43 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:11:43 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:11:43 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:11:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:11:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:11:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:11:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:11:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:11:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:11:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:11:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:11:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:11:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:11:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:11:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:11:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:11:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:11:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:11:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:11:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:11:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:11:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:11:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:11:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:11:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:11:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:11:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:11:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:11:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:11:48 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:11:48 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:11:48 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:11:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:11:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:11:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:11:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:11:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:11:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:11:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:11:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:11:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:11:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:11:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:11:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:11:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:11:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:11:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:11:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:11:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:11:54 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:11:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:11:54 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:11:54 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:11:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:11:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:11:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:11:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:11:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:11:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:11:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:11:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:11:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:11:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:11:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:11:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:11:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:11:55 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:11:55 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:11:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:11:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:11:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:11:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:11:56 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:11:56 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:11:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:11:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:11:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:11:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:11:57 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:11:57 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:11:57 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2024-10-25 14:11:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:11:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:11:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:11:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:11:57 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:11:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:11:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:11:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:11:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:11:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:11:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:11:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:11:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:11:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:11:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:11:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:11:57 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:11:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=780 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=780 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=780 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=780 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=780 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=780 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=781 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=781 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=781 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=781 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=781 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=781 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=781 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:11:57 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=781 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:12:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:12:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:12:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:12:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:12:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:12:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:12:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:12:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:12:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:12:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:12:02 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:02 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:12:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:12:03 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:12:03 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:12:03 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:12:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:12:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:12:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:12:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:12:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:12:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:12:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:12:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:12:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:12:03 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:12:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:12:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:12:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:12:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:12:03 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:12:04 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:12:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:12:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:12:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:12:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:12:04 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:12:05 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:12:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:12:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:12:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:12:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:12:05 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:12:06 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:12:06 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2024-10-25 14:12:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:12:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:12:06 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:12:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:12:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:12:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:12:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:12:06 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:12:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:12:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:12:06 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:12:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:12:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:12:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:12:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:12:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:12:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:12:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:12:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:12:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:12:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:12:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:12:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:12:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:12:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:12:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:12:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:12:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:12:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:12:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:12:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:12:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:12:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:12:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:11 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:12:12 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:12:12 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:12:12 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:12:12 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:12:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:12:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:12:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:12:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:12:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:12:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:12:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:12:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:12:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:12:12 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:12:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:12:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:12:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:12:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:12:13 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:12:13 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:12:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:12:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:12:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:12:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:12:14 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:12:14 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:12:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:12:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:12:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:12:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:12:15 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:12:15 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:12:15 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2024-10-25 14:12:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:12:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:12:15 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:12:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:12:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:12:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:12:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:12:16 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:12:16 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:12:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:12:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:12:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:12:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:12:17 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:12:17 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:12:18 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:12:18 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:12:19 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:12:19 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:12:19 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:12:20 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:12:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:12:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:12:20 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:12:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:12:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:12:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:12:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:12:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:12:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:12:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:12:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:12:20 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:12:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:12:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:12:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:12:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:12:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:12:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:12:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:12:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:12:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:12:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:12:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:12:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:12:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:12:25 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:25 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:12:25 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:12:26 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:12:26 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:12:26 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:12:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:12:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:12:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:12:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:12:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:12:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:12:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:12:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:12:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:12:26 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:12:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:12:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:12:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:12:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:12:26 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:12:27 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:12:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:12:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:12:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:12:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:12:27 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:12:28 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:12:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:12:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:12:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:12:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:12:28 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:12:29 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:12:29 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2024-10-25 14:12:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:12:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:12:29 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:12:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:12:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:12:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:12:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:12:29 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:12:30 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:12:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:12:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:12:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:12:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:12:30 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:12:31 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:12:31 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:12:32 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:12:32 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:12:33 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:12:33 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:12:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:12:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:12:34 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:12:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:12:34 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:12:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:12:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:12:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:12:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:12:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:12:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:12:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:12:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:12:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:12:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:12:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:12:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:12:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:12:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:12:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:12:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:12:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:12:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:12:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:12:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:12:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:12:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:12:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:12:39 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:12:39 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:12:39 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:12:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:12:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:12:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:12:40 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:12:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:12:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:12:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:12:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:12:40 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:12:41 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:12:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:12:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:12:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:12:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:12:41 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:12:41 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:12:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:12:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:12:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:12:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:12:42 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:12:42 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:12:42 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2024-10-25 14:12:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:12:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:12:42 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:12:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:12:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:12:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:12:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:12:43 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:12:43 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:12:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:12:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:12:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:12:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:12:44 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:12:44 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:12:45 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:12:45 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:12:46 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:12:46 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:12:47 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:12:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:12:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:12:47 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:12:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:12:47 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:12:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:12:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:12:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:12:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:12:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:12:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:12:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:12:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:12:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:12:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:12:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:12:47 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1840 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:12:47 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1840 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:12:47 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1840 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:12:47 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1840 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:12:47 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1840 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:12:47 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1840 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:12:47 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1840 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:12:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:12:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:12:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:12:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:12:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:12:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:12:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:12:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:12:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:12:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:12:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:12:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:12:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:12:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:12:53 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:12:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:12:53 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:12:53 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:12:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:12:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:12:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:12:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:12:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:12:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:12:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:12:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:12:53 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:12:53 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2024-10-25 14:12:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:12:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:12:53 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:12:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:12:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:12:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:12:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:12:54 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:12:54 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:12:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:12:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:12:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:12:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:12:55 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:12:55 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:12:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:12:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:12:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:12:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:12:56 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:12:56 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:12:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:12:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:12:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:12:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:12:57 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:12:57 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:12:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:12:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:12:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:12:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:12:58 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:12:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:12:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:12:58 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:12:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:12:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:12:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:12:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:12:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:12:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:12:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:12:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:12:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:12:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:12:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:12:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1187 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:12:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1187 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:12:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1187 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:12:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1187 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:12:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1187 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:12:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1187 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:12:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1187 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:13:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:13:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:13:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:13:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:13:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:13:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:13:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:13:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:13:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:13:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:13:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:13:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:13:03 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:13:03 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:13:03 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:13:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:13:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:13:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:13:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:13:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:13:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:13:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:13:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:13:04 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:13:05 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:13:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:13:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:13:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:13:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:13:05 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:13:06 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:13:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:13:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:13:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:13:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:13:06 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:13:06 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:13:06 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2024-10-25 14:13:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:13:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:13:07 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:13:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:13:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:13:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:13:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:13:07 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:13:08 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:13:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:13:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:13:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:13:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:13:08 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:13:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:13:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:13:08 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:13:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:13:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:13:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:13:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:13:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:13:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:13:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:13:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:13:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:13:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:13:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:13:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:13:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:13:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:13:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:13:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:13:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:13:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:13:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:13:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:13:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:13:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:13:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:13:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:13:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:13:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:13:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:13:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:13:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:13:14 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:13:14 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:13:14 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:13:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:13:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:13:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:13:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:13:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:13:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:13:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:13:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:13:15 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:13:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:13:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:13:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:13:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:13:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:13:16 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:13:16 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:13:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:13:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:13:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:13:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:13:17 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:13:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:13:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:13:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:13:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:13:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:13:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:13:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:13:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:13:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:13:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:13:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:13:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=781 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:13:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:13:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:13:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=781 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=781 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=781 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=781 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=782 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=782 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=782 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=782 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=782 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=782 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=782 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=782 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:13:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:13:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:13:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:13:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:13:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:13:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:13:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:13:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:13:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:13:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:13:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:13:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:13:23 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:13:23 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:13:23 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:13:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:13:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:13:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:13:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:13:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:13:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:13:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:13:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:13:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:13:23 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:13:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:13:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:13:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:13:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:13:24 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:13:24 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:13:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:13:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:13:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:13:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:13:25 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:13:25 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:13:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:13:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:13:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:13:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:13:26 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:13:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:13:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:13:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:13:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:13:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:13:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:13:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:13:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:13:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:13:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:13:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:13:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:13:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:13:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:13:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:13:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:13:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:13:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:13:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:13:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:13:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:13:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:13:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:13:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:13:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:13:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:13:31 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:13:31 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:13:31 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:13:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:13:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:13:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:13:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:13:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:13:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:13:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:13:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:13:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:13:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:13:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:13:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:13:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:13:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:13:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:13:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:13:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=174 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=174 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=174 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=174 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=174 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=174 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=174 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:13:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:13:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:13:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:13:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:13:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:13:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:13:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:13:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:13:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:13:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:13:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:13:37 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:13:37 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:13:37 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:13:37 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:13:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:13:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:13:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:13:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:13:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:13:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:13:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:13:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:13:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:13:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:13:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:13:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:13:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:13:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:13:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:13:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:13:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=163 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=163 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=163 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=163 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=163 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=164 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=164 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=164 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=164 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=164 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=164 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=164 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:38 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=164 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:13:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:13:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:13:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:13:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:13:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:13:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:13:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:13:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:13:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:13:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:13:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:13:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:13:43 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:13:43 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:13:43 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:13:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:13:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:13:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:13:44 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:13:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:13:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:13:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:13:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:13:44 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:13:44 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:13:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:13:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:13:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:13:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:13:45 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:13:45 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:13:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:13:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:13:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:13:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:13:46 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:13:46 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:13:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:13:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:13:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:13:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:13:47 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:13:47 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:13:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:13:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:13:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:13:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:13:48 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:13:48 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:13:49 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:13:49 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:13:50 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:13:50 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:13:51 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:13:51 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:13:52 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:13:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:13:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:13:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:13:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:13:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:13:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:13:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:13:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:13:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:13:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:13:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:13:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:13:52 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:13:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:13:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:13:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:13:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:13:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:13:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:13:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:13:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:13:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:13:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:13:57 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:13:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:13:57 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:13:58 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:13:58 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:13:58 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:13:58 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:13:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:13:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:13:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:13:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:13:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:13:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:13:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:13:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:13:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:13:58 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:13:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:13:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:13:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:13:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:13:58 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:13:59 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:13:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:13:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:13:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:13:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:13:59 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:14:00 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:14:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:14:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:14:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:14:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:14:00 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:14:01 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:14:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:14:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:14:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:14:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:14:01 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:14:02 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:14:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:14:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:14:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:14:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:14:02 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:14:03 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:14:03 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:14:04 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:14:04 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:14:05 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:14:05 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:14:06 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:14:06 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:14:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:14:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:14:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:14:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:14:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:14:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:14:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:14:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:14:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:14:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:14:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:14:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:14:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:14:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:14:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:14:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:14:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:14:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:14:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:14:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:14:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:14:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:14:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:14:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:11 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:14:12 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:14:12 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:14:12 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:14:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:14:12 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:14:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:14:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:14:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:14:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:14:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:14:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:14:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:14:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:14:12 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:14:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:14:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:14:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:14:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:14:13 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:14:13 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:14:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:14:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:14:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:14:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:14:14 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:14:14 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:14:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:14:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:14:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:14:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:14:15 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:14:15 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:14:15 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=0, maio=1, ma_len=2
2024-10-25 14:14:15 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:14:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:14:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:14:15 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:14:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:14:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:14:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:14:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:14:16 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:14:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:14:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:14:16 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:14:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:14:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:14:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:14:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:14:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:14:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:14:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:14:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:14:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:14:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:14:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:14:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:14:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=991 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:14:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=991 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:14:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=991 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:14:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=991 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:14:16 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=991 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:14:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:14:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:14:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:14:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:14:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:14:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:14:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:14:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:14:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:14:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:14:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:14:22 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:14:22 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:14:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:14:22 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:14:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:14:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:14:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:14:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:14:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:14:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:14:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:14:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:14:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:14:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:14:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:14:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:14:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:14:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:14:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:14:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:14:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:14:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:14:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:14:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:14:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:14:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:14:27 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:14:27 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:14:27 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:14:27 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:14:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:14:28 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:14:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:14:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:14:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:14:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:14:28 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:14:29 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:14:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:14:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:14:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:14:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:14:29 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:14:30 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:14:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:14:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:14:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:14:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:14:30 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:14:31 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:14:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:14:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:14:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:14:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:14:31 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:14:31 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:14:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:14:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:14:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:14:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:14:32 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:14:32 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:14:33 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:14:33 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:14:34 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:14:34 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:14:35 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:14:35 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:14:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:14:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:14:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:14:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:14:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:14:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:14:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:14:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:14:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:14:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:14:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:14:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:14:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1857 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:14:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1857 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:14:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1857 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:14:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1857 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:14:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1857 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:14:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1857 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:14:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1857 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:14:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:14:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:14:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:14:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:14:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:14:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:14:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:14:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:14:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:14:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:14:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:14:41 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:14:41 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:14:41 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:14:41 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:14:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:14:41 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:14:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:14:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:14:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:14:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:14:42 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:14:42 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:14:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:14:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:14:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:14:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:14:43 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:14:43 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:14:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:14:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:14:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:14:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:14:44 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:14:44 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:14:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:14:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:14:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:14:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:14:45 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:14:45 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:14:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:14:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:14:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:14:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:14:45 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:14:46 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:14:46 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:14:47 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:14:47 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:14:48 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:14:48 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:14:49 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:14:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:14:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:14:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:14:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:14:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:14:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:14:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:14:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:14:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:14:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:14:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:14:49 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:14:49 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1847 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:14:49 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1847 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:14:49 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1847 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:14:49 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1847 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:14:49 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1847 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:14:49 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1847 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:14:49 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1847 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:14:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:14:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:14:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:14:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:14:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:14:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:14:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:14:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:14:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:14:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:14:54 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:14:54 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:14:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:14:54 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:14:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:14:54 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:14:54 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:14:55 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:14:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:14:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:14:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:14:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:14:55 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:14:56 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:14:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:14:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:14:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:14:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:14:56 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:14:57 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:14:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:14:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:14:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:14:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:14:57 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:14:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:14:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:14:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:14:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:14:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:14:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:14:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:14:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:14:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:14:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:14:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:14:57 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:15:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:15:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:15:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:15:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:15:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:15:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:15:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:15:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:15:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:15:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:15:02 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:02 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:15:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:15:03 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:15:03 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:15:03 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:15:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:15:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:15:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:15:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:15:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:15:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:15:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:15:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:15:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:15:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:15:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:15:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:15:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:15:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:15:03 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:15:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:15:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:15:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:15:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:15:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:15:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:15:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:15:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:15:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:15:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:15:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:15:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:15:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:15:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:15:03 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:15:03 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=213 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:03 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=213 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:03 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=213 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:03 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=213 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:03 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=213 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:03 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=213 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:03 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=213 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:03 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=213 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:15:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:15:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:15:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:15:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:15:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:15:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:15:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:15:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:15:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:15:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:15:08 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:15:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:15:09 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:15:09 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:15:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:15:09 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:15:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:15:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:15:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:15:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:15:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:15:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:15:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:15:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:15:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:15:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:15:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:15:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:15:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:15:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:15:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:15:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:15:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:15:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:15:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:15:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:15:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:15:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:15:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:15:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:15:15 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:15:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:15:15 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:15:15 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:15:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:15:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:15:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:15:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:15:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:15:15 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:15:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:15:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:15:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:15:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:15:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:15:16 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:15:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:15:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:15:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:15:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:15:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:15:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:15:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:15:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:15:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:15:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:15:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:15:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:15:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:15:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:15:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:15:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:15:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:15:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:15:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:15:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:15:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:15:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:15:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:15:22 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:15:22 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:15:22 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:15:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:15:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:15:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:15:23 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:15:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:15:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:15:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:15:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:15:23 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:15:24 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:15:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:15:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:15:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:15:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:15:24 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:15:25 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:15:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:15:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:15:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:15:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:15:25 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:15:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:15:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:15:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:15:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:15:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:15:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:15:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:15:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:15:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:15:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:15:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:15:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:15:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:15:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=720 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=720 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=720 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=720 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=720 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=721 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=721 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=721 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=721 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=721 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=721 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=721 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=721 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:15:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:15:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:15:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:15:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:15:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:15:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:15:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:15:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:15:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:15:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:15:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:15:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:15:31 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:15:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:15:31 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:15:31 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:15:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:15:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:15:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:15:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:15:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:15:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:15:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:15:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:15:31 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:15:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:15:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:15:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:15:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:15:32 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:15:32 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:15:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:15:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:15:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:15:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:15:32 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:15:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:15:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:15:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:15:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:15:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:15:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:15:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:15:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:15:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:15:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:15:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:15:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:15:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:15:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:15:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:15:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:15:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:15:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:15:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:15:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:15:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:15:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:15:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:15:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:15:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:15:38 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:15:38 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:15:38 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:15:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:15:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:15:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:15:39 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:15:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:15:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:15:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:15:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:15:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:15:40 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:15:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:15:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:15:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:15:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:15:40 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:15:41 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:15:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:15:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:15:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:15:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:15:41 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:15:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:15:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:15:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:15:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:15:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:15:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:15:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:15:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:15:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:15:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:15:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:15:41 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=720 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:15:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:15:41 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=720 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:41 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=720 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:41 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=720 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:41 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=720 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:41 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=721 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:41 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=721 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:41 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=721 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:41 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=721 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:41 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=721 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:41 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=721 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:41 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=721 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:41 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=721 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:15:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:15:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:15:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:15:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:15:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:15:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:15:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:15:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:15:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:15:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:15:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:15:47 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:15:47 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:15:47 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:15:47 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:15:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:15:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:15:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:15:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:15:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:15:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:15:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:15:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:15:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:15:47 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:15:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:15:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:15:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:15:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:15:48 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:15:48 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:15:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:15:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:15:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:15:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:15:49 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:15:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:15:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:15:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:15:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:15:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:15:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:15:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:15:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:15:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:15:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:15:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:15:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:15:49 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:15:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:15:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:15:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:15:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:15:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:15:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:15:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:15:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:15:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:15:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:15:54 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:15:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:15:54 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:15:54 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:15:54 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:15:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:15:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:15:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:15:55 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:15:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:15:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:15:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:15:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:15:55 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:15:56 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:15:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:15:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:15:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:15:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:15:56 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:15:57 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:15:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:15:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:15:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:15:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:15:57 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:15:58 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:15:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:15:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:15:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:15:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:15:58 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:15:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:15:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:15:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:15:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:15:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:15:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:15:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:15:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:15:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:15:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:15:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=924 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:15:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:15:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:15:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=924 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=924 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=925 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=925 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=925 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=925 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=925 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=925 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=925 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:15:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=925 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:16:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:16:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:16:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:16:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:16:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:16:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:16:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:16:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:16:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:16:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:16:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:16:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:16:04 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:16:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:16:04 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:16:04 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:16:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:16:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:16:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:16:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:16:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:16:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:16:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:16:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:16:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:16:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:16:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:16:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:16:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:16:05 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:16:05 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:16:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:16:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:16:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:16:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:16:06 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:16:06 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:16:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:16:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:16:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:16:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:16:07 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:16:07 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:16:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:16:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:16:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:16:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:16:08 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:16:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:16:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:16:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:16:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:16:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:16:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:16:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:16:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:16:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:16:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:16:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:16:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:16:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:16:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=975 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=975 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=975 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=975 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=975 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:16:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:16:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:16:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:16:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:16:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:16:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:16:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:16:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:16:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:16:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:16:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:16:13 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:16:13 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:16:13 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:16:13 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:16:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:16:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:16:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:16:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:16:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:16:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:16:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:16:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:16:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:16:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:16:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:16:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:16:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:16:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:16:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:16:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:16:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:16:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:16:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:16:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:16:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:16:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:16:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:16:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:16:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:16:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:16:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:16:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:16:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:16:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:16:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:16:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:16:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:16:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:16:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:16:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:16:21 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:16:21 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:16:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:16:21 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:16:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:16:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:16:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:16:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:16:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:16:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:16:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:16:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:16:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:16:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:16:22 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:16:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:16:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:16:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:16:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:16:23 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:16:23 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:16:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:16:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:16:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:16:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:16:24 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:16:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:16:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:16:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:16:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:16:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:16:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:16:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:16:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:16:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:16:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:16:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:16:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:16:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=768 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=768 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=768 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=768 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=768 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=768 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=768 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:16:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:16:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:16:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:16:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:16:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:16:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:16:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:16:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:16:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:16:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:16:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:16:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:16:30 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:16:30 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:16:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:16:30 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:16:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:16:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:16:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:16:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:16:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:16:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:16:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:16:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:16:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:16:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:16:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:16:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:16:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:16:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:16:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:16:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:16:30 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:30 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:30 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:30 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:30 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:30 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:30 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:30 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:30 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:30 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:30 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:30 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:30 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:30 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:16:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:16:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:16:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:16:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:16:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:16:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:16:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:16:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:16:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:16:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:16:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:16:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:16:35 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:16:35 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:16:35 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:16:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:16:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:16:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:16:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:16:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:16:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:16:36 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:16:37 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:16:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:16:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:16:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:16:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:16:37 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:16:38 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:16:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:16:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:16:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:16:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:16:38 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:16:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:16:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:16:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:16:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:16:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:16:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:16:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:16:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:16:38 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:16:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:16:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:16:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:16:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:16:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:16:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:16:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:16:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:16:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:16:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:16:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:16:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:16:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:16:43 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:43 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:16:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:16:44 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:16:44 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:16:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:16:44 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:16:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:16:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:16:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:16:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:16:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:16:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:16:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:16:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:16:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:16:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:16:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:16:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:16:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:16:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:16:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:16:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:16:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:44 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:16:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:16:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:16:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:16:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:16:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:16:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:16:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:16:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:16:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:16:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:16:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:16:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:16:49 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:16:49 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:16:49 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:16:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:16:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:16:49 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:16:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:16:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:16:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:16:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:16:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:16:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:16:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:16:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:16:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:16:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:16:54 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:16:54 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:16:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:16:55 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:16:55 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:16:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:16:55 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:16:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:16:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:16:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:16:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:16:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:16:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:16:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:16:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:16:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=114 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:16:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:16:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:16:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=114 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=114 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=114 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=114 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=114 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=114 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:16:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=114 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:17:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:17:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:17:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:17:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:17:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:17:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:17:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:17:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:17:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:17:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:17:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:17:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:17:01 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:17:01 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:17:01 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:17:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:17:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:17:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:17:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:17:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:17:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:17:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:17:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:17:01 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:17:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:17:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:17:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:17:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:17:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:17:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:17:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:17:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:17:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:17:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:17:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:17:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:17:06 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:06 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:17:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:17:06 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:17:06 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:17:06 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:17:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:17:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:17:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:17:06 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:06 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:06 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:17:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:17:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:17:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:17:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:17:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:17:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:17:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:17:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:17:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:17:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:17:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:11 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:17:12 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:17:12 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:17:12 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:17:12 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:17:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:12 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:17:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:17:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:17:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:17:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:17:13 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:17:13 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:17:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:17:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:17:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:17:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:17:14 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:17:14 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:17:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:17:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:17:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:17:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:17:15 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:17:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:17:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:17:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:17:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:17:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:17:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:17:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:17:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:17:15 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:17:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:17:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:17:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:17:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:17:15 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:17:16 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:17:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:17:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:17:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:17:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:17:16 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:17:17 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:17:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:17:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:17:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:17:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:17:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:17:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:17:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:17:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:17:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:17:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:17:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:17:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:17:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1261 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:17:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1261 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1261 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1261 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1261 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1261 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1261 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1261 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:17:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:17:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:17:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:17:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:17:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:17:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:17:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:17:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:17:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:17:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:17:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:17:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:17:23 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:17:23 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:17:23 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:17:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:17:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:17:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:17:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:17:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:17:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:17:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:17:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:17:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:17:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:17:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:17:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:17:23 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:17:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:17:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=118 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:17:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:17:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:17:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:17:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:17:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:17:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:17:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:17:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:17:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:17:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:17:28 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:17:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:17:28 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:17:28 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:28 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:17:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:17:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:17:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:17:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:17:28 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:28 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:28 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:28 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:28 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:28 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=115 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:17:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:17:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:17:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:17:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:17:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:17:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:17:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:17:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:17:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:17:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:17:33 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:33 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:17:34 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:17:34 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:17:34 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:17:34 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:17:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:17:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:17:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:17:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:17:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:17:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:17:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:17:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:17:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:17:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:17:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:17:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:17:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:17:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:17:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=118 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=118 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=118 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=118 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=118 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=118 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:34 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=118 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:17:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:17:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:17:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:17:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:17:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:17:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:17:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:17:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:17:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:17:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:17:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:17:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:17:39 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:17:39 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:39 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:17:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:17:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:17:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:17:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:17:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:17:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:17:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:17:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:17:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:17:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:17:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:17:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:17:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:17:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:17:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:17:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:17:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:17:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:17:45 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:17:45 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:17:45 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:17:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:45 [DEBUG] fake_trx.py:376 (BTS@172.18.96.20:5700) Recv FAKE_TRXC_DELAY cmd
2024-10-25 14:17:45 [INFO] fake_trx.py:379 (BTS@172.18.96.20:5700) Artificial TRXC delay set to 200
2024-10-25 14:17:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD FAKE_TRXC_DELAY
2024-10-25 14:17:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:17:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:17:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:17:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:17:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:17:46 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:17:46 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:17:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:47 [DEBUG] fake_trx.py:376 (BTS@172.18.96.20:5700) Recv FAKE_TRXC_DELAY cmd
2024-10-25 14:17:47 [INFO] fake_trx.py:379 (BTS@172.18.96.20:5700) Artificial TRXC delay set to 0
2024-10-25 14:17:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD FAKE_TRXC_DELAY
2024-10-25 14:17:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:17:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:17:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:17:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:17:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:17:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:17:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:17:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:17:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:17:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:17:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:17:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:17:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:17:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:17:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:17:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:17:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:17:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:17:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:17:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:17:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:17:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:17:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:17:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:17:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:17:52 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:17:52 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:52 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:17:52 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:17:52 [DEBUG] fake_trx.py:376 (BTS@172.18.96.20:5700) Recv FAKE_TRXC_DELAY cmd
2024-10-25 14:17:52 [INFO] fake_trx.py:379 (BTS@172.18.96.20:5700) Artificial TRXC delay set to 200
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD FAKE_TRXC_DELAY
2024-10-25 14:17:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:53 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:17:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:17:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:17:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:17:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:53 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:17:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:53 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:17:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:54 [DEBUG] fake_trx.py:376 (BTS@172.18.96.20:5700) Recv FAKE_TRXC_DELAY cmd
2024-10-25 14:17:54 [INFO] fake_trx.py:379 (BTS@172.18.96.20:5700) Artificial TRXC delay set to 0
2024-10-25 14:17:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD FAKE_TRXC_DELAY
2024-10-25 14:17:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:17:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:17:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:17:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:17:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:17:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:17:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:17:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:17:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:17:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:17:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:17:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:17:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:17:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:17:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:17:54 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=467 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:54 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=467 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:54 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=467 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:54 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=467 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:54 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=467 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:54 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=467 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:54 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=467 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:54 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=467 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:17:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:17:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:17:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:17:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:17:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:17:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:17:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:17:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:17:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:17:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:17:59 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:17:59 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:17:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:17:59 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:17:59 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:17:59 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:17:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:17:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:17:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:17:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:18:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:18:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:18:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:18:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:18:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:18:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:18:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:18:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:18:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:18:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:18:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:18:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:18:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:18:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:18:05 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:18:05 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:18:05 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:18:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:18:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:18:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:18:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:18:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:18:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:18:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:18:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:18:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:18:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:18:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:18:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:18:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:18:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:18:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:18:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:18:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:18:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:18:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:18:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:18:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:18:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:18:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:18:10 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:18:10 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:10 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:18:10 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:18:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:18:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:18:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:18:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:11 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:18:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:18:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:18:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:18:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:18:11 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:18:12 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:18:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:18:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:18:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:18:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:18:12 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:18:13 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:18:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:18:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:18:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:18:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:18:13 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:18:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:18:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:18:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:18:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:18:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:18:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:18:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:14 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:18:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:18:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:18:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:18:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:18:14 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:18:15 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:18:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:18:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:18:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:18:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:18:15 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:18:16 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:18:16 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:18:17 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:18:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:18:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:18:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:18:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:17 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:18:18 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:18:18 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:18:18 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:18:19 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:18:19 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:18:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:18:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:18:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:18:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:18:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:18:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:18:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:20 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:18:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:20 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:18:21 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:18:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:18:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:18:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:18:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:21 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:18:21 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:18:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:21 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:18:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:18:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:18:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:18:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:21 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:18:21 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:18:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:21 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:18:22 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:18:22 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:18:23 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:18:23 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:18:24 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:18:24 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:24 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:18:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:18:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:18:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:24 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:18:24 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:18:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:24 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:18:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:18:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:18:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:18:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:24 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:18:24 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:18:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:25 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:18:25 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:18:26 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:18:26 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:18:26 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 14:18:27 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 14:18:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:27 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:18:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:18:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:18:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:18:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:27 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:18:27 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:18:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:27 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 14:18:28 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 14:18:28 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 14:18:29 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 14:18:29 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 14:18:30 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 14:18:30 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 14:18:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:30 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:18:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:18:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:18:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:18:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:30 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:18:30 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:18:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:30 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:18:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:18:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:18:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:18:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:30 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:18:30 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:18:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:31 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 14:18:31 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 14:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:31 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:18:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:18:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:18:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:18:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:18:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:18:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:32 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 14:18:32 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 14:18:33 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 14:18:33 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 14:18:34 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 14:18:34 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 14:18:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:35 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 14:18:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:18:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:18:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:18:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:18:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:18:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:18:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:35 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 14:18:35 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 14:18:36 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 14:18:36 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 14:18:37 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 14:18:37 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 14:18:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:18:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:18:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:18:38 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 14:18:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:38 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 14:18:39 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 14:18:39 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 14:18:40 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-25 14:18:40 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-25 14:18:41 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-25 14:18:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:18:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:18:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:18:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:41 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-25 14:18:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:18:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:18:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:18:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:42 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-25 14:18:42 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-25 14:18:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:18:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:18:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:18:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:42 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:18:42 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:18:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:42 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:18:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:18:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:18:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:18:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:43 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:18:43 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:18:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:43 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-25 14:18:43 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-25 14:18:44 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-25 14:18:44 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-25 14:18:44 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-25 14:18:45 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-25 14:18:45 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-25 14:18:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:46 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:18:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:18:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:18:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:18:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:46 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:18:46 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:18:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:46 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-25 14:18:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:46 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:18:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:18:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:18:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:18:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:46 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:18:46 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:18:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:46 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-25 14:18:47 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-25 14:18:47 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-25 14:18:48 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-25 14:18:48 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-25 14:18:49 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-25 14:18:49 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-25 14:18:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:49 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:18:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:18:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:18:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:18:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:49 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:18:49 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:18:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:50 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-25 14:18:50 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-25 14:18:51 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-25 14:18:51 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-25 14:18:52 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-25 14:18:52 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-25 14:18:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:52 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:18:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:18:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:18:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:18:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:52 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:18:52 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:18:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:52 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-25 14:18:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:53 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:18:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:18:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:18:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:18:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:18:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:18:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:53 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:18:53 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:18:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:53 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-25 14:18:53 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-25 14:18:54 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-25 14:18:54 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-25 14:18:55 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-25 14:18:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:18:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:18:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:18:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:18:55 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:18:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:18:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:18:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:18:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:18:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:18:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:18:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:18:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:18:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:18:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:18:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:18:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=9794 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:18:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=9794 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:18:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=9794 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:18:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=9794 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:18:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=9794 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:18:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=9794 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:18:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=9794 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:19:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:19:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:19:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:19:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:19:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:19:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:19:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:19:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:19:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:19:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:19:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:19:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:19:01 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:01 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:19:01 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:19:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:19:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:19:01 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:01 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:19:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:01 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:19:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:19:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:19:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:19:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:19:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:02 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:19:02 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:19:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:02 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:19:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:19:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:19:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:19:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:19:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:19:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:19:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:19:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:19:02 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:19:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:19:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:19:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:19:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:19:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:19:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:19:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:19:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:19:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:19:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:19:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:19:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:19:07 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:19:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:19:07 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:19:07 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:19:07 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:19:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:08 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:19:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:19:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:19:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:19:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:19:08 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:19:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:19:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:19:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:19:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:19:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:19:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:08 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:19:08 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:19:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:09 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:09 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:19:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:19:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:19:09 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:09 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:09 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:19:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:19:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:19:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:19:09 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=598 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:19:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:19:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:19:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:19:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:19:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:19:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:19:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:19:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:19:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:19:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:19:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:19:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:19:15 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:19:15 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:19:15 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:19:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:19:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:19:15 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:19:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:19:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:19:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:19:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:19:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:16 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:19:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:19:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:19:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:19:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:19:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:19:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:19:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:19:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:19:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:19:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:19:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:19:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:19:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:19:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:16 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:19:16 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:19:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:19:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:19:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:19:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:19:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:19:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:17 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:19:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:19:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:19:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:19:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:19:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:19:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:19:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:19:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:19:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=499 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:19:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:19:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:19:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=499 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=500 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=500 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=500 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=500 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=500 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=500 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=500 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=500 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:19:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:19:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:19:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:19:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:19:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:19:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:19:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:19:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:19:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:19:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:19:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:19:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:19:22 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:19:22 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:19:22 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:19:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:19:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:19:23 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:23 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:23 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:19:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:23 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:19:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:19:23 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:24 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:19:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:19:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:19:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:19:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:19:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:24 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:19:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:19:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:19:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:19:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:19:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:19:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:19:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:19:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:19:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:19:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:19:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=494 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:19:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=494 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=494 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=494 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=495 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=495 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=495 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=495 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=495 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=495 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=495 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=495 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=496 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=496 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=496 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=496 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=496 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=496 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=496 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=496 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:19:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:19:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:19:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:19:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:19:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:19:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:19:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:19:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:19:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:19:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:19:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:19:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:19:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:19:30 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:19:30 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:19:30 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:19:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:30 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:19:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:19:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:19:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:19:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:19:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:19:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:19:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:19:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:19:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:19:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:19:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:19:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:19:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:19:31 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:19:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:19:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:19:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:19:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:19:32 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:19:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:19:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:19:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:19:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:19:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:19:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:32 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:19:32 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:19:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:32 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:19:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:19:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:19:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:19:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:19:33 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:19:33 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:19:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:19:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:19:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:19:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:19:33 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:19:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:34 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:19:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:19:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:19:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:19:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:19:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:19:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:19:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:19:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:34 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:19:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:19:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:19:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:19:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:19:34 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:19:35 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:19:35 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:19:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:19:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:19:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:19:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:19:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:19:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:19:35 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:19:35 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:19:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:19:36 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:19:36 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:19:37 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:19:37 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:19:38 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:19:38 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:19:39 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:19:39 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:19:40 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:19:40 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:19:41 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:19:41 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:19:42 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:19:42 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:19:43 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:19:43 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:19:43 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:19:44 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:19:44 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:19:45 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:19:45 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:19:46 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 14:19:46 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 14:19:47 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 14:19:47 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 14:19:48 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 14:19:48 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 14:19:49 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 14:19:49 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 14:19:50 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 14:19:50 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 14:19:51 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 14:19:51 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 14:19:52 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 14:19:52 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 14:19:53 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 14:19:53 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 14:19:53 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 14:19:54 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 14:19:54 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 14:19:55 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 14:19:55 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 14:19:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:19:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:19:55 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:19:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:19:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:19:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:19:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:19:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:19:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:19:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:19:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:19:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:19:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:19:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:19:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5620 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5620 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5620 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5620 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5620 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:19:55 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5620 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:20:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:20:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:20:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:20:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:20:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:20:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:20:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:20:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:20:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:20:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:20:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:20:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:20:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:20:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:20:01 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:20:01 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:20:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:01 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:20:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:20:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:20:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:20:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:20:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:20:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:20:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:20:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:01 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:20:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:20:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:20:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:20:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:20:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:20:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:20:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:20:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:20:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:20:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:20:03 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:20:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:20:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:20:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:20:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:20:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:20:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:03 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:20:03 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:20:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:03 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:20:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:20:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:20:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:20:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:20:04 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:20:04 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:20:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:20:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:20:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:20:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:20:05 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:20:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:05 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:20:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:20:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:20:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:20:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:20:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:20:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:20:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:20:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:05 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:20:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:20:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:20:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:20:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:20:06 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:20:06 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:20:07 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:20:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:20:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:20:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:20:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:20:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:20:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:07 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:20:07 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:20:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:07 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:20:08 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:20:08 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:20:09 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:20:09 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:20:09 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:20:10 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:20:10 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:20:11 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:20:11 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:20:12 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:20:12 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:20:13 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:20:13 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:20:14 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:20:14 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:20:15 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:20:15 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:20:16 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:20:16 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:20:16 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:20:17 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 14:20:17 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 14:20:18 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 14:20:18 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 14:20:19 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 14:20:19 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 14:20:20 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 14:20:20 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 14:20:21 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 14:20:21 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 14:20:22 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 14:20:22 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 14:20:23 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 14:20:23 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 14:20:24 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 14:20:24 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 14:20:25 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 14:20:25 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 14:20:26 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 14:20:26 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 14:20:26 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 14:20:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:27 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:20:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:20:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:20:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:20:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:20:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:20:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:20:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:20:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:20:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:20:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:20:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:20:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:20:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:20:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:20:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:20:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:20:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:20:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:20:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:20:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:20:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:20:32 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:20:32 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:20:32 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:20:32 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:32 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:20:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:20:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:20:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:20:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:20:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:20:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:20:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:20:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:33 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:20:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:20:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:20:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:20:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:20:33 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:20:34 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:20:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:20:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:20:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:20:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:20:34 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:20:35 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:20:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:20:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:20:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:20:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:20:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:20:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:20:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:20:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:20:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:20:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:20:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:20:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:20:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:20:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:20:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:20:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:20:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:20:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:20:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:35 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:20:36 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:20:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:20:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:20:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:20:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:20:36 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:20:36 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:20:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:20:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:20:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:20:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:20:37 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:20:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:20:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:20:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:20:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:20:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:20:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:37 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:20:37 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:20:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:37 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:20:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:20:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:20:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:20:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:20:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:20:37 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:20:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:37 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:20:37 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:20:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:38 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:20:38 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:20:39 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:20:39 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:20:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:40 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:20:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:20:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:20:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:20:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:20:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:20:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:40 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:20:40 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:20:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:40 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:20:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:40 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:20:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:20:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:20:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:20:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:20:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:20:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:40 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:20:40 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:20:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:40 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:20:41 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:20:41 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:20:42 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:20:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:42 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:20:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:20:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:20:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:20:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:20:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:20:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:42 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:20:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:20:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:20:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:43 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:20:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:20:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:20:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:20:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:20:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:20:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:20:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:20:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:43 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:20:44 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:20:44 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:20:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:20:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:20:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:20:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:20:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:20:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:20:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:45 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:20:45 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:20:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:20:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:20:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:20:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:20:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:20:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:20:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:45 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:20:46 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:20:46 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:20:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:20:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:20:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:20:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:20:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:20:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:47 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:20:47 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:20:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:47 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:20:47 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:20:48 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:20:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:48 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:20:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:20:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:20:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:20:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:20:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:20:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:20:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:20:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:20:48 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:20:48 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:20:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:20:48 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 14:20:49 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 14:20:49 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 14:20:50 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 14:20:50 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 14:20:51 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 14:20:51 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 14:20:52 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 14:20:52 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 14:20:53 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 14:20:53 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 14:20:54 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 14:20:54 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 14:20:55 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 14:20:55 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 14:20:56 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 14:20:56 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 14:20:56 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 14:20:57 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 14:20:57 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 14:20:58 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 14:20:58 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 14:20:59 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 14:20:59 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 14:21:00 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 14:21:00 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 14:21:01 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 14:21:01 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 14:21:02 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-25 14:21:02 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-25 14:21:03 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-25 14:21:03 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-25 14:21:04 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-25 14:21:04 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-25 14:21:05 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-25 14:21:05 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-25 14:21:06 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-25 14:21:06 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-25 14:21:06 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-25 14:21:07 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-25 14:21:07 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-25 14:21:08 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-25 14:21:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:08 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:21:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:21:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:21:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:21:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:21:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:21:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:21:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:21:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:21:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:21:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:21:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:21:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7820 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7820 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7820 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7820 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7820 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7820 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=7820 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:21:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:21:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:21:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:21:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:21:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:21:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:21:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:21:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:21:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:21:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:21:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:21:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:21:14 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:14 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:21:14 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:21:14 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:14 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:21:14 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:14 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:15 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:21:15 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:15 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:21:15 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:15 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:21:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:21:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:21:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:21:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=431 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=431 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=431 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=431 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=431 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=431 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=431 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=432 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=432 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=432 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=432 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=432 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=432 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=432 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:15 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=432 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:21:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:21:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:21:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:21:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:21:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:21:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:21:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:21:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:21:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:21:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:21:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:21:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:21:21 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:21:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:21 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:21:21 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:21:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:21:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:21:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:21:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:21:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:21:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:21:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:22 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:21:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:21:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:21:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:21:22 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:21:22 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:21:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:21:23 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:21:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:23 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:21:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:21:23 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:21:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:23 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:21:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:21:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:21:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:21:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:21:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:23 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:21:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:24 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:21:24 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:24 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:21:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:21:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:25 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:21:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:25 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:21:25 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:21:25 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:21:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:25 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:21:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:21:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:21:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:21:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:21:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:21:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:21:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:21:25 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:21:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1008 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:21:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:21:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:21:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1008 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1009 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1009 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1009 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1009 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1009 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1009 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1009 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:25 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1009 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:21:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:21:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:21:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:21:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:21:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:21:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:21:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:21:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:21:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:21:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:21:30 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:21:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:21:31 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:31 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:21:31 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:21:31 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:31 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:31 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:21:31 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:31 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:21:32 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:32 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:32 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:21:32 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:32 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:21:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:21:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:21:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:21:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=497 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=497 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=497 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=497 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:21:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:21:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:21:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:21:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:21:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:21:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:21:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:21:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:21:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:21:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:21:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:21:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:21:38 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:21:38 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:21:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:38 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:21:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:38 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:21:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:21:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:21:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:21:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:21:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:21:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:39 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:21:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:21:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:21:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:21:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:21:40 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:21:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:40 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:21:40 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:21:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:40 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:21:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:21:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:21:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:21:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:21:41 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:21:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:41 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:21:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:41 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:21:41 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:21:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:41 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:21:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:21:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:21:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:21:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:21:42 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:21:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:42 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:21:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:42 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:21:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:21:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:21:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:21:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:21:43 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:21:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:43 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:21:44 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:21:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:44 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:21:44 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:21:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:44 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:21:45 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:21:45 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:21:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:46 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:21:46 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:21:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:46 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:21:46 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:21:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:46 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:21:47 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:21:47 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:21:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:47 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:21:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:21:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:21:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:21:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:21:47 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:21:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:21:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:21:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:21:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:21:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:21:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:21:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:21:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:21:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:21:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:21:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:21:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:21:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:21:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:21:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:21:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:21:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:21:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:21:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:21:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:21:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:21:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:21:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:21:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:21:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:21:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:21:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:21:53 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:53 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:21:53 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:21:53 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:53 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:21:53 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:21:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:21:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:21:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:21:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:21:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:21:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:21:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:21:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:21:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:54 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:21:54 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:21:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:54 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:21:54 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:21:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:21:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:21:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:21:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:21:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:21:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:21:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:21:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:21:55 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:21:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:21:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:21:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:21:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:21:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:21:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:21:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:21:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:21:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:21:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:21:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:22:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:22:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:22:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:22:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:22:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:22:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:22:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:22:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:22:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:22:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:22:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:22:00 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:22:00 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:22:00 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:22:00 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:22:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:22:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:22:00 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:01 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:22:01 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:22:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:22:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:22:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:22:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:22:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:22:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:22:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:22:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:22:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:22:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:22:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:01 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:22:01 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:22:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:01 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:22:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:22:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:22:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:22:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:22:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:22:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:02 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:22:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:22:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:22:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:22:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:22:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:22:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:22:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:22:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:22:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:22:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:22:02 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:22:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:22:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:22:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:22:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:22:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:22:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:22:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:22:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:22:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:22:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:22:07 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:22:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:22:07 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:22:07 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:22:07 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:22:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:22:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:22:07 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:08 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:22:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:22:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:22:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:22:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:08 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:22:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:22:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:22:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:22:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:22:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:22:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:22:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:22:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:08 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:22:08 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:22:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:08 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:22:09 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:22:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:22:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:22:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:22:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:22:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:09 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:22:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:22:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:22:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:22:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:22:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:22:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:22:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:22:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:22:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:22:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:22:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:22:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:22:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:22:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:22:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:22:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:22:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:22:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:22:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:22:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:22:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:22:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:22:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:22:14 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:22:14 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:22:14 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:22:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:22:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:22:15 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:15 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:22:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:22:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:22:15 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:15 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:22:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:22:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:22:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:22:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:22:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:22:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:16 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:22:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:22:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:22:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:22:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:22:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:22:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:22:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:22:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:22:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:22:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:22:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:22:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:22:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:22:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:22:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:22:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:22:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:22:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:22:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:22:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:22:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:22:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:22:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:22:22 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:22:22 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:22:22 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:22:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:22:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:22:22 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:22:22 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:22:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:22 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:22:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:23 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:22:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:22:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:22:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:22:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:22:23 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:22:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:22:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:22:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:22:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:24 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:22:24 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:22:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:24 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:22:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:22:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:22:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:22:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:22:24 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:22:25 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:22:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:22:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:22:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:22:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:22:25 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:22:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:26 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:22:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:22:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:22:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:22:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:22:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:22:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:22:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:22:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:22:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:22:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:22:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:22:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=991 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:22:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=991 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:22:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=991 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:22:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=991 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:22:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=991 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:22:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=991 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:22:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=991 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:22:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:22:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:22:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:22:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:22:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:22:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:22:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:22:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:22:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:22:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:22:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:22:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:22:31 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:22:31 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:31 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:22:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:22:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:22:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:22:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:32 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:22:32 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:22:32 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:22:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:22:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:22:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:22:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:22:32 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:22:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:32 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:22:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:22:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:22:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:22:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:33 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:22:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:22:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:22:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:22:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:22:33 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:22:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:22:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:22:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:22:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:33 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:22:33 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:22:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:33 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:22:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:22:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:22:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:22:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:22:34 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:22:34 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:22:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:22:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:22:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:22:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:22:35 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:22:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:35 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:22:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:22:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:22:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:22:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:22:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:22:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:22:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:22:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:22:35 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:22:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:22:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:22:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=991 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:22:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=991 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:22:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=991 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:22:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=991 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:22:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=991 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:22:35 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=991 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:22:40 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:22:40 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:22:40 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:22:40 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:22:40 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:22:40 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:22:40 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:22:40 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:22:40 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:22:40 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:22:40 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:40 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:40 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:22:41 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:22:41 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:22:41 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:22:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:41 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:22:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:22:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:22:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:22:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:22:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:22:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:22:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:41 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:22:41 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:22:41 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:22:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:22:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:22:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:22:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:22:42 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:22:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:42 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:22:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:22:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:22:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:22:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:42 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:22:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:22:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:22:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:22:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:22:43 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:22:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:22:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:22:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:22:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:43 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:22:43 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:22:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:43 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:22:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:22:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:22:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:22:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:22:44 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:22:44 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:22:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:22:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:22:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:22:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:22:45 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:22:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:45 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:22:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:22:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:22:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:22:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:22:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:22:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:22:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:22:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:22:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:22:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:22:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:22:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=992 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:22:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=992 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:22:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=992 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:22:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=992 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:22:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=992 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:22:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=992 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:22:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:22:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:22:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:22:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:22:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:22:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:22:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:22:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:22:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:22:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:22:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:22:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:22:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:22:50 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:22:50 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:22:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:50 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:22:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:22:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:22:51 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:22:51 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:22:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:51 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:22:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:52 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:22:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:22:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:22:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:22:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:22:52 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:22:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:22:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:22:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:22:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:22:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:22:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:53 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:22:53 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:22:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:53 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:22:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:22:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:22:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:22:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:22:53 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:22:54 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:22:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:22:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:22:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:22:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:22:54 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:22:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:22:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:22:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:22:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:22:55 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:22:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:22:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:22:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:22:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:22:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:22:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:22:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:22:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:22:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:22:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:22:55 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:23:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:23:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:23:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:23:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:23:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:23:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:23:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:23:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:23:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:23:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:23:00 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:23:00 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:23:00 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:00 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:23:00 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:23:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:23:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:23:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:23:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:23:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:23:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:23:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:23:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:23:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:23:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:23:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:23:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:23:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:23:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:23:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:23:06 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:23:06 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:23:06 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:23:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:23:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:23:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:23:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:23:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:23:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:23:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:23:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:23:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:23:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:23:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:23:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:23:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:23:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:23:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:23:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:23:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:23:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:23:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:23:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:23:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:23:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:23:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:23:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:11 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:23:11 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:23:11 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:23:11 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:23:11 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:23:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:23:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:23:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:23:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=120 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=121 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:23:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:23:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:23:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:23:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:23:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:23:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:23:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:23:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:23:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:23:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:23:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:23:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:23:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:23:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:23:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:23:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:23:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:23:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:23:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:23:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:23:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:23:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:23:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:23:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:23:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:23:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:23:22 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:23:22 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:23:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:22 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:23:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:23:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:23:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:23:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:22 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:23:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:23:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:23:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:23:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:23:23 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:23:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:23:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:23:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:23:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:23 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:23:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:23:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:23:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:23:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:23:24 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:23:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:23:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:23:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:23:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:24 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:23:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:23:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:23:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:23:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:23:25 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:23:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:23:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:23:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:23:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:25 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:23:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:23:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:23:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:23:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:23:26 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:23:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:23:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:23:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:23:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:26 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:23:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:23:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:23:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:23:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:23:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:23:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:23:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:23:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:27 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:23:27 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-25 14:23:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:27 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:23:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:27 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:23:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:23:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:23:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:23:27 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:23:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:27 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:23:27 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=3, maio=3, ma_len=4
2024-10-25 14:23:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:28 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:23:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:28 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:23:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:23:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:23:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:23:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:28 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:23:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:23:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:23:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:23:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:29 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:23:29 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:23:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:23:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:23:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:23:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:30 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:23:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:23:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:23:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:23:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:30 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:23:30 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:23:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:30 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:23:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:30 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:23:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:23:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:23:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:23:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:30 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:23:30 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:23:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:31 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:23:31 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:23:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:31 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:23:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:23:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:23:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:23:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:31 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:23:31 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:23:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:31 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:23:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:32 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:23:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:32 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:23:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:23:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:23:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:23:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:32 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:23:32 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:23:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:32 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:23:33 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:23:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:33 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:23:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:23:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:23:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:23:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:33 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:23:33 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:23:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:33 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:23:34 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:23:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:34 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:23:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:23:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:23:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:23:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:34 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:23:34 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:23:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:34 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:23:35 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:23:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:35 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:23:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:23:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:23:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:23:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:35 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:23:35 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:23:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:35 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:23:36 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:23:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:36 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:23:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:23:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:23:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:23:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:36 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:23:36 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:23:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:36 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:23:37 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:23:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:37 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:23:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:23:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:23:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:23:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:37 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:23:37 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:23:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:37 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:23:38 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:38 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:23:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:23:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:23:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:23:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:38 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:23:38 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:23:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:38 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 14:23:39 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 14:23:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:39 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:23:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:23:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:23:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:23:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:23:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:23:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:23:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:23:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:23:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:23:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3706 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:23:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:23:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3706 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3706 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3706 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3706 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3706 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3707 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3707 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3707 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3707 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3707 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3707 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3707 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3707 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:23:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:23:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:23:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:23:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:23:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:23:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:23:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:23:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:23:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:23:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:23:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:23:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:23:44 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:23:44 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:23:44 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:23:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:23:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:23:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:23:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:45 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:23:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:23:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:23:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:23:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:23:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:23:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:23:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:23:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:23:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:23:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:23:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:23:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:23:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:23:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:23:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:23:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:23:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:23:51 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:23:51 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:23:52 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:23:52 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:23:53 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:23:53 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:23:54 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:23:54 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:23:55 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:23:55 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:23:56 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:23:56 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:23:57 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:23:57 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:23:58 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:23:58 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:23:59 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:23:59 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:24:00 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:24:00 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:24:01 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:24:01 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:24:01 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:24:02 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:24:02 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:24:03 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:24:03 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:24:04 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:24:04 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:24:05 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:24:05 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:24:06 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:24:06 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:24:07 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:24:07 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 14:24:08 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 14:24:08 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 14:24:09 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 14:24:09 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 14:24:10 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 14:24:10 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 14:24:11 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 14:24:11 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 14:24:12 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 14:24:12 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 14:24:12 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 14:24:13 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 14:24:13 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 14:24:14 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 14:24:14 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 14:24:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:24:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:24:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:24:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:24:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:24:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:24:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:24:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:24:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:24:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:24:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:24:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:24:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:24:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:24:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:24:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:24:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:24:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:24:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:24:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:24:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:24:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:24:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:24:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:24:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:24:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:24:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:24:21 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:24:21 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:24:22 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:24:22 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:24:23 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:24:23 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:24:24 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:24:24 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:24:25 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:24:25 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:24:26 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:24:26 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:24:27 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:24:27 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:24:28 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:24:28 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:24:29 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:24:29 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:24:30 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:24:30 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:24:31 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:24:31 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:24:31 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:24:32 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:24:32 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:24:33 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:24:33 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:24:34 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:24:34 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:24:35 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:24:35 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:24:36 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:24:36 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 14:24:37 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 14:24:37 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 14:24:38 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 14:24:38 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 14:24:39 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 14:24:39 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 14:24:40 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 14:24:40 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 14:24:41 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 14:24:41 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 14:24:42 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 14:24:42 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 14:24:43 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 14:24:43 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 14:24:43 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 14:24:44 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 14:24:44 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 14:24:45 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 14:24:45 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 14:24:46 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 14:24:46 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 14:24:47 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 14:24:47 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 14:24:48 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 14:24:48 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 14:24:49 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 14:24:49 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 14:24:50 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-25 14:24:50 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-25 14:24:51 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-25 14:24:51 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-25 14:24:52 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-25 14:24:52 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-25 14:24:53 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-25 14:24:53 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-25 14:24:53 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-25 14:24:54 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-25 14:24:54 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-25 14:24:55 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-25 14:24:55 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-25 14:24:56 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-25 14:24:56 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-25 14:24:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:24:57 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-25 14:24:57 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-25 14:24:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:24:58 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-25 14:24:58 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-25 14:24:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:24:59 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-25 14:24:59 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-25 14:25:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:25:00 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-25 14:25:00 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-25 14:25:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:25:01 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-25 14:25:01 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-25 14:25:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:25:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:25:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:25:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:25:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:25:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:25:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:25:02 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:25:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:25:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:25:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:25:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:25:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:25:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:25:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:25:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:25:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:25:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:25:07 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:25:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:25:07 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:25:07 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:07 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:25:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:25:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:25:07 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:25:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:25:08 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:25:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:25:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:25:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:25:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:25:08 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:25:09 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:25:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:25:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:25:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:25:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:25:09 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:25:09 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:25:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:25:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:25:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:25:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:25:10 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:25:10 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:25:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:25:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:25:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:25:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:25:11 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:25:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:25:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:25:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:25:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:25:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:25:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:25:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:25:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:25:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:25:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:25:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:25:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:25:11 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:25:11 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:25:11 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:25:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:25:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:25:11 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:25:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:25:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:25:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:25:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:25:12 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:25:12 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:25:13 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:25:13 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:25:14 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:25:14 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:25:15 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:25:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:25:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:25:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:25:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:25:15 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:25:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:25:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:25:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:25:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:25:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:25:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:25:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:25:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:25:15 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:25:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:25:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:25:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:25:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:25:15 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:25:16 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:25:16 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:25:17 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:25:17 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:25:17 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:25:18 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:25:18 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:25:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:25:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:25:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:25:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:25:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:25:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:25:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:25:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:25:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:25:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:25:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:25:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:25:19 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:25:19 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:25:19 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:25:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:25:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:25:19 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:25:19 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:25:20 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:25:20 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:25:21 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:25:21 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:25:22 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:25:22 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:25:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:25:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:25:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:25:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:25:23 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:25:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:25:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:25:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:25:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:25:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:25:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:25:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:25:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:25:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:25:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:25:23 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:25:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3453 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:25:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3453 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:25:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3453 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:25:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3453 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:25:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3453 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:25:23 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3453 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:25:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:25:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:25:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:25:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:25:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:25:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:25:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:25:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:25:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:25:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:25:28 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:25:28 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:25:28 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:25:28 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:28 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:25:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:25:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:25:28 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:25:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:25:29 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:25:29 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:25:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:25:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:25:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:25:29 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:25:29 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:29 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:25:29 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:25:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:25:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:25:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:25:30 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:25:30 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:30 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:25:30 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:25:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:25:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:25:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:25:31 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:25:31 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:31 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:25:31 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:25:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:25:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:25:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:25:32 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:25:32 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:32 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:25:32 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:25:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:25:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:25:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:25:33 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:25:33 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:33 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:25:33 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:34 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:25:34 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:34 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:25:34 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:35 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:25:35 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:35 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:25:35 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:36 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:25:36 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:25:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:25:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:25:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:25:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:25:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:25:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:25:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:25:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:25:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:25:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:25:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:25:36 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:25:36 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:25:36 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:25:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:25:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:25:36 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:25:36 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:37 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:25:37 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:37 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:25:37 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:37 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:25:38 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:38 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:25:38 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:38 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:25:39 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:39 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:25:39 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:39 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:25:40 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:40 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:25:40 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:40 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:25:41 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:25:41 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:41 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:25:41 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:42 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:25:42 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:42 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:25:42 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:43 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:25:43 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:43 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:25:43 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:44 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:25:44 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:25:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:25:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:25:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:25:44 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:25:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:25:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:25:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:25:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:25:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:25:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:25:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:25:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:25:44 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:25:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:25:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:25:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:25:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:25:44 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:44 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 14:25:45 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:45 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 14:25:45 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:45 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 14:25:46 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:46 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 14:25:46 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:46 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 14:25:46 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:46 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 14:25:47 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:47 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 14:25:47 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:47 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 14:25:48 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:48 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 14:25:48 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:48 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 14:25:49 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:49 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 14:25:49 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:49 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 14:25:50 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:50 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 14:25:50 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:50 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 14:25:51 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:51 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 14:25:51 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:25:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:25:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:25:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:25:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:25:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:25:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:25:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:25:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:25:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:25:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:25:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:25:51 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:25:51 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:25:51 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:25:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:25:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:25:51 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 14:25:52 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:52 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 14:25:52 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:52 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 14:25:53 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:53 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 14:25:53 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:53 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 14:25:54 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:54 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 14:25:54 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:54 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 14:25:55 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:55 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 14:25:55 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:55 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 14:25:55 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:56 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 14:25:56 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:56 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 14:25:56 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:57 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 14:25:57 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:57 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 14:25:57 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:57 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-25 14:25:58 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:58 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-25 14:25:58 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:58 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-25 14:25:59 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:25:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:25:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:25:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:25:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:25:59 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:25:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:25:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:25:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:25:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:25:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:25:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:25:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:25:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:25:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6720 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:25:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:25:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:25:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:25:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6720 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:25:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6720 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:25:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6720 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:25:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6720 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:25:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6720 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:25:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6721 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:25:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6721 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:25:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6721 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:25:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6721 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:25:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6721 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:25:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6721 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:25:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6721 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:25:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6721 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:26:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:26:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:26:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:26:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:26:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:26:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:26:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:26:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:26:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:26:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:26:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:26:04 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:26:04 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:26:04 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:26:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:26:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:05 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:26:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:26:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:26:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:26:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:26:05 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:26:06 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:26:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:26:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:26:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:26:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:26:06 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:26:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:26:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:26:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:26:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:26:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:26:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:26:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:26:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:26:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:26:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:26:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:26:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:26:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:26:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:07 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:26:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:26:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:26:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:26:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:26:07 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:26:08 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:26:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:26:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:26:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:26:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:26:08 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:26:09 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:26:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:26:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:26:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:26:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:26:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:26:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:26:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:26:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:26:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:26:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:26:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:26:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:26:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:26:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:26:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:26:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:26:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:26:09 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:26:10 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:26:10 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:26:11 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:26:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:26:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:26:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:26:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:26:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:26:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:26:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:26:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:26:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:26:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:26:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:26:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1497 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:26:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:26:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:26:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:26:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1497 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:26:11 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1497 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:26:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:26:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:26:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:26:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:26:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:26:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:26:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:26:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:26:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:26:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:26:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:26:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:26:16 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:26:16 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:26:16 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:26:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:26:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:26:16 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:17 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:26:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:26:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:26:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:26:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:26:17 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:26:18 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:26:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:26:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:26:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:26:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:26:18 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:26:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:26:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:26:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:26:19 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:26:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:26:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:26:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:26:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:26:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:26:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:26:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:26:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:26:19 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:26:19 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:26:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:19 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:26:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:26:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:26:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:26:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:26:19 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:26:20 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:26:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:26:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:26:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:26:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:26:20 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:26:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:26:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:26:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:26:21 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:26:21 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:26:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:26:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:26:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:26:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:26:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:26:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:26:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:26:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:26:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:26:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:26:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:26:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:26:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:26:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:26:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:26:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:26:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:26:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:26:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:26:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:26:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:26:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:26:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:26:26 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:26:26 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:26:26 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:26:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:26:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:27 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:26:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:26:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:26:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:26:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:26:27 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:26:28 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:26:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:26:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:26:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:26:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:26:28 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:26:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:26:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:26:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:26:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:26:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:26:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:26:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:26:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:26:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:26:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:26:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:26:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:26:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:26:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:29 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:26:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:26:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:26:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:26:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:26:29 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:26:30 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:26:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:26:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:26:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:26:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:26:30 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:26:31 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:26:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:26:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:26:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:26:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:26:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:26:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:26:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:26:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:26:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:26:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:26:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:26:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:26:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:26:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:26:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:26:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:26:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:26:31 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:26:31 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:26:32 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:26:32 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:26:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:26:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:26:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:26:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:26:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:26:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:26:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:26:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:26:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:26:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:26:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:26:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:26:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:26:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:26:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:26:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:26:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:26:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:26:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:26:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:26:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:26:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:26:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:26:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:26:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:26:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:26:38 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:26:38 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:26:38 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:26:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:26:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:26:38 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:39 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:26:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:26:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:26:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:26:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:26:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:26:40 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:26:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:26:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:26:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:26:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:26:40 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:26:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:26:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:26:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:26:41 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:26:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:26:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:26:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:26:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:26:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:26:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:26:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:26:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:26:41 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:26:41 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:26:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:41 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:26:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:26:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:26:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:26:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:26:41 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:26:42 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:26:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:26:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:26:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:26:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:26:42 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:26:43 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:26:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:26:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:26:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:26:43 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:26:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:26:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:26:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:26:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:26:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:26:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:26:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:26:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:26:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1041 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:26:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:26:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:26:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:26:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1041 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:26:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1041 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:26:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1042 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:26:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1042 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:26:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1042 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:26:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1042 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:26:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1042 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:26:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1042 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:26:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1042 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:26:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1042 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:26:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:26:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:26:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:26:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:26:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:26:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:26:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:26:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:26:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:26:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:26:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:26:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:26:48 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:26:48 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:26:48 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:26:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:26:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:49 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:26:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:26:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:26:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:26:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:26:49 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:26:50 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:26:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:26:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:26:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:26:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:26:50 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:26:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:26:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:26:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:26:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:26:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:26:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:26:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:26:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:26:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:26:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:26:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:26:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:26:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:26:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:26:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=597 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:26:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=597 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:26:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=597 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:26:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=597 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:26:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=597 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:26:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=597 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:26:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=597 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:26:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:26:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:26:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:26:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:26:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:26:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:26:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:26:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:26:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:26:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:26:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:26:56 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:26:56 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:26:56 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:26:56 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:26:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:26:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:26:56 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:57 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:26:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:26:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:26:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:26:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:26:57 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:26:58 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:26:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:26:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:26:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:26:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:26:58 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:26:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:26:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:26:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:26:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:26:58 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:26:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:26:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:26:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:26:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:26:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:26:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:26:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:26:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:26:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:26:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:26:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:26:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=579 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:26:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=579 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:26:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=579 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:26:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=579 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:26:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=579 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:26:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=579 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:26:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=579 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:26:58 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=579 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:27:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:27:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:27:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:27:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:27:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:27:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:27:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:27:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:27:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:27:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:27:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:27:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:27:04 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:27:04 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:27:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:27:04 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:27:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:27:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:27:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:27:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:27:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:27:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:27:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:27:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:27:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:27:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:27:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:27:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:27:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:27:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:27:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:27:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:27:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:27:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:27:04 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:27:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:27:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:27:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:27:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:27:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:27:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:27:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:27:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:27:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:27:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:27:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:27:09 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:09 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:27:10 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:27:10 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:27:10 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:27:10 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:27:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:27:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:10 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:27:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:27:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:27:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:27:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:27:10 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:27:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:27:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:27:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:27:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:27:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:27:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:27:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:27:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:27:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:27:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:27:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:27:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:27:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:27:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:27:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:27:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:27:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:27:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:27:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:27:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:27:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:27:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:27:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:27:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:27:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:27:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:27:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:27:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:27:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:27:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:27:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:27:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:27:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:27:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:27:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:27:16 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:27:16 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:27:16 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:27:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:27:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:16 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:27:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:27:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:27:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:27:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:27:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:27:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:27:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:27:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:27:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:27:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:27:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:27:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:27:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:27:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:27:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:27:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:27:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:27:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:27:17 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:27:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:27:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:27:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:27:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:27:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:27:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:27:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:27:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:27:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:27:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:27:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:27:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:27:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:27:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:27:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:27:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:27:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:27:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:27:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:27:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:27:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:27:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:27:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:27:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:27:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:27:23 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:27:23 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:27:23 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:27:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:27:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:27:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:27:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:27:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:27:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:27:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:27:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:27:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:27:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:27:23 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:27:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:23 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:27:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:27:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:27:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:27:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:27:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:27:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:27:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:27:23 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:27:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:27:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:27:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:27:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:27:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:27:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:27:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:27:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:27:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:27:23 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:27:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:23 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:27:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:27:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:27:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:27:24 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:27:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:27:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:27:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:27:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:27:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:27:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:27:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:27:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:27:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=370 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:27:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:27:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:27:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:27:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=370 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:27:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=370 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:27:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=370 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:27:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:27:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:27:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:27:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:27:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:27:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:27:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:27:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:27:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:27:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:27:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:27:29 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:27:29 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:27:29 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:27:29 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:27:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:27:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:27:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:27:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:27:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:27:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:27:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:27:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:27:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:27:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:27:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:27:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:27:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:27:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:27:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:30 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:27:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:27:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:27:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:27:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:27:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:27:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:27:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:27:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:27:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:27:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:27:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:27:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:27:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:27:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:27:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:27:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:27:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:27:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:27:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:27:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:27:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:27:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:27:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:27:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:27:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:27:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:27:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:27:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:27:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:27:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:27:35 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:27:35 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:27:35 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:27:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:27:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:27:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:27:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:27:36 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:27:36 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:27:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:27:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:27:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:27:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:27:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:27:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:27:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:27:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:27:36 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:27:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:27:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:27:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:27:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:27:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:27:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:27:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:27:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:27:36 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:27:36 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:27:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:36 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:27:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:27:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:27:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:27:37 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:27:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:27:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:27:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:27:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:27:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:27:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:27:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:27:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:27:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:27:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:27:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:27:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=370 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:27:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=370 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:27:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=370 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:27:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=370 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:27:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=370 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:27:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=370 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:27:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=370 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:27:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:27:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:27:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:27:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:27:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:27:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:27:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:27:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:27:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:27:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:27:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:27:42 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:27:42 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:27:42 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:27:42 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:27:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:27:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:27:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:27:43 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:27:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:27:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:27:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:27:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:27:43 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:27:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:27:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:27:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:27:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:27:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:27:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:27:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:27:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:27:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:27:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:27:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:27:44 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:27:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:27:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:27:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:27:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:27:44 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:27:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD NOHANDOVER
2024-10-25 14:27:45 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:27:45 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD NOHANDOVER
2024-10-25 14:27:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:27:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:27:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:27:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:27:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:27:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:27:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:27:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:27:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:27:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:27:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=626 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:27:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:27:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:27:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:27:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=626 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:27:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=626 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:27:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=626 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:27:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:27:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:27:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:27:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:27:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:27:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:27:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:27:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:27:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:27:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:27:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:27:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:27:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:27:50 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:27:50 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:27:50 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:27:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:27:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:27:51 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:27:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:27:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:27:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:27:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:27:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:27:51 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:27:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:27:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:27:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:27:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:27:52 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:27:52 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:27:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:27:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:27:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:27:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:27:53 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:27:53 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:27:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:27:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:27:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:27:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:27:54 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:27:54 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:27:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:27:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:27:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:27:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:27:55 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:27:55 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:27:56 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:27:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:27:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:27:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:27:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:27:56 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:27:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD NOHANDOVER
2024-10-25 14:27:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:27:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:27:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:27:57 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:27:57 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:27:58 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:27:58 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:27:59 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:27:59 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:27:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:27:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:27:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:27:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:27:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:27:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:27:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:27:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:27:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:27:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:27:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:27:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:27:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:27:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2068 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:27:59 [WARNING] transceiver.py:250 (TRX2@172.18.96.20:5700/2) RX TRXD message (ver=1 fn=2068 tn=0 bl=148 pwr=8), but transceiver is not running => dropping...
2024-10-25 14:27:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2068 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:27:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2068 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:27:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2068 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:27:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2068 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:27:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2068 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:27:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2068 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:27:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2068 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:28:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:28:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:28:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:28:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:28:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:28:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:28:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:28:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:28:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:28:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:28:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:28:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:28:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:28:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:28:05 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:28:05 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:28:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:28:05 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:28:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:28:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:28:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:28:05 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:28:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:28:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:28:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:28:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:28:06 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:28:06 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:28:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:28:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:28:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:28:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:28:07 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:28:07 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:28:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:28:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:28:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:28:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:28:08 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:28:08 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:28:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:28:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:28:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:28:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:28:09 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:28:09 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:28:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:28:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:28:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:28:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:28:10 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:28:10 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:28:11 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:28:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:28:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:28:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:28:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:28:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:28:11 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:28:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD NOHANDOVER
2024-10-25 14:28:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:28:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:28:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:28:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:28:11 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:28:12 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:28:12 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:28:13 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:28:13 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:28:14 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:28:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:28:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:28:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:28:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:28:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:28:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:28:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:28:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:28:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:28:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:28:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:28:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:28:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:28:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:28:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:28:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:28:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:28:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:28:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:28:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:28:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:28:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:28:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:28:19 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:28:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:28:19 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:28:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:28:20 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:28:20 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:28:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:28:20 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:28:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:28:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:28:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:28:20 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:28:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:28:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:28:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:28:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:28:20 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:28:21 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:28:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:28:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:28:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:28:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:28:21 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:28:22 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:28:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:28:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:28:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:28:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:28:22 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:28:23 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:28:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:28:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:28:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:28:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:28:23 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:28:24 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:28:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:28:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:28:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:28:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:28:24 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:28:25 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:28:25 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:28:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:28:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:28:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:28:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:28:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:28:26 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:28:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD NOHANDOVER
2024-10-25 14:28:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:28:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:28:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:28:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:28:26 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:28:27 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:28:27 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:28:28 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:28:28 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:28:29 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:28:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:28:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:28:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:28:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:28:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:28:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:28:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:28:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:28:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:28:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:28:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:28:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:28:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:28:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:28:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:28:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:28:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:28:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:28:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:28:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:28:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:28:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:28:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:28:34 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:28:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:28:34 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:28:34 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:28:34 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:28:34 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:28:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:28:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:28:35 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:28:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:28:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:28:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:28:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:28:35 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:28:36 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:28:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:28:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:28:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:28:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:28:36 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:28:37 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:28:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:28:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:28:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:28:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:28:37 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:28:38 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:28:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:28:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:28:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:28:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:28:38 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:28:39 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:28:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:28:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:28:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:28:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:28:39 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:28:40 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:28:40 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:28:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:28:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:28:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:28:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:28:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:28:40 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:28:40 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD NOHANDOVER
2024-10-25 14:28:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:28:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:28:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:28:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:28:41 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:28:41 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:28:42 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:28:42 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:28:43 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:28:43 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:28:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:28:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:28:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:28:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:28:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:28:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:28:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:28:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:28:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:28:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:28:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:28:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:28:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:28:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:28:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:28:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:28:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:28:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:28:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:28:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:28:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:28:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:28:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:28:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:28:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:28:49 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:28:49 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:28:49 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:28:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:28:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:28:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:28:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:28:49 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:28:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:28:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:28:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:28:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:28:50 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:28:50 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:28:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:28:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:28:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:28:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:28:51 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:28:51 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:28:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:28:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:28:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:28:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:28:52 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:28:52 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:28:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:28:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:28:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:28:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:28:53 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:28:53 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:28:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:28:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:28:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:28:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:28:54 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:28:54 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:28:55 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:28:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:28:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:28:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:28:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:28:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:28:55 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:28:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD NOHANDOVER
2024-10-25 14:28:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:28:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:28:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:28:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:28:56 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:28:56 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:28:57 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:28:57 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:28:58 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:28:58 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:28:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:28:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:28:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:28:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:28:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:28:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:28:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:28:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:28:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:28:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:28:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:28:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:28:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:29:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:29:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:29:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:29:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:29:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:29:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:29:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:29:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:29:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:29:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:29:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:29:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:29:04 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:29:04 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:29:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:29:04 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:29:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:29:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:29:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:29:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:29:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:29:05 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:29:05 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:29:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:29:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:29:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:29:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:29:06 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:29:06 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:29:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:29:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:29:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:29:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:29:07 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:29:07 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:29:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:29:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:29:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:29:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:29:07 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:29:08 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:29:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:29:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:29:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:29:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:29:08 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:29:09 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:29:09 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:29:10 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:29:10 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:29:11 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:29:11 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:29:12 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:29:12 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:29:13 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:29:13 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:29:14 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:29:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:29:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:29:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:29:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:29:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:29:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:29:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:29:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:29:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:29:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:29:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:29:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:29:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:29:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:29:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:29:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:29:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:29:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:29:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:29:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:29:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:29:19 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:29:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:29:19 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:29:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:29:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:29:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:29:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:29:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:29:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:29:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:29:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:29:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:29:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:29:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:29:24 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:29:24 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:29:24 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:29:24 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:29:24 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:29:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:29:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:29:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:29:25 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:29:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:29:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:29:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:29:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:29:25 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:29:26 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:29:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:29:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:29:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:29:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:29:26 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:29:27 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:29:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:29:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:29:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:29:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:29:27 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:29:28 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:29:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:29:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:29:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:29:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:29:28 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:29:29 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:29:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:29:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:29:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:29:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:29:29 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:29:29 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:29:30 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:29:30 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:29:31 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:29:31 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:29:32 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:29:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:29:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:29:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:29:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:29:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:29:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:29:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:29:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:29:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:29:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:29:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:29:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:29:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:29:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:29:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:29:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:29:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:29:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:29:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:29:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:29:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:29:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:29:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:29:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:29:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:29:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:29:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:29:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:29:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:29:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:29:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:29:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:29:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:29:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:29:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:29:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:29:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:42 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:29:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:29:43 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:29:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:29:43 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:29:43 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:29:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:29:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:29:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:29:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:29:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:29:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:29:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:29:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:29:43 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:29:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:29:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:29:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:29:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:29:44 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:29:44 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:29:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:29:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:29:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:29:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:29:45 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:29:45 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:29:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:29:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:29:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:29:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:29:46 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:29:46 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:29:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:29:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:29:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:29:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:29:47 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:29:47 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:29:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:29:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:29:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:29:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:29:48 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:29:48 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:29:49 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:29:49 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:29:49 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:29:50 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:29:50 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:29:51 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:29:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:29:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:29:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:29:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:29:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:29:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:29:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:29:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:29:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:29:51 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:29:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1854 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:29:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:29:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:29:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:29:51 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1854 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:29:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:29:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:29:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:29:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:29:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:29:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:29:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:29:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:29:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:29:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:29:56 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:29:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:29:56 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:29:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:30:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:30:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:30:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:30:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:30:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:30:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:30:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:30:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:30:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:30:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:30:01 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:30:02 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:30:02 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:30:02 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:30:02 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:30:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:30:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:30:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:30:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:30:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:30:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:30:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:30:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:30:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:30:02 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:30:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:30:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:30:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:30:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:30:02 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:30:03 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:30:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:30:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:30:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:30:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:30:03 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:30:04 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:30:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:30:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:30:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:30:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:30:04 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:30:05 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:30:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:30:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:30:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:30:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:30:05 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:30:06 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:30:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:30:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:30:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:30:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:30:06 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:30:07 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:30:07 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:30:08 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:30:08 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:30:09 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:30:09 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:30:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:30:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:30:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:30:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:30:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:30:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:30:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:30:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:30:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:30:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:30:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:30:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:30:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:30:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:30:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:30:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:30:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:30:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:30:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:30:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:30:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:30:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:30:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:30:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:30:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:30:15 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:30:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:30:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:30:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:30:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:30:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:30:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:30:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:30:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:30:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:30:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:30:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:30:20 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:30:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:30:20 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:30:20 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:30:20 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:30:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:30:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:30:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:30:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:30:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:30:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:30:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:30:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:30:21 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:30:22 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:30:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:30:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:30:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:30:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:30:22 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:30:23 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:30:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:30:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:30:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:30:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:30:23 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:30:23 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:30:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:30:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:30:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:30:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:30:24 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:30:24 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:30:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:30:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:30:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:30:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:30:25 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:30:25 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:30:26 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:30:26 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:30:27 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:30:27 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:30:28 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:30:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:30:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:30:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:30:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:30:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:30:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:30:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:30:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:30:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:30:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:30:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:30:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:30:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:30:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:30:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:30:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:30:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:30:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:30:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:30:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:30:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:30:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:30:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:30:33 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:30:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:30:33 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:30:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:30:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:30:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:30:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:30:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:30:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:30:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:30:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:30:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:30:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:30:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:30:38 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:30:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:30:39 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:30:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:30:39 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:30:39 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:30:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:30:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:30:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:30:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:30:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:30:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:30:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:30:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:30:39 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:30:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:30:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:30:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:30:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:30:40 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:30:40 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:30:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:30:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:30:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:30:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:30:41 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:30:41 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:30:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:30:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:30:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:30:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:30:42 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:30:42 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:30:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:30:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:30:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:30:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:30:43 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:30:43 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:30:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:30:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:30:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:30:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:30:44 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:30:44 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:30:44 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:30:45 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:30:45 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:30:46 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:30:46 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:30:47 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:30:47 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:30:48 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:30:48 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:30:49 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:30:49 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:30:50 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:30:50 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:30:51 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:30:51 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:30:52 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:30:52 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:30:53 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:30:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:30:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:30:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:30:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:30:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:30:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:30:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:30:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:30:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:30:53 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:30:53 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:30:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:30:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:30:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:30:53 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3131 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:30:53 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3131 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:30:53 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3131 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:30:53 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3131 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:30:53 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3131 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:30:53 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3131 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:30:53 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3131 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:30:53 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3131 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:30:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:30:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:30:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:30:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:30:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:30:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:30:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:30:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:30:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:30:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:30:58 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:30:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:30:58 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:30:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:31:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:31:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:31:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:31:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:31:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:31:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:31:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:31:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:31:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:31:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:31:03 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:31:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:31:04 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:31:04 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:31:04 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:31:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:31:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:31:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:31:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:31:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:31:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:31:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:31:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:31:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:31:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:31:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:31:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:31:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:31:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:31:04 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:31:05 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:31:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:31:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:31:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:31:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:31:05 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:31:06 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:31:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:31:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:31:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:31:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:31:06 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:31:07 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:31:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:31:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:31:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:31:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:31:07 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:31:08 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:31:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:31:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:31:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:31:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:31:08 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:31:09 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:31:09 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:31:10 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:31:10 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:31:11 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:31:11 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:31:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:31:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:31:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:31:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:31:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:31:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:31:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:31:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:31:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:31:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:31:12 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1831 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:31:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:31:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:31:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:31:12 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1831 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:31:12 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1831 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:31:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:31:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:31:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:31:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:31:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:31:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:31:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:31:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:31:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:31:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:31:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:31:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:31:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:31:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:31:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:31:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:31:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:31:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:31:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:31:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:31:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:31:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:31:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:31:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:31:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:31:22 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:31:22 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:31:22 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:31:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:31:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:31:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:31:23 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:31:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:31:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:31:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:31:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:31:23 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:31:24 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:31:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:31:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:31:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:31:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:31:24 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:31:24 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:31:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:31:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:31:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:31:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:31:25 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:31:25 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:31:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:31:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:31:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:31:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:31:26 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:31:26 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:31:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:31:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:31:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:31:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:31:27 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:31:27 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:31:28 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:31:28 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:31:29 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:31:29 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:31:30 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:31:30 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:31:31 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:31:31 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:31:32 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:31:32 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:31:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:31:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:31:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:31:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:31:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:31:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:31:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:31:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:31:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:31:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:31:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:31:32 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:31:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:31:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2250 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:31:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2250 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:31:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2250 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:31:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2250 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:31:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2250 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:31:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2250 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:31:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2250 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:31:32 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2250 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:31:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:31:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:31:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:31:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:31:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:31:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:31:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:31:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:31:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:31:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:31:37 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:31:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:31:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:31:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:31:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:31:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:31:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:31:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:31:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:31:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:31:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:31:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:31:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:31:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:42 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:31:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:31:43 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:31:43 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:31:43 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:31:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:31:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:31:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:31:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:31:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:31:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:31:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:31:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:31:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:31:43 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:31:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:31:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:31:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:31:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:31:44 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:31:44 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:31:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:31:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:31:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:31:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:31:45 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:31:45 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:31:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:31:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:31:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:31:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:31:46 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:31:46 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:31:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:31:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:31:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:31:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:31:47 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:31:47 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:31:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:31:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:31:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:31:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:31:47 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:31:48 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:31:48 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:31:49 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:31:49 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:31:50 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:31:50 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:31:51 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:31:51 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:31:52 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:31:52 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:31:53 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:31:53 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:31:54 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:31:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:31:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:31:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:31:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:31:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:31:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:31:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:31:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:31:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:31:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:31:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:31:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:31:54 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2472 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:31:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:31:54 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2472 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:31:54 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2472 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:31:54 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2472 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:31:54 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2472 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:31:54 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2472 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:31:54 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2473 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:31:54 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2473 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:31:54 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2473 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:31:54 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2473 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:31:54 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2473 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:31:54 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2473 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:31:54 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2473 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:31:54 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2473 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:31:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:31:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:31:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:31:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:31:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:31:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:31:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:31:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:31:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:31:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:31:59 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:31:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:31:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:31:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:32:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:32:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:32:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:32:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:32:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:32:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:32:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:32:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:32:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:32:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:32:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:32:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:32:04 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:32:04 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:32:04 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:32:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:32:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:32:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:32:05 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:32:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:32:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:32:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:32:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:32:05 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:32:06 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:32:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:32:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:32:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:32:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:32:06 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:32:07 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:32:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:32:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:32:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:32:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:32:07 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:32:08 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:32:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:32:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:32:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:32:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:32:08 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:32:09 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:32:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:32:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:32:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:32:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:32:09 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:32:10 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:32:10 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:32:11 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:32:11 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:32:12 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:32:12 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:32:12 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:32:13 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:32:13 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:32:14 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:32:14 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:32:15 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:32:15 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:32:16 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:32:16 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:32:17 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:32:17 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:32:18 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:32:18 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:32:19 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:32:19 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:32:20 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:32:20 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:32:21 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 14:32:21 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 14:32:22 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 14:32:22 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 14:32:22 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 14:32:23 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 14:32:23 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 14:32:24 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 14:32:24 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 14:32:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:32:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:32:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:32:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:32:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:32:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:32:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:32:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:32:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:32:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:32:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:32:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:32:24 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:32:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4393 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:32:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4393 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:32:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4393 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:32:24 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4393 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:32:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:32:29 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:32:29 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:32:29 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:32:29 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:32:29 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:32:29 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:32:29 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:32:29 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:32:29 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:32:29 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:32:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:32:29 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:32:29 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:32:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:32:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:32:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:32:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:32:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:32:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:32:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:32:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:32:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:32:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:32:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:32:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:32:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:32:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:32:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:32:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:32:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:32:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:32:35 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:32:35 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:32:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:32:35 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:32:35 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:32:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:32:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:32:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:32:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:32:36 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:32:36 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:32:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:32:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:32:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:32:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:32:37 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:32:37 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:32:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:32:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:32:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:32:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:32:38 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:32:38 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:32:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:32:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:32:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:32:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:32:39 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:32:39 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:32:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:32:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:32:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:32:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:32:40 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:32:40 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:32:41 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:32:41 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:32:42 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:32:42 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:32:43 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:32:43 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:32:44 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:32:44 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:32:45 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:32:45 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:32:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:32:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:32:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:32:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:32:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:32:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:32:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:32:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:32:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:32:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:32:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:32:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:32:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:32:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:32:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:32:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:32:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:32:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:32:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:32:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:32:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:32:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:32:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:32:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:32:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:32:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:32:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:32:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:32:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:32:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:32:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:32:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:32:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:32:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:32:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:32:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:32:55 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:32:56 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:32:56 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:32:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:32:56 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:32:56 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:32:56 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:32:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:32:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:32:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:32:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:32:57 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:32:57 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:32:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:32:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:32:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:32:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:32:58 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:32:58 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:32:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:32:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:32:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:32:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:32:59 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:32:59 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:32:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:32:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:32:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:32:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:32:59 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:33:00 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:33:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:33:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:33:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:33:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:33:00 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:33:01 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:33:01 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:33:02 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:33:02 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:33:03 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:33:03 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:33:04 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:33:04 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:33:05 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:33:05 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:33:06 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:33:06 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:33:07 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:33:07 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:33:08 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:33:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:33:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:33:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:33:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:33:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:33:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:33:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:33:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:33:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:33:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:33:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:33:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:33:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:33:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:33:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:33:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:33:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:33:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:33:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:33:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:33:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:33:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:33:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:33:13 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:33:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:33:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:33:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:33:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:33:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:33:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:33:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:33:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:33:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:33:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:33:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:33:18 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:33:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:33:18 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:33:18 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:33:18 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:33:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:33:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:33:18 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:33:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:33:19 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:33:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:33:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:33:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:33:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:33:19 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:33:20 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:33:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:33:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:33:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:33:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:33:20 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:33:21 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:33:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:33:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:33:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:33:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:33:21 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:33:22 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:33:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:33:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:33:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:33:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:33:22 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:33:23 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:33:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:33:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:33:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:33:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:33:23 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:33:24 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:33:24 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:33:25 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:33:25 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:33:25 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:33:26 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:33:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:33:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:33:26 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:33:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:33:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:33:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:33:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:33:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:33:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:33:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:33:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:33:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:33:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:33:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:33:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1832 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:33:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1832 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:33:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1832 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:33:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1832 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:33:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1832 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:33:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1832 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:33:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:33:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:33:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:33:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:33:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:33:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:33:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:33:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:33:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:33:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:33:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:33:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:33:31 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:33:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:33:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:33:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:33:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:33:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:33:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:33:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:33:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:33:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:33:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:33:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:33:36 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:36 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:33:37 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:33:37 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:33:37 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:33:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:33:37 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:33:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:33:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:33:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:33:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:33:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:33:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:33:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:33:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:33:37 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:33:37 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-25 14:33:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:33:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:33:37 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:33:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:33:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:33:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:33:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:33:38 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:33:38 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:33:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:33:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:33:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:33:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:33:39 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:33:39 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:33:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:33:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:33:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:33:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:33:40 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:33:40 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:33:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:33:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:33:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:33:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:33:41 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:33:41 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:33:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:33:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:33:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:33:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:33:42 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:33:42 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:33:43 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:33:43 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:33:44 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:33:44 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:33:45 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:33:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:33:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:33:45 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:33:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:33:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:33:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:33:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:33:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:33:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:33:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:33:45 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:33:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1828 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:33:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:33:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:33:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:33:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1828 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:33:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1828 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:33:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1828 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:33:45 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1828 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:33:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:33:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:33:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:33:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:33:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:33:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:33:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:33:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:33:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:33:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:33:50 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:33:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:33:50 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:33:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:33:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:33:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:33:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:33:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:33:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:33:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:33:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:33:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:33:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:33:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:33:55 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:33:55 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:33:56 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:33:56 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:33:56 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:33:56 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:33:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:33:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:33:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:33:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:33:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:33:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:33:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:33:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:33:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:33:56 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:33:56 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-25 14:33:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:33:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:33:56 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:33:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:33:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:33:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:33:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:33:57 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:33:57 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:33:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:33:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:33:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:33:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:33:58 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:33:58 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:33:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:33:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:33:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:33:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:33:59 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:33:59 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:33:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:33:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:33:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:33:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:33:59 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:34:00 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:34:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:34:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:34:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:34:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:34:00 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:34:01 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:34:01 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:34:02 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:34:02 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:34:03 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:34:03 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:34:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:34:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:34:04 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:34:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:34:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:34:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:34:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:34:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:34:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:34:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:34:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:34:04 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:34:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:34:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:34:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:34:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:34:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:34:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:34:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:34:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:34:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:34:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:34:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:34:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:34:09 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:34:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:34:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:34:09 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:34:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:34:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:34:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:34:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:34:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:34:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:34:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:34:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:34:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:34:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:34:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:34:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:34:14 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:34:14 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:34:14 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:34:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:34:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:34:14 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:34:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:34:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:34:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:34:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:34:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:34:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:34:15 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:34:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:34:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:34:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:34:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:34:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:34:16 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:34:17 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:34:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:34:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:34:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:34:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:34:17 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:34:18 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:34:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:34:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:34:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:34:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:34:18 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:34:19 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:34:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:34:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:34:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:34:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:34:19 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:34:20 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:34:20 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:34:20 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:34:21 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:34:21 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:34:22 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:34:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:34:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:34:22 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:34:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:34:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:34:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:34:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:34:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:34:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:34:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:34:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:34:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:34:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:34:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:34:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:34:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:34:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:34:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:34:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:34:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:34:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:34:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:34:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:34:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:34:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:34:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:34:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:34:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:34:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:34:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:34:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:34:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:34:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:34:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:34:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:34:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:34:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:34:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:34:32 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:32 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:34:33 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:34:33 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:34:33 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:34:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:34:33 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:34:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:34:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:34:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:34:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:34:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:34:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:34:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:34:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:34:33 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:34:33 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-25 14:34:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:34:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:34:33 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:34:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:34:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:34:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:34:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:34:34 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:34:34 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:34:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:34:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:34:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:34:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:34:35 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:34:35 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:34:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:34:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:34:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:34:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:34:36 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:34:36 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:34:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:34:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:34:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:34:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:34:37 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:34:37 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:34:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:34:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:34:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:34:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:34:38 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:34:38 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:34:39 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:34:39 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:34:40 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:34:40 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:34:41 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:34:41 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:34:42 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:34:42 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:34:42 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:34:43 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:34:43 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:34:44 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:34:44 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:34:45 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:34:45 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:34:46 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:34:46 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:34:47 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:34:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:34:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:34:47 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:34:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:34:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:34:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:34:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:34:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:34:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:34:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:34:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:34:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:34:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:34:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:34:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:34:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:34:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:34:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:34:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:34:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:34:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:34:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:34:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:34:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:34:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:34:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:34:52 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:34:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:34:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:34:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:34:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:34:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:34:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:34:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:34:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:34:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:34:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:34:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:34:57 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:34:57 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:34:58 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:34:58 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:34:58 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:34:58 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:34:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:34:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:34:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:34:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:34:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:34:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:34:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:34:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:34:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:34:58 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:34:58 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-25 14:34:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:34:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:34:58 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:34:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:34:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:34:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:34:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:34:59 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:34:59 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:34:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:34:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:34:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:34:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:34:59 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:35:00 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:35:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:35:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:35:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:35:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:35:00 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:35:01 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:35:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:35:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:35:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:35:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:35:01 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:35:02 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:35:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:35:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:35:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:35:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:35:02 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:35:03 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:35:03 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:35:04 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:35:04 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:35:05 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:35:05 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:35:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:35:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:35:06 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:35:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:35:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:35:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:35:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:35:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:35:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:35:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:35:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:35:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:35:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:35:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:35:06 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1831 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:35:06 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1831 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:35:06 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1831 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:35:06 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1831 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:35:06 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1831 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:35:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:35:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:35:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:35:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:35:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:35:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:35:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:35:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:35:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:35:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:35:11 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:35:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:35:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:35:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:35:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:35:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:35:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:35:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:35:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:35:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:35:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:35:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:35:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:35:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:35:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:35:16 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:35:16 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:35:16 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:35:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:35:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:35:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:35:17 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:35:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:35:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:35:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:35:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:35:17 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:35:18 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:35:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:35:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:35:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:35:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:35:18 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:35:19 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:35:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:35:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:35:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:35:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:35:19 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:35:20 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:35:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:35:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:35:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:35:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:35:20 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:35:21 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:35:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:35:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:35:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:35:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:35:21 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:35:21 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:35:22 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:35:22 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:35:23 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:35:23 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:35:24 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:35:24 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:35:25 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:35:25 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:35:26 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:35:26 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:35:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:35:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:35:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:35:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:35:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:35:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:35:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:35:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:35:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:35:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:35:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2256 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:35:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:35:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:35:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:35:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2256 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:35:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2256 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:35:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2256 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:35:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2256 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:35:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2256 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:35:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:35:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:35:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:35:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:35:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:35:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:35:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:35:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:35:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:35:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:35:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:35:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:35:31 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:35:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:35:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:35:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:35:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:35:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:35:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:35:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:35:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:35:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:35:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:35:36 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:36 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:35:37 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:35:37 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:35:37 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:35:37 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:35:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:35:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:35:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:35:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:35:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:35:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:35:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:35:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:35:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:35:37 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:35:37 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=2, maio=0, ma_len=2
2024-10-25 14:35:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:35:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:35:37 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:35:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:35:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:35:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:35:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:35:38 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:35:38 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:35:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:35:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:35:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:35:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:35:39 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:35:39 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:35:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:35:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:35:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:35:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:35:40 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:35:40 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:35:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:35:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:35:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:35:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:35:41 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:35:41 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:35:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:35:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:35:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:35:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:35:42 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:35:42 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:35:43 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:35:43 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:35:44 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:35:44 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:35:44 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:35:45 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:35:45 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:35:46 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:35:46 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:35:47 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:35:47 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:35:48 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:35:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:35:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:35:48 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:35:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:35:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:35:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:35:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:35:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:35:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:35:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:35:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:35:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:35:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:35:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:35:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2466 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:35:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2466 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:35:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2466 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:35:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2466 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:35:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2466 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:35:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2466 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:35:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2466 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:35:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=2466 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:35:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:35:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:35:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:35:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:35:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:35:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:35:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:35:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:35:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:35:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:35:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:35:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:35:53 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:35:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:35:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:35:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:35:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:35:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:35:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:35:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:35:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:35:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:35:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:35:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:35:58 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:35:58 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:35:58 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:35:58 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:35:58 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:35:58 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:35:59 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:35:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:35:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:35:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:35:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:35:59 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:36:00 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:36:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:36:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:36:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:36:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:36:00 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:36:01 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:36:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:36:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:36:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:36:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:36:01 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:36:02 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:36:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:36:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:36:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:36:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:36:02 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:36:03 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:36:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:36:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:36:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:36:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:36:03 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:36:04 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:36:04 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:36:05 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:36:05 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:36:06 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:36:06 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:36:06 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:36:07 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:36:07 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:36:08 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:36:08 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:36:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:36:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:36:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:36:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:36:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:36:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:36:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:36:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:36:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:36:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:36:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:36:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:36:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:36:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:36:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:36:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:36:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:36:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:36:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:36:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:36:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:36:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:36:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:36:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:36:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:36:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:36:14 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:36:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:36:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:36:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:36:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:36:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:36:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:36:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:36:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:36:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:36:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:36:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:36:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:36:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:36:19 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:36:19 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:36:19 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:36:19 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:36:19 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:36:19 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:36:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:36:20 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:36:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:36:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:36:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:36:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:36:20 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:36:20 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:36:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:36:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:36:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:36:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:36:21 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:36:21 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:36:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:36:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:36:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:36:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:36:22 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:36:22 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:36:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:36:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:36:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:36:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:36:23 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:36:23 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:36:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:36:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:36:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:36:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:36:24 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:36:24 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:36:25 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:36:25 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:36:26 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:36:26 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:36:27 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:36:27 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:36:28 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:36:28 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:36:29 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:36:29 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:36:30 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:36:30 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:36:31 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:36:31 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:36:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:36:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:36:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:36:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:36:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:36:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:36:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:36:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:36:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:36:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:36:31 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:36:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:36:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:36:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:36:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:36:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:36:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:36:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:36:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:36:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:36:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:36:36 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:36:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:36:36 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:36:37 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:36:37 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:36:37 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:36:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:36:37 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:36:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:36:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:36:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:36:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:36:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:36:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:36:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:36:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:36:37 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:36:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:36:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:36:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:36:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:36:38 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:36:38 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:36:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:36:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:36:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:36:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:36:39 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:36:39 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:36:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:36:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:36:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:36:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:36:39 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:36:40 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:36:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:36:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:36:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:36:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:36:40 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:36:41 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:36:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:36:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:36:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:36:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:36:41 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:36:42 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:36:42 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:36:43 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:36:43 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:36:44 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:36:44 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:36:45 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:36:45 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:36:46 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:36:46 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:36:47 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:36:47 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:36:48 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:36:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:36:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:36:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:36:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:36:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:36:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:36:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:36:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:36:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:36:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:36:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:36:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:36:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:36:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:36:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:36:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:36:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:36:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:36:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:36:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:36:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:36:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:36:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:36:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:36:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:36:53 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:36:53 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:36:53 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:36:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:36:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:36:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:36:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:36:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:36:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:36:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:36:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:36:54 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:36:55 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:36:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:36:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:36:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:36:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:36:55 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:36:56 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:36:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:36:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:36:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:36:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:36:56 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:36:57 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:36:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:36:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:36:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:36:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:36:57 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:36:58 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:36:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:36:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:36:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:36:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:36:58 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:36:59 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:36:59 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:36:59 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:37:00 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:37:00 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:37:01 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:37:01 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:37:02 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:37:02 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:37:03 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:37:03 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:37:04 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:37:04 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:37:05 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:37:05 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:37:06 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:37:06 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:37:07 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:37:07 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:37:08 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:37:08 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:37:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:37:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:37:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:37:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:37:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:37:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:37:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:37:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:37:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:37:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:37:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:37:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:37:08 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:37:08 [WARNING] transceiver.py:250 (TRX1@172.18.96.20:5700/1) RX TRXD message (ver=1 fn=3325 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:37:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3325 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:37:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3325 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:37:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3325 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:37:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3325 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:37:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3325 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:37:08 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3325 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:37:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:37:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:37:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:37:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:37:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:37:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:37:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:37:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:37:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:37:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:37:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:37:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:37:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:37:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:37:14 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:37:14 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:37:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:37:14 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:37:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:37:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:37:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:37:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:37:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:37:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:37:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:37:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:37:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:37:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:37:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:37:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:37:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:37:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:37:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:37:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:37:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:37:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:37:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:37:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:37:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:37:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:37:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:37:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:37:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:37:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:37:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:37:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:37:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:37:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:37:19 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:37:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:37:19 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:37:20 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:37:20 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:37:20 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:37:20 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:37:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:37:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:37:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:37:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:37:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:37:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:37:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:37:20 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:20 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:37:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:37:20 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:37:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:37:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:37:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:37:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:37:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:37:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:37:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:37:20 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:20 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:37:21 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:37:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:37:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:37:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:37:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:37:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:37:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:37:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:37:21 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:37:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:37:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:37:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:37:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:37:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:37:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:37:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:37:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:37:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:37:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:37:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:37:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=482 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:37:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=482 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:37:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=482 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:37:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=482 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:37:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=482 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:37:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=482 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:37:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=482 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:37:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=482 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:37:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:37:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:37:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:37:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:37:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:37:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:37:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:37:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:37:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:37:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:37:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:37:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:37:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:37:27 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:37:27 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:37:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:37:27 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:37:27 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:37:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:37:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:37:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:37:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:37:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:37:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:37:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:37:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:37:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:37:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:37:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:37:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:37:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:37:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:27 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:37:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:37:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:37:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:37:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:37:28 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:37:28 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:37:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:37:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:37:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:37:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:37:29 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:37:29 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:37:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:37:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:37:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:37:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:37:30 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:37:30 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:37:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:37:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:37:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:37:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:37:31 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:37:31 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:37:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:37:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:37:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:37:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:37:32 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:37:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:37:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:37:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:37:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:37:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:37:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:37:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:37:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:37:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:37:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:37:32 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:37:32 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:32 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:37:32 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:37:33 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:37:33 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:37:34 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:37:34 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:37:35 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:37:35 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:37:36 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:37:36 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:37:37 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:37:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:37:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:37:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:37:37 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:37:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:37:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:37:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:37:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:37:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:37:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:37:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:37:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:37:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:37:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:37:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:37:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:37:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:37:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:37 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:37:38 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:37:38 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:37:39 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:37:39 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:37:40 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:37:40 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:37:41 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:37:41 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:37:41 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:37:42 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:37:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:37:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:37:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:37:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:37:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:37:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:37:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:37:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:37:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:37:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:37:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:37:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:37:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:37:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:37:42 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:37:42 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:37:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:42 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:37:43 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 14:37:43 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 14:37:44 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 14:37:44 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 14:37:45 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 14:37:45 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 14:37:46 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 14:37:46 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 14:37:47 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 14:37:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:37:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:37:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:37:47 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:37:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:37:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:37:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:37:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:37:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:37:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:37:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:37:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:37:47 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:37:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:37:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:37:47 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4478 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:37:47 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4478 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:37:47 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4478 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:37:47 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4478 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:37:47 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4478 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:37:47 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4478 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:37:47 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4478 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:37:47 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4478 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:37:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:37:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:37:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:37:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:37:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:37:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:37:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:37:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:37:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:37:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:37:52 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:37:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:37:52 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:37:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:37:53 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:37:53 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:37:53 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:37:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:37:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:37:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:37:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:37:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:37:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:37:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:37:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:37:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:37:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:37:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:37:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:37:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:37:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:37:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:53 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:37:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:37:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:37:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:37:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:37:54 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:37:54 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:37:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:37:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:37:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:37:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:37:55 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:37:55 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:37:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:37:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:37:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:37:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:37:56 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:37:56 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:37:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:37:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:37:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:37:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:37:56 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:37:57 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:37:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:37:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:37:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:37:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:37:57 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:37:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:37:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:37:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:37:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:37:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:37:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:37:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:37:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:37:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:37:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:37:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:37:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:37:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:37:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:37:58 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:37:58 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:37:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:37:58 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:37:58 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:37:59 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:37:59 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:38:00 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:38:00 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:38:01 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:38:01 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:38:02 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:38:02 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:38:03 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:38:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:38:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:38:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:38:03 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:38:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:38:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:38:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:38:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:38:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:38:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:38:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:38:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:38:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:38:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:38:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:38:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:38:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:38:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:03 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:38:04 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:38:04 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:38:05 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:38:05 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:38:05 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:38:06 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:38:06 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:38:07 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:38:07 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:38:08 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:38:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:38:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:38:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:38:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:38:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:38:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:38:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:38:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:38:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:38:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:38:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:38:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:38:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:38:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:38:08 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:38:08 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:38:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:08 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:38:09 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 14:38:09 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 14:38:10 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 14:38:10 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 14:38:11 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 14:38:11 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 14:38:12 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 14:38:12 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 14:38:13 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 14:38:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:38:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:38:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:38:13 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:38:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:38:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:38:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:38:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:38:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:38:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:38:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:38:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:38:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:38:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:38:13 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:38:13 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4469 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:38:13 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4469 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:38:13 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4469 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:38:13 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4469 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:38:13 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4469 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:38:13 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4469 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:38:13 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4469 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:38:13 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4469 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:38:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:38:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:38:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:38:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:38:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:38:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:38:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:38:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:38:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:38:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:38:18 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:38:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:38:18 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:38:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:38:19 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:38:19 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:38:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:38:19 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:38:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:38:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:38:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:38:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:38:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:38:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:38:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:38:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:38:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:38:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:38:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:38:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:38:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:38:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:19 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:38:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:38:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:38:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:38:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:38:19 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:38:20 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:38:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:38:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:38:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:38:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:38:20 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:38:21 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:38:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:38:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:38:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:38:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:38:21 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:38:22 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:38:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:38:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:38:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:38:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:38:22 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:38:23 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:38:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:38:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:38:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:38:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:38:23 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:38:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:38:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:38:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:38:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:38:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:38:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:38:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:38:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:38:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:38:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:38:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:38:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:38:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:38:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:38:24 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:38:24 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:38:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:24 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:38:24 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:38:25 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:38:25 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:38:26 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:38:26 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:38:26 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:38:27 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:38:27 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:38:28 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:38:28 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:38:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:38:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:38:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:38:29 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:38:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:38:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:38:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:38:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:38:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:38:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:38:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:38:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:38:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:38:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:38:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:38:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:38:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:38:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:29 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:38:29 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:38:30 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:38:30 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:38:31 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:38:31 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:38:32 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:38:32 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:38:33 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:38:33 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:38:34 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:38:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:38:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:38:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:38:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:38:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:38:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:38:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:38:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:38:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:38:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:38:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:38:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:38:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:38:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:38:34 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:38:34 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:38:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:34 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:38:34 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 14:38:35 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 14:38:35 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 14:38:36 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 14:38:36 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 14:38:37 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 14:38:37 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 14:38:38 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 14:38:38 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 14:38:39 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 14:38:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:38:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:38:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:38:39 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:38:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:38:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:38:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:38:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:38:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:38:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:38:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:38:39 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:38:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4499 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:38:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:38:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:38:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:38:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4499 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:38:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4499 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:38:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4499 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:38:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4499 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:38:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4499 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:38:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4499 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:38:39 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4499 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:38:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:38:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:38:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:38:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:38:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:38:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:38:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:38:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:38:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:38:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:38:44 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:38:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:38:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:38:44 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:38:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:38:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:38:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:38:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:38:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:38:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:38:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:38:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:38:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:38:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:38:49 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:38:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:38:49 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:38:49 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:38:49 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:38:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:38:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:38:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:38:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:38:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:38:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:38:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:38:50 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:38:51 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:38:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:38:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:38:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:38:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:38:51 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:38:52 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:38:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:38:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:38:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:38:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:38:52 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:38:53 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:38:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:38:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:38:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:38:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:38:53 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:38:54 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:38:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:38:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:38:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:38:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:38:54 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:38:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:38:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:38:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:38:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:38:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:38:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:38:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:38:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:38:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:38:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:38:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:38:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:38:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:38:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:38:54 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:38:54 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:38:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:55 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:38:55 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:38:55 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:38:56 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:38:56 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:38:57 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:38:57 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:38:58 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:38:58 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:38:59 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:38:59 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:38:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:38:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:38:59 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:38:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:38:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:38:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:38:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:38:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:38:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:38:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:38:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:39:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:39:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:39:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:39:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:39:00 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:39:00 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:39:01 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:39:01 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:39:02 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:39:02 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:39:03 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:39:03 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:39:04 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:39:04 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:39:04 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:39:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:39:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:39:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:39:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:39:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:39:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:39:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:39:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:39:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:39:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:39:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:39:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:39:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:39:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:39:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:39:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:39:05 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:39:05 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:39:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:39:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:39:05 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:39:05 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 14:39:06 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 14:39:06 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 14:39:07 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 14:39:07 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 14:39:08 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 14:39:08 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 14:39:09 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 14:39:09 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 14:39:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:39:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:39:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:39:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:39:10 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:39:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:39:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:39:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:39:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:39:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:39:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:39:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:39:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:39:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:39:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:39:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:39:10 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4469 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:39:10 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4469 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:39:10 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4469 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:39:10 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4469 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:39:10 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4469 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:39:10 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4469 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:39:10 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4469 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:39:10 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4469 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:39:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:39:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:39:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:39:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:39:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:39:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:39:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:39:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:39:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:39:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:39:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:39:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:39:15 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:39:15 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:39:15 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:39:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:39:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:39:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:39:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:39:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:39:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:39:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:39:15 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:39:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:39:16 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:39:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:39:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:39:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:39:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:39:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:39:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:39:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:39:16 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:39:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:39:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:39:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:39:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:39:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:39:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:39:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:39:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:39:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:39:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:39:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:39:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:39:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:39:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:39:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:39:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:39:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:39:17 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:39:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:39:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:39:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:39:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:39:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:39:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:39:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:39:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:39:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:39:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:39:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:39:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:39:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:39:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:39:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:39:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:39:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:39:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:39:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:39:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:39:17 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:39:17 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:39:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:39:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:39:17 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:39:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:39:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:39:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:39:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:39:17 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:39:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:39:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:39:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:39:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:39:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:39:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:39:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:39:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:39:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:39:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:39:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:39:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:39:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:39:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:39:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:39:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:39:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:39:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:39:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:39:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:39:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:39:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:39:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:39:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:39:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:39:23 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:39:23 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:39:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:39:23 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:39:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:39:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:39:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:39:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:39:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:39:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:39:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:39:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:39:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:39:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:39:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:39:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:39:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:39:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:39:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:39:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:39:23 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:39:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:39:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:39:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:39:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:39:24 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:39:24 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:39:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:39:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:39:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:39:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:39:25 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:39:25 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:39:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:39:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:39:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:39:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:39:26 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:39:26 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:39:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:39:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:39:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:39:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:39:27 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:39:27 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:39:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:39:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:39:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:39:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:39:28 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:39:28 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:39:29 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:39:29 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:39:30 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:39:30 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:39:30 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:39:31 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:39:31 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:39:32 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:39:32 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:39:33 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:39:33 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:39:34 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:39:34 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:39:35 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:39:35 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:39:36 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:39:36 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:39:37 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:39:37 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:39:38 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:39:38 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:39:39 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:39:39 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 14:39:39 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 14:39:40 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 14:39:40 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 14:39:41 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 14:39:41 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 14:39:42 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 14:39:42 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 14:39:43 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 14:39:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:39:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:39:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:39:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:39:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:39:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:39:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:39:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:39:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:39:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:39:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:39:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:39:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:39:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:39:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:39:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:39:43 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:39:43 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:39:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:39:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:39:43 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 14:39:44 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 14:39:44 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 14:39:45 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 14:39:45 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 14:39:46 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 14:39:46 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 14:39:47 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 14:39:47 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 14:39:48 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 14:39:48 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 14:39:48 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 14:39:49 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 14:39:49 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 14:39:50 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 14:39:50 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 14:39:51 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 14:39:51 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 14:39:52 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 14:39:52 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-25 14:39:53 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-25 14:39:53 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-25 14:39:54 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-25 14:39:54 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-25 14:39:55 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-25 14:39:55 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-25 14:39:56 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-25 14:39:56 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-25 14:39:57 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-25 14:39:57 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-25 14:39:58 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-25 14:39:58 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-25 14:39:58 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-25 14:39:59 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-25 14:39:59 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-25 14:40:00 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-25 14:40:00 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-25 14:40:01 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-25 14:40:01 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-25 14:40:02 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-25 14:40:02 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-25 14:40:03 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-25 14:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:40:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:40:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:40:03 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:40:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:40:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:40:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:40:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:40:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:40:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:40:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:40:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:40:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:40:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:03 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-25 14:40:04 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-25 14:40:04 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-25 14:40:05 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-25 14:40:05 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-25 14:40:06 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-25 14:40:06 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-25 14:40:07 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-25 14:40:07 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-25 14:40:07 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-25 14:40:08 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-25 14:40:08 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-25 14:40:09 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-25 14:40:09 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-25 14:40:10 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-25 14:40:10 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-25 14:40:11 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2024-10-25 14:40:11 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2024-10-25 14:40:12 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2024-10-25 14:40:12 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2024-10-25 14:40:13 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2024-10-25 14:40:13 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2024-10-25 14:40:14 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2024-10-25 14:40:14 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2024-10-25 14:40:15 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2024-10-25 14:40:15 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2024-10-25 14:40:15 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2024-10-25 14:40:16 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2024-10-25 14:40:16 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2024-10-25 14:40:17 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2024-10-25 14:40:17 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2024-10-25 14:40:18 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2024-10-25 14:40:18 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2024-10-25 14:40:19 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2024-10-25 14:40:19 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2024-10-25 14:40:20 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2024-10-25 14:40:20 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2024-10-25 14:40:21 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2024-10-25 14:40:21 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2024-10-25 14:40:22 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2024-10-25 14:40:22 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2024-10-25 14:40:23 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2024-10-25 14:40:23 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2024-10-25 14:40:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:40:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:40:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:40:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:40:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:40:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:40:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:40:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:40:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:40:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:40:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:40:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:40:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:40:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:40:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:40:23 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:40:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:24 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2024-10-25 14:40:24 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2024-10-25 14:40:24 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2024-10-25 14:40:25 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2024-10-25 14:40:25 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2024-10-25 14:40:26 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2024-10-25 14:40:26 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2024-10-25 14:40:27 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2024-10-25 14:40:27 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2024-10-25 14:40:28 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2024-10-25 14:40:28 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2024-10-25 14:40:29 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2024-10-25 14:40:29 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2024-10-25 14:40:30 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2024-10-25 14:40:30 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2024-10-25 14:40:31 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2024-10-25 14:40:31 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2024-10-25 14:40:32 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2024-10-25 14:40:32 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2024-10-25 14:40:33 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2024-10-25 14:40:33 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2024-10-25 14:40:33 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2024-10-25 14:40:34 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2024-10-25 14:40:34 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2024-10-25 14:40:35 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2024-10-25 14:40:35 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2024-10-25 14:40:36 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2024-10-25 14:40:36 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2024-10-25 14:40:37 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2024-10-25 14:40:37 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2024-10-25 14:40:38 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2024-10-25 14:40:38 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2024-10-25 14:40:39 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2024-10-25 14:40:39 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2024-10-25 14:40:40 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2024-10-25 14:40:40 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2024-10-25 14:40:41 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2024-10-25 14:40:41 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2024-10-25 14:40:42 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2024-10-25 14:40:42 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2024-10-25 14:40:42 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2024-10-25 14:40:43 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2024-10-25 14:40:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:40:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:40:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:40:43 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:40:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:40:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:40:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:40:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:40:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:40:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:40:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:40:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:40:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:40:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:40:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:40:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:40:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:40:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:40:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:40:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:40:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:40:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:40:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:40:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:40:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:40:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:40:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:40:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:40:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:40:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:40:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:40:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:40:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:40:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:40:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:40:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:40:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:40:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:40:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:40:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:40:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:40:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:40:54 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:40:54 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:40:54 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:40:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:40:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:40:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:40:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:40:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:40:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:40:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:40:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:40:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:40:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:40:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:40:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:40:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:40:55 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:55 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:40:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:40:55 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:40:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:40:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:40:55 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:55 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:40:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:40:55 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:40:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:40:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:40:55 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:40:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:40:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:40:56 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:40:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:40:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:40:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:40:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:40:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:40:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:40:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:40:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:40:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:40:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:40:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:40:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:40:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:40:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:56 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:40:56 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:40:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:40:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:40:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:40:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:40:57 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:40:57 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:40:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:40:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:40:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:40:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:40:58 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:40:58 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:40:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:40:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:40:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:40:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:40:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:40:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:40:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:40:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:40:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:40:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:40:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:40:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:40:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:40:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:40:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:40:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:40:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:40:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:40:58 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:40:59 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:40:59 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:41:00 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:41:00 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:41:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:41:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:41:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:41:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:41:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:41:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:41:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:41:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:01 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:41:01 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:41:02 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:41:02 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:41:03 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:41:03 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:41:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:41:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:41:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:41:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:41:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:41:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:41:03 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:41:03 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:41:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:04 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:41:04 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:41:05 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:41:05 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:41:06 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:41:06 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:41:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:06 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:41:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:41:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:41:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:41:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:41:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:41:06 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:41:06 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:41:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:07 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:41:07 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:41:07 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:41:08 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:41:08 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:41:09 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:41:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:09 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:41:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:41:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:41:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:41:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:41:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:41:09 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:41:09 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:41:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:09 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:41:10 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 14:41:10 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 14:41:11 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 14:41:11 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 14:41:12 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 14:41:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:12 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:41:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:41:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:41:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:41:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:41:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:41:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:41:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:41:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:41:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:41:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:41:12 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:41:12 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4000 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:41:12 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4000 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:41:12 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4000 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:41:12 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4000 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:41:12 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4000 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:41:12 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4000 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:41:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:41:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:41:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:41:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:41:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:41:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:41:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:41:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:41:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:41:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:41:17 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:41:17 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:41:17 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:41:17 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:41:17 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:41:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:18 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:41:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:41:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:41:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:41:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:41:18 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:41:19 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:41:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:41:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:41:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:41:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:41:19 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:41:20 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:41:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:41:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:41:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:41:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:41:20 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:41:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:41:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:41:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:41:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:41:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:41:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:41:21 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:41:21 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:41:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:21 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:41:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:41:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:41:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:41:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:41:21 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:41:22 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:41:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:41:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:41:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:41:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:41:22 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:41:23 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:41:23 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:41:23 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:41:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:24 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:41:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:41:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:41:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:41:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:41:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:41:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:41:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:41:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:41:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:24 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:41:24 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:41:25 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:41:25 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:41:26 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:41:26 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:41:27 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:41:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:41:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:41:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:41:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:41:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:41:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:41:27 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:41:27 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:41:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:27 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:41:28 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:41:28 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:41:29 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:41:29 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:41:30 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:41:30 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:41:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:30 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:41:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:41:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:41:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:41:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:41:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:41:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:41:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:41:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:41:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:41:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:41:30 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:41:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:41:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:41:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:41:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:41:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:41:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:41:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:41:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:41:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:41:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:41:35 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:41:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:41:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:41:36 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:41:36 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:41:36 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:41:36 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:41:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:41:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:41:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:41:36 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:41:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:41:37 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:41:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:37 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:41:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:41:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:41:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:41:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:41:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:41:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:41:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:41:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:41:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:37 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:41:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:41:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:41:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:41:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:41:38 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:41:38 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:41:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:41:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:41:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:41:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:41:39 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:41:39 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:41:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:41:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:41:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:41:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:41:39 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:41:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:41:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:41:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:41:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:41:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:41:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:41:40 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:41:40 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:41:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:40 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:41:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:41:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:41:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:41:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:41:40 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:41:41 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:41:41 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:41:42 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:41:42 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:41:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:43 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:41:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:41:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:41:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:41:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:41:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:41:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:41:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:41:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:41:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:41:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:41:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:41:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:41:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:41:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:41:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:41:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:41:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:41:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:41:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:41:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:41:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:41:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:41:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:41:48 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:41:48 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:41:48 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:41:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:49 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:41:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:41:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:41:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:41:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:41:49 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:41:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:41:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:41:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:41:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:41:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:41:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:41:50 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:41:50 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:41:50 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:41:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:41:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:41:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:41:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:41:50 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:41:51 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:41:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:41:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:41:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:41:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:41:51 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:41:51 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:41:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:41:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:41:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:41:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:41:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:52 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:41:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:41:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:41:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:41:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:41:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:41:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:41:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:41:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:41:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:52 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:41:52 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:41:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:41:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:41:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:41:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:41:53 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:41:53 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:41:54 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:41:54 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:41:55 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:41:55 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:41:56 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:41:56 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:41:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:41:57 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:41:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:41:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:41:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:41:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:41:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:41:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:41:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:41:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:41:57 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:41:57 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:41:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:41:57 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:41:58 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:41:58 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:41:59 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:41:59 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:41:59 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:42:00 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:42:00 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:42:01 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:42:01 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:42:02 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:42:02 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:42:03 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:42:03 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:42:04 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:42:04 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 14:42:05 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 14:42:05 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 14:42:06 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 14:42:06 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 14:42:07 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 14:42:07 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 14:42:07 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 14:42:08 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 14:42:08 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 14:42:09 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 14:42:09 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 14:42:10 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 14:42:10 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 14:42:11 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 14:42:11 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 14:42:12 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 14:42:12 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 14:42:13 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 14:42:13 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 14:42:14 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 14:42:14 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 14:42:15 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 14:42:15 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 14:42:16 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 14:42:16 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 14:42:16 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 14:42:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:42:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:42:17 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:42:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:42:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:42:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:42:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:42:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:42:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:42:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:42:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:42:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:42:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:42:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:42:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:42:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:42:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:42:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:42:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:42:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:42:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:42:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:42:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:42:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:42:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:42:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:42:22 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:42:22 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:42:22 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:42:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:42:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:42:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:42:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:42:23 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:42:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:42:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:42:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:42:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:42:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:42:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:42:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:42:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:42:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:42:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:42:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:42:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:42:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:42:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:42:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:42:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:42:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:42:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:42:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:42:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:42:23 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:42:23 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:42:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:42:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:42:23 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:42:24 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:42:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:42:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:42:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:42:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:42:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:42:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:42:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:42:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:42:24 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:42:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:42:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:42:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:42:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:42:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:42:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:42:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:42:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:42:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:42:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:42:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:42:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:42:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:42:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:42:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:42:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:42:24 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:42:25 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:42:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:42:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:42:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:42:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:42:25 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:42:25 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:42:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:42:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:42:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:42:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:42:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:42:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:42:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:42:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:42:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:42:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:42:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:42:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:42:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:42:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:42:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:42:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:42:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:42:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:42:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:42:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:42:26 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:42:26 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:42:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:42:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:42:26 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:42:26 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:42:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:42:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:42:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:42:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:42:27 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:42:27 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:42:28 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:42:28 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:42:29 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:42:29 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:42:30 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:42:30 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:42:31 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:42:31 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:42:32 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:42:32 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:42:33 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:42:33 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:42:33 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:42:34 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:42:34 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:42:35 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:42:35 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:42:36 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:42:36 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:42:37 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:42:37 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:42:38 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:42:38 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 14:42:39 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 14:42:39 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 14:42:40 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 14:42:40 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 14:42:41 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 14:42:41 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 14:42:42 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 14:42:42 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 14:42:42 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 14:42:43 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 14:42:43 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 14:42:44 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 14:42:44 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 14:42:45 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 14:42:45 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 14:42:46 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 14:42:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:42:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:42:46 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:42:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:42:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:42:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:42:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:42:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:42:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:42:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:42:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:42:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:42:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:42:46 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:42:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5232 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:42:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5232 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:42:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5232 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:42:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5232 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:42:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5232 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:42:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5232 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:42:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5232 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:42:46 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=5232 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:42:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:42:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:42:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:42:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:42:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:42:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:42:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:42:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:42:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:42:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:42:51 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:42:51 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:42:51 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:42:51 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:42:51 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:42:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:42:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:42:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:42:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:42:52 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:42:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:42:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:42:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:42:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:42:52 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:42:53 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:42:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:42:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:42:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:42:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:42:53 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:42:54 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:42:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:42:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:42:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:42:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:42:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:42:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:42:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:42:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:42:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:42:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:42:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:42:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:42:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:42:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:42:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:42:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:42:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:42:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:42:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:42:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:42:54 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:42:54 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:42:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:42:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:42:54 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:42:55 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:42:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:42:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:42:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:42:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:42:55 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:42:56 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:42:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:42:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:42:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:42:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:42:56 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:42:57 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:42:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:42:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:42:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:42:57 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:42:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:42:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:42:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:42:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:42:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:42:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:42:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:42:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:42:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:42:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:42:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:42:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:42:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:42:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:42:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:42:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:42:57 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:42:58 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:42:58 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:42:58 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:42:59 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:42:59 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:43:00 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:43:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:43:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:43:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:43:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:43:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:43:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:43:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:43:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:43:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:43:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:43:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:43:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:43:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:43:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:43:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:43:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:43:00 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:43:00 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:43:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:43:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:43:00 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:43:01 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:43:01 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:43:02 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:43:02 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:43:03 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:43:03 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:43:04 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:43:04 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:43:05 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:43:05 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:43:05 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:43:06 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:43:06 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:43:07 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:43:07 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 14:43:08 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 14:43:08 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 14:43:09 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 14:43:09 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 14:43:10 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 14:43:10 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 14:43:11 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 14:43:11 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 14:43:12 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 14:43:12 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 14:43:13 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 14:43:13 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 14:43:13 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 14:43:14 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 14:43:14 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 14:43:15 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 14:43:15 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 14:43:16 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 14:43:16 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 14:43:17 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 14:43:17 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 14:43:18 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 14:43:18 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 14:43:19 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 14:43:19 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 14:43:20 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 14:43:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:43:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:43:20 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:43:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:43:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:43:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:43:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:43:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:43:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:43:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:43:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:43:20 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:43:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:43:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:43:20 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6319 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:43:20 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6319 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:43:20 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6319 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:43:20 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6319 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:43:20 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6319 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:43:20 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6319 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:43:20 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6319 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:43:20 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=6319 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:43:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:43:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:43:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:43:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:43:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:43:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:43:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:43:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:43:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:43:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:43:25 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:43:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:43:25 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:43:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:43:26 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:43:26 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:43:26 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:43:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:43:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:43:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:43:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:43:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:43:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:43:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:43:26 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:43:26 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:43:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:43:26 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:43:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:43:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:43:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:43:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:43:26 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:43:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:43:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:43:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:43:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:43:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:43:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:43:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:43:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:43:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:43:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:43:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:43:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:43:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:43:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:43:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:43:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:43:27 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:43:27 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:43:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:43:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:43:27 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:43:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:43:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:43:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:43:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:43:27 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:43:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:43:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:43:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:43:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:43:27 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:43:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:43:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:43:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:43:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:43:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:43:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:43:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:43:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:43:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:43:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:43:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:43:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:43:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:43:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:43:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:43:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:43:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:43:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:43:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:43:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:43:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:43:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:43:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:43:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:43:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:43:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:43:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:43:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:43:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:43:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:43:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:43:33 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:43:33 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:43:33 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:43:33 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:43:33 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:43:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:43:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:43:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:43:33 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:43:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:43:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:43:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:43:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:43:34 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:43:34 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:43:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:43:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:43:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:43:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:43:35 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:43:35 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:43:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:43:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:43:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:43:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:43:36 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:43:36 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:43:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:43:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:43:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:43:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:43:37 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:43:37 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:43:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:43:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:43:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:43:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:43:38 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:43:38 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:43:39 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:43:39 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:43:40 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:43:40 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:43:41 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:43:41 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:43:42 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:43:42 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:43:43 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:43:45 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:43:45 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:43:45 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:43:46 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:43:46 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:43:47 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:43:47 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:43:48 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:43:48 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:43:49 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:43:49 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:43:50 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:43:50 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:43:51 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 14:43:51 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 14:43:52 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 14:43:52 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 14:43:53 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 14:43:53 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 14:43:53 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 14:43:54 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 14:43:54 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 14:43:55 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 14:43:55 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 14:43:56 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 14:43:56 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 14:43:57 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 14:43:57 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 14:43:58 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 14:43:58 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 14:43:59 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 14:43:59 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 14:44:00 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 14:44:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:44:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:44:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:44:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:44:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:44:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:44:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:44:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:44:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:44:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:44:01 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 14:44:01 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 14:44:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:44:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:44:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:44:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:44:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:44:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:44:01 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 14:44:02 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 14:44:02 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 14:44:03 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 14:44:03 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 14:44:04 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 14:44:04 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-25 14:44:05 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-25 14:44:05 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-25 14:44:06 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:44:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:44:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:44:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:44:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:44:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:44:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:44:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:44:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:44:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:44:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:44:06 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-25 14:44:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:44:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:44:06 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:44:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:44:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:44:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:44:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:44:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:44:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:44:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:44:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:44:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:44:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:44:13 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:44:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:44:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:44:13 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:44:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:44:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:44:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:44:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:44:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:44:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:44:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:44:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:44:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:44:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:44:18 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:44:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:44:18 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:44:19 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:44:19 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:44:19 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:44:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:44:19 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:44:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:44:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:44:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:44:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:44:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:44:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:44:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:44:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:44:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:44:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:44:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:44:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:44:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:44:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:44:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:44:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:44:19 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:44:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:44:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:44:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:44:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:44:20 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:44:20 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:44:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:44:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:44:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:44:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:44:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:44:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:44:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:44:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:44:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:44:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:44:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:44:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:44:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:44:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:44:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:44:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:44:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:44:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:44:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:44:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:44:20 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:44:20 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:44:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:44:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:44:21 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:44:21 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:44:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:44:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:44:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:44:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:44:21 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:44:22 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:44:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:44:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:44:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:44:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:44:22 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:44:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:44:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:44:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:44:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:44:23 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:44:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:44:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:44:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:44:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:44:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:44:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:44:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:44:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:44:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:44:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:44:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:44:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:44:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:44:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:44:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:44:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:44:23 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:44:23 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:44:24 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:44:24 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:44:25 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:44:25 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:44:26 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:44:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:44:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:44:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:44:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:44:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:44:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:44:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:44:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:44:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:44:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:44:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:44:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:44:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:44:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:44:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:44:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:44:26 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:44:26 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:44:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:44:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:44:26 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:44:27 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:44:27 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:44:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:44:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:44:27 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:44:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:44:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:44:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:44:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:44:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:44:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:44:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:44:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:44:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:44:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:44:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:44:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:44:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:44:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:44:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:44:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:44:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:44:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:44:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:44:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:44:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:44:32 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:44:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:44:32 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:44:33 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:44:33 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:44:33 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:44:33 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:44:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:44:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:44:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:44:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:44:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:44:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:44:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:44:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:44:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:44:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:44:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:44:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:44:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:44:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:44:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:44:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:44:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:44:33 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:44:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:44:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:44:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:44:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:44:34 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:44:34 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:44:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:44:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:44:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:44:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:44:35 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:44:35 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:44:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:44:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:44:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:44:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:44:36 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:44:36 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:44:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:44:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:44:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:44:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:44:37 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:44:37 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:44:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:44:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:44:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:44:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:44:37 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:44:38 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:44:38 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:44:39 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:44:39 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:44:40 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:44:40 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:44:41 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:44:41 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:44:42 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:44:42 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:44:43 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:44:43 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:44:44 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:44:44 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:44:45 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:44:45 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:44:46 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:44:46 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:44:46 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:44:47 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:44:47 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:44:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:44:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:44:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:44:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:44:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:44:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:44:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:44:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:44:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:44:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:44:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:44:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:44:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:44:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:44:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:44:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:44:48 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:44:48 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:44:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:44:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:44:48 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:44:48 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:44:49 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 14:44:49 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 14:44:50 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 14:44:50 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 14:44:51 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 14:44:51 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 14:44:52 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 14:44:52 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 14:44:53 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 14:44:53 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 14:44:54 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 14:44:54 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 14:44:55 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 14:44:55 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 14:44:55 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 14:44:56 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 14:44:56 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 14:44:57 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 14:44:57 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 14:44:58 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 14:44:58 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 14:44:59 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 14:44:59 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 14:45:00 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 14:45:00 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 14:45:01 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 14:45:01 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 14:45:02 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 14:45:02 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-25 14:45:03 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-25 14:45:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:45:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:45:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:45:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:45:03 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:45:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:45:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:45:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:45:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:45:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:45:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:45:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:45:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:45:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:45:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:45:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:45:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:45:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:45:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:45:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:45:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:45:03 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-25 14:45:04 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-25 14:45:04 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-25 14:45:04 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-25 14:45:05 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-25 14:45:05 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-25 14:45:06 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-25 14:45:06 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-25 14:45:07 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-25 14:45:07 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-25 14:45:08 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-25 14:45:08 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-25 14:45:09 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-25 14:45:09 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-25 14:45:10 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-25 14:45:10 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-25 14:45:11 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-25 14:45:11 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-25 14:45:12 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-25 14:45:12 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-25 14:45:13 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2024-10-25 14:45:13 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2024-10-25 14:45:13 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2024-10-25 14:45:14 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2024-10-25 14:45:14 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2024-10-25 14:45:15 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2024-10-25 14:45:15 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2024-10-25 14:45:16 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2024-10-25 14:45:16 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2024-10-25 14:45:17 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2024-10-25 14:45:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:45:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:45:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:45:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:45:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:45:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:45:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:45:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:45:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:45:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:45:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:45:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:45:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:45:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:45:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:45:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:45:17 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2024-10-25 14:45:17 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:45:17 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:45:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:45:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:45:18 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2024-10-25 14:45:18 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2024-10-25 14:45:19 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2024-10-25 14:45:19 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2024-10-25 14:45:20 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2024-10-25 14:45:20 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2024-10-25 14:45:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:45:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:45:20 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:45:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:45:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:45:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:45:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:45:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:45:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:45:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:45:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:45:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:45:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:45:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:45:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:45:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:45:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:45:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:45:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:45:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:45:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:45:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:45:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:45:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:45:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:45:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:45:26 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:45:26 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:45:26 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:45:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:45:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:45:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:45:26 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:45:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:45:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:45:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:45:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:45:27 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:45:27 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:45:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:45:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:45:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:45:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:45:28 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:45:28 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:45:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:45:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:45:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:45:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:45:29 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:45:29 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:45:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:45:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:45:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:45:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:45:30 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:45:30 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:45:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:45:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:45:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:45:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:45:31 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:45:31 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:45:32 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:45:32 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:45:33 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:45:33 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:45:34 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:45:34 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:45:35 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:45:35 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:45:35 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:45:36 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:45:36 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:45:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:45:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:45:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:45:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:45:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:45:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:45:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:45:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:45:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:45:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:45:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:45:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:45:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:45:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:45:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:45:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:45:37 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:45:37 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:45:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:45:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:45:37 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:45:37 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:45:38 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:45:38 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:45:39 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:45:39 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:45:40 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:45:40 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:45:41 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:45:41 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:45:42 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:45:42 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 14:45:43 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 14:45:43 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 14:45:44 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 14:45:44 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 14:45:44 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 14:45:45 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 14:45:45 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 14:45:46 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 14:45:46 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 14:45:47 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 14:45:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:45:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:45:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:45:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:45:47 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:45:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:45:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:45:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:45:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:45:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:45:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:45:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:45:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:45:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:45:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:45:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:45:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:45:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:45:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:45:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:45:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:45:47 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 14:45:48 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 14:45:48 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 14:45:49 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 14:45:49 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 14:45:50 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 14:45:50 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 14:45:51 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 14:45:51 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 14:45:52 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 14:45:52 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 14:45:53 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 14:45:53 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 14:45:54 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 14:45:54 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 14:45:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:45:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:45:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:45:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:45:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:45:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:45:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:45:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:45:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:45:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:45:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:45:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:45:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:45:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:45:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:45:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:45:54 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:45:54 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:45:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:45:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:45:54 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 14:45:55 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 14:45:55 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2024-10-25 14:45:56 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2024-10-25 14:45:56 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2024-10-25 14:45:57 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2024-10-25 14:45:57 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2024-10-25 14:45:58 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2024-10-25 14:45:58 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2024-10-25 14:45:59 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2024-10-25 14:45:59 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2024-10-25 14:46:00 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2024-10-25 14:46:00 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2024-10-25 14:46:01 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2024-10-25 14:46:01 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2024-10-25 14:46:02 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2024-10-25 14:46:02 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2024-10-25 14:46:02 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2024-10-25 14:46:03 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2024-10-25 14:46:03 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2024-10-25 14:46:04 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2024-10-25 14:46:04 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2024-10-25 14:46:05 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2024-10-25 14:46:05 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2024-10-25 14:46:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:46:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:05 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:46:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:46:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:46:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:46:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:46:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:46:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:46:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:46:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:46:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:46:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:46:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:46:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:46:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:46:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:46:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:46:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:46:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:46:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:46:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:46:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:46:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:46:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:46:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:46:11 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:46:11 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:46:11 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:46:11 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:46:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:46:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:46:11 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:11 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:46:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:46:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:46:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:12 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:46:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:46:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:46:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:46:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:46:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:46:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:46:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:46:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:46:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:46:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:12 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:46:12 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:46:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:46:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:46:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:46:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:46:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:46:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:46:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:46:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:46:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:46:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:46:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:46:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:46:13 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:46:13 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:46:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:13 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:46:13 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:46:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:46:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:46:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:46:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:46:14 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:46:14 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:46:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:46:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:46:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:46:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:46:15 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:46:15 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:46:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:46:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:46:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:46:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:46:16 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:46:16 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:46:17 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:46:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:46:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:17 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:46:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:46:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:46:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:46:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:46:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:46:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:46:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:46:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:46:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:46:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:46:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1387 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:46:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:46:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1387 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:46:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1387 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:46:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1387 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:46:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1387 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:46:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1387 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:46:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1387 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:46:17 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=1387 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:46:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:46:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:46:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:46:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:46:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:46:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:46:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:46:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:46:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:46:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:46:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:46:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:46:22 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:46:22 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:46:22 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:46:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:23 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:46:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:46:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:46:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:46:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:46:23 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:46:24 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:46:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:46:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:46:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:46:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:46:24 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:46:25 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:46:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:46:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:46:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:46:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:46:25 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:46:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:46:26 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:46:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:46:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:46:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:46:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:46:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:46:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:46:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:46:26 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:46:26 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:46:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:46:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:46:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:46:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:46:26 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:46:27 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:46:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:46:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:46:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:46:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:46:27 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:46:28 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:46:28 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:46:29 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:46:29 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:46:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:46:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:29 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:46:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:46:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:46:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:46:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:46:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:46:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:46:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:46:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:46:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:46:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:29 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:46:30 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:46:30 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:46:31 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:46:31 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:46:32 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:46:32 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:46:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:46:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:46:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:46:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:46:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:46:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:46:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:46:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:46:33 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:46:33 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:46:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:33 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:46:33 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:46:34 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:46:34 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:46:35 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:46:35 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:46:36 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:46:36 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:46:37 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:46:37 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:46:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:46:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:37 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:46:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:46:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:46:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:46:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:46:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:46:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:46:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:46:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:46:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:46:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:46:37 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:46:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3284 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:46:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3284 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:46:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3284 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:46:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3284 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:46:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3284 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:46:37 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3284 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:46:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:46:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:46:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:46:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:46:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:46:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:46:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:46:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:46:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:46:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:46:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:46:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:46:42 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:46:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:46:43 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:46:43 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:46:43 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:46:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:43 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:46:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:46:43 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:44 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:46:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:46:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:44 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:46:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:46:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:46:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:46:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:46:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:46:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:46:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:46:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:46:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:46:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:44 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:46:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:46:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:46:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:46:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:46:45 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:46:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:46:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:46:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:46:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:46:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:46:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:46:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:46:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:46:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:46:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:46:45 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:46:45 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:46:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:46:45 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:46:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:46:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:46:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:46:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:46:46 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:46:46 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:46:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:46:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:46:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:46:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:46:46 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:46:47 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:46:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:46:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:46:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:46:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:46:47 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:46:48 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:46:48 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:46:49 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:46:49 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:46:50 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:46:50 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:46:51 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:46:51 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:46:52 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:46:52 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:46:53 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:46:53 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:46:54 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:46:54 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:46:55 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:46:55 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:46:55 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:46:56 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:46:56 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:46:57 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:46:57 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:46:58 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:46:58 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:46:59 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 14:46:59 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 14:47:00 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 14:47:00 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 14:47:01 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 14:47:01 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 14:47:02 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 14:47:02 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 14:47:03 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 14:47:03 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 14:47:03 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 14:47:04 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 14:47:04 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 14:47:05 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 14:47:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:47:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:47:05 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:47:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:47:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:47:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:47:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:47:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:47:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:47:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:47:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:47:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:47:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:47:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:47:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4922 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:47:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4922 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:47:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4922 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:47:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4922 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:47:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4922 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:47:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4922 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:47:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4923 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:47:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4923 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:47:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4923 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:47:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4923 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:47:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4923 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:47:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4923 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:47:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4923 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:47:05 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=4923 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:47:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:47:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:47:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:47:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:47:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:47:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:47:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:47:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:47:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:47:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:47:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:47:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:47:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:47:10 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:47:11 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:47:11 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:47:11 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:47:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:47:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:47:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:47:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:47:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:47:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:47:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:47:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:47:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:47:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:47:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:47:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:47:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:47:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:47:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:47:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:47:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:47:11 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:47:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:47:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:47:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:47:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:47:11 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:47:12 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:47:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:47:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:47:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:47:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:47:12 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:47:13 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:47:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:47:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:47:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:47:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:47:13 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:47:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:47:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:47:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:47:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:47:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:47:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:47:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:47:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:47:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:47:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:47:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:47:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:47:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:47:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:47:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:47:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:47:14 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:47:14 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:47:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:47:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:47:14 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:47:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:47:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:47:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:47:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:47:14 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:47:15 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:47:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:47:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:47:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:47:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:47:15 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:47:16 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:47:16 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:47:17 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:47:17 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:47:18 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:47:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:47:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:47:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:47:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:47:18 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:47:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:47:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:47:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:47:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:47:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:47:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:47:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:47:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:47:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:47:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:47:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:47:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:47:18 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:47:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:47:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:47:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:47:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:47:19 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:47:19 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:47:19 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:47:20 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:47:20 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:47:21 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:47:21 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:47:22 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:47:22 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:47:23 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:47:23 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:47:24 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:47:24 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:47:25 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:47:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:47:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:47:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:47:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:47:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:47:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:47:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:47:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:47:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:47:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:47:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:47:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:47:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:47:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:47:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:47:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:47:25 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:47:25 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:47:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:47:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:47:25 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:47:26 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:47:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:47:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:47:26 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:47:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:47:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:47:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:47:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:47:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:47:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:47:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:47:26 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:47:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:47:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:47:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3392 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:47:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:47:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3392 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:47:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3392 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:47:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3392 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:47:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3392 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:47:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3392 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:47:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3392 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:47:26 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3392 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:47:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:47:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:47:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:47:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:47:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:47:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:47:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:47:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:47:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:47:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:47:31 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:47:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:47:31 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:47:31 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:47:31 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:47:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:47:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:47:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:47:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:47:32 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:47:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:47:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:47:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:47:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:47:32 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:47:33 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:47:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:47:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:47:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:47:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:47:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:47:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:47:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:47:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:47:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:47:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:47:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:47:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:47:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:47:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:47:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:47:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:47:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:47:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:47:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:47:33 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:47:33 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=5, maio=0, ma_len=4
2024-10-25 14:47:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:47:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:47:33 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:47:34 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:47:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:47:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:47:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:47:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:47:34 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:47:35 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:47:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:47:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:47:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:47:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:47:35 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:47:35 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:47:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:47:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:47:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:47:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:47:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:47:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:47:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:47:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:47:36 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:47:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:47:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:47:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:47:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:47:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:47:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:47:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:47:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:47:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:47:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:47:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:47:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:47:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:47:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:47:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:47:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:47:36 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:47:36 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:47:37 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:47:37 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:47:38 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:47:38 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:47:39 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:47:39 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:47:40 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:47:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:47:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:47:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:47:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:47:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:47:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:47:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:47:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:47:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:47:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:47:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:47:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:47:40 [DEBUG] ctrl_if_trx.py:162 (MS@172.18.96.22:6700) Recv SETFH cmd
2024-10-25 14:47:40 [INFO] transceiver.py:201 (MS@172.18.96.22:6700) Frequency hopping configured: hsn=6, maio=1, ma_len=2
2024-10-25 14:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:47:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:47:40 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:47:41 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:47:41 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:47:42 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:47:42 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:47:43 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:47:43 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:47:43 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:47:44 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:47:44 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:47:45 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:47:45 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:47:46 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:47:46 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:47:47 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2024-10-25 14:47:47 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2024-10-25 14:47:48 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2024-10-25 14:47:48 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2024-10-25 14:47:49 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2024-10-25 14:47:49 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2024-10-25 14:47:50 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2024-10-25 14:47:50 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2024-10-25 14:47:51 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2024-10-25 14:47:51 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2024-10-25 14:47:51 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2024-10-25 14:47:52 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2024-10-25 14:47:52 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2024-10-25 14:47:53 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2024-10-25 14:47:53 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2024-10-25 14:47:54 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2024-10-25 14:47:54 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2024-10-25 14:47:55 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2024-10-25 14:47:55 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2024-10-25 14:47:56 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2024-10-25 14:47:56 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2024-10-25 14:47:57 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2024-10-25 14:47:57 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2024-10-25 14:47:58 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2024-10-25 14:47:58 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2024-10-25 14:47:59 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2024-10-25 14:47:59 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2024-10-25 14:48:00 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2024-10-25 14:48:00 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2024-10-25 14:48:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:48:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:48:00 [INFO] transceiver.py:205 (MS@172.18.96.22:6700) Frequency hopping disabled
2024-10-25 14:48:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:48:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:48:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:48:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:48:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:48:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:48:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:48:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:48:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:48:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:48:00 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:48:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:48:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:48:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:48:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:48:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:48:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:48:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:48:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:48:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:48:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:48:05 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:48:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:48:06 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:48:06 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:48:06 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:48:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:06 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:48:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:48:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:48:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:48:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:48:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:07 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:48:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:48:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:48:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:48:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:48:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:48:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:48:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:48:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:48:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:48:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:48:07 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:48:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:48:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:48:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:48:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:48:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:48:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:48:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:48:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:48:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:48:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:48:12 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:12 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:48:12 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:48:12 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:48:12 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:48:12 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:13 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:48:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:48:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:48:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:48:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:13 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:48:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:48:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:48:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:48:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:48:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:48:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:48:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:48:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:48:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:48:14 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:48:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:48:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:48:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:48:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:48:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:48:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:48:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:48:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:48:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:48:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:48:19 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:19 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:48:19 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:48:19 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:19 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:48:19 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:20 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:48:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:48:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:48:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:48:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:48:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:20 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:48:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:48:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:48:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:48:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:48:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:48:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:48:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:48:21 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:48:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:48:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:48:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:48:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=394 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:48:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=394 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:48:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=394 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:48:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=394 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:48:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=394 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:48:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=394 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:48:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=394 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:48:21 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=394 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:48:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:48:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:48:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:48:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:48:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:48:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:48:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:48:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:48:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:48:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:48:26 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:48:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:48:26 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:48:26 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:48:26 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:27 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:48:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:48:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:48:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:48:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:48:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:27 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:48:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:48:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:48:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:48:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:48:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:48:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:48:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:48:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:48:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:48:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:48:28 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:48:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:48:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:48:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:48:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:48:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:48:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:48:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:48:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:48:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:48:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:48:33 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:48:33 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:48:33 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:48:33 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:48:33 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:33 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:48:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:48:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:48:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:48:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:48:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:34 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:48:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:48:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:48:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:48:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:48:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:48:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:48:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:48:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:48:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:48:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:48:34 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:48:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:48:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:48:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:48:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:48:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:48:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:48:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:48:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:48:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:48:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:48:39 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:48:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:48:40 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:48:40 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:48:40 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:40 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:48:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:48:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:48:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:48:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:41 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:48:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:48:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:48:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:48:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:48:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:48:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:48:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:48:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:48:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:48:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:48:41 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:48:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:48:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:48:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:48:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:48:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:48:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:48:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:48:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:48:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:48:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:48:46 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:48:47 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:48:47 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:48:47 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:48:47 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:48:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:47 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:48:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:48:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:48:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:48:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:48:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:48 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:48:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:48:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:48:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:48:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:48:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:48:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:48:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:48:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:48:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:48:48 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:48:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=392 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:48:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:48:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=392 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:48:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=392 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:48:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=392 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:48:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=392 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:48:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=392 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:48:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=392 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:48:48 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=392 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:48:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:48:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:48:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:48:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:48:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:48:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:48:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:48:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:48:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:48:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:48:53 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:48:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:48:54 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:54 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:48:54 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:48:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:48:54 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:48:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:48:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:48:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:48:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:48:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:48:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:48:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:48:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:48:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:48:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:48:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:48:59 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:48:59 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:48:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:48:59 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:48:59 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:48:59 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:48:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:48:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:48:59 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:48:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=141 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:48:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=141 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:48:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=141 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:48:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=141 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:48:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=141 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:48:59 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=141 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:49:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:49:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:49:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:49:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:49:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:49:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:49:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:49:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:49:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:49:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:49:04 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:49:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:49:05 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:49:05 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:49:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:49:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:49:05 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:49:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:49:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:49:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:49:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:49:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:49:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:49:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:49:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:49:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:49:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:49:10 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:49:10 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:49:10 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:49:10 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:10 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:49:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:49:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:49:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:49:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:49:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:49:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:49:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:49:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:49:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:49:11 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:49:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:49:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:49:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:49:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:49:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:49:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:49:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:49:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:49:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:49:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:49:16 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:49:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:49:16 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:16 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:49:16 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:49:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:49:16 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:49:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:49:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:49:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:49:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:49:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:49:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:49:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:49:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:49:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:49:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:49:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:49:21 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:49:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:49:22 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:49:22 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:49:22 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:49:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:49:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:49:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:49:22 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=136 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:49:22 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=136 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:49:22 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=136 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:49:22 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=136 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:49:22 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=136 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:49:22 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=136 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:49:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:49:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:49:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:49:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:49:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:49:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:49:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:49:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:49:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:49:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:49:27 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:49:27 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:49:27 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:49:27 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:49:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:49:27 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:49:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:49:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=137 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:49:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=137 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:49:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=137 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:49:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=137 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:49:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=137 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:49:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=137 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:49:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=137 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:49:27 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=137 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:49:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:49:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:49:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:49:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:49:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:49:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:49:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:49:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:49:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:49:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:49:32 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:32 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:49:33 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:49:33 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:49:33 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:49:33 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:49:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:49:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:49:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:49:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:49:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:49:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:49:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:49:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:49:33 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:49:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:49:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:49:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:49:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:49:34 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:49:34 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:49:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:49:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:49:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:49:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:49:35 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:49:35 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:49:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:49:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:49:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:49:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:49:36 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:49:36 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:49:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:49:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:49:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:49:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:49:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:49:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:49:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:49:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:49:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:49:36 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:49:36 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=860 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:49:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:49:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:49:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:49:36 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=860 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:49:36 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=860 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:49:36 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=860 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:49:36 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=860 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:49:36 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=860 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:49:36 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=860 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:49:36 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=860 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:49:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:49:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:49:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:49:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:49:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:49:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:49:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:49:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:49:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:49:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:49:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:49:42 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:49:42 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:49:42 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:49:42 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:42 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:49:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:49:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:49:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:49:43 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:49:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:49:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:49:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:49:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:49:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:49:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:49:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:49:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:49:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:49:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:49:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:49:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:49:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:49:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:49:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:49:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:49:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:49:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:49:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:49:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:49:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:49:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:49:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:49:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:49:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:49:43 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:49:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=238 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:49:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=238 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:49:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=238 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:49:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=238 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:49:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=238 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:49:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=238 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:49:43 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=238 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:49:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:49:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:49:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:49:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:49:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:49:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:49:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:49:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:49:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:49:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:49:48 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:49:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:49:48 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:48 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:49:48 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:49:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:49:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:49:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:49:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:49:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:49:49 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:49:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:49:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:49:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:49:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:49:49 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:49:50 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:49:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:49:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:49:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:49:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:49:50 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:49:51 [DEBUG] clck_gen.py:102 IND CLOCK 612
2024-10-25 14:49:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:49:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:49:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:49:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:49:51 [DEBUG] clck_gen.py:102 IND CLOCK 714
2024-10-25 14:49:52 [DEBUG] clck_gen.py:102 IND CLOCK 816
2024-10-25 14:49:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:49:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:49:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:49:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:49:52 [DEBUG] clck_gen.py:102 IND CLOCK 918
2024-10-25 14:49:52 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2024-10-25 14:49:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:49:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:49:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:49:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:49:53 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2024-10-25 14:49:53 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2024-10-25 14:49:54 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2024-10-25 14:49:54 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2024-10-25 14:49:55 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2024-10-25 14:49:55 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2024-10-25 14:49:56 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2024-10-25 14:49:56 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2024-10-25 14:49:57 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2024-10-25 14:49:57 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2024-10-25 14:49:58 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2024-10-25 14:49:58 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2024-10-25 14:49:59 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2024-10-25 14:49:59 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2024-10-25 14:50:00 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2024-10-25 14:50:00 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2024-10-25 14:50:01 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2024-10-25 14:50:01 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2024-10-25 14:50:02 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2024-10-25 14:50:02 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2024-10-25 14:50:02 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2024-10-25 14:50:03 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2024-10-25 14:50:03 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2024-10-25 14:50:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:50:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:50:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:50:04 [WARNING] transceiver.py:250 (MS@172.18.96.22:6700) RX TRXD message (fn=3432 tn=5 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:50:04 [WARNING] transceiver.py:250 (MS@172.18.96.22:6700) RX TRXD message (fn=3432 tn=6 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:50:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:50:04 [WARNING] transceiver.py:250 (MS@172.18.96.22:6700) RX TRXD message (fn=3432 tn=7 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:50:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:50:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:50:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:50:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:50:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:50:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:50:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:50:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:50:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:50:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:50:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:50:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:50:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:50:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:50:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:50:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:50:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:50:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:50:04 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:50:04 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3441 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:50:04 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3441 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:50:04 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3441 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:50:04 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3441 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:50:04 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3441 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:50:04 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3441 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:50:04 [WARNING] transceiver.py:250 (BTS@172.18.96.20:5700) RX TRXD message (ver=1 fn=3441 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:50:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:50:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:50:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:50:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:50:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:50:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:50:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:50:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:50:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:50:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:50:09 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:50:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:50:09 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:50:09 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:50:09 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:50:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:50:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:50:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:50:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 14:50:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:50:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:50:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:50:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:50:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:50:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:50:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:50:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:50:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:50:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:50:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:50:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:50:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:50:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:50:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:50:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:50:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:50:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:50:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:50:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:50:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:50:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:50:10 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:50:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:50:15 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:50:15 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:50:15 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:50:15 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:50:15 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:50:15 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:50:15 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:50:15 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:50:15 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:50:15 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] clck_gen.py:102 IND CLOCK 0
2024-10-25 14:50:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2024-10-25 14:50:15 [DEBUG] fake_trx.py:272 (BTS@172.18.96.20:5700) Recv FAKE_TOA cmd
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:50:15 [DEBUG] fake_trx.py:291 (BTS@172.18.96.20:5700) Recv FAKE_RSSI cmd
2024-10-25 14:50:15 [DEBUG] fake_trx.py:316 (BTS@172.18.96.20:5700) Recv FAKE_CI cmd
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:50:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:50:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD HANDOVER
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:50:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:50:16 [DEBUG] clck_gen.py:102 IND CLOCK 204
2024-10-25 14:50:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:50:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:50:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:50:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:50:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2024-10-25 14:50:17 [DEBUG] clck_gen.py:102 IND CLOCK 408
2024-10-25 14:50:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:50:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:50:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:50:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:50:17 [DEBUG] clck_gen.py:102 IND CLOCK 510
2024-10-25 14:50:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:50:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:50:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:50:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD ECHO
2024-10-25 14:50:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.96.22:6700) Ignore CMD SETSLOT
2024-10-25 14:50:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.96.22:6700) Recv RXTUNE cmd
2024-10-25 14:50:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.96.22:6700) Recv TXTUNE cmd
2024-10-25 14:50:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.96.22:6700) Recv POWERON CMD
2024-10-25 14:50:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.96.22:6700) Starting transceiver...
2024-10-25 14:50:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD NOHANDOVER
2024-10-25 14:50:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.96.22:6700) Recv POWEROFF cmd
2024-10-25 14:50:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.96.22:6700) Stopping transceiver...
2024-10-25 14:50:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.96.20:5700) Recv SETPOWER cmd
2024-10-25 14:50:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.96.20:5700/1) Recv SETPOWER cmd
2024-10-25 14:50:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.96.20:5700/2) Recv SETPOWER cmd
2024-10-25 14:50:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.96.20:5700/3) Recv SETPOWER cmd
2024-10-25 14:50:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:50:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:50:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:50:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:50:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:50:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:50:17 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:50:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:50:22 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.96.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.96.20:5700) Recv SETFORMAT cmd
2024-10-25 14:50:22 [INFO] ctrl_if_trx.py:201 (BTS@172.18.96.20:5700) TRXD header version 1 -> 1
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.96.20:5700/1) Recv RXTUNE cmd
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.96.20:5700/1) Recv TXTUNE cmd
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:50:22 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.96.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.96.20:5700/1) Recv NOMTXPOWER cmd
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.96.20:5700/1) Recv SETFORMAT cmd
2024-10-25 14:50:22 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.96.20:5700/1) TRXD header version 1 -> 1
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.96.20:5700/2) Recv RXTUNE cmd
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.96.20:5700/2) Recv TXTUNE cmd
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:50:22 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.96.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.96.20:5700/2) Recv RFMUTE cmd
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.96.20:5700/2) Recv NOMTXPOWER cmd
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.96.20:5700/2) Recv SETFORMAT cmd
2024-10-25 14:50:22 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.96.20:5700/2) TRXD header version 1 -> 1
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.96.20:5700/3) Recv RXTUNE cmd
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.96.20:5700/3) Recv TXTUNE cmd
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:50:22 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.96.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.96.20:5700/3) Recv RFMUTE cmd
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.96.20:5700/3) Recv NOMTXPOWER cmd
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.96.20:5700/3) Recv SETFORMAT cmd
2024-10-25 14:50:22 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.96.20:5700/3) TRXD header version 1 -> 1
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.96.20:5700) Recv RXTUNE cmd
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETTSC
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETTSC
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETTSC
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.96.20:5700) Recv TXTUNE cmd
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETRXGAIN
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETRXGAIN
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETRXGAIN
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETTSC
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.96.20:5700) Recv NOMTXPOWER cmd
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.96.20:5700) Recv POWERON CMD
2024-10-25 14:50:22 [INFO] ctrl_if_trx.py:109 (BTS@172.18.96.20:5700) Starting transceiver...
2024-10-25 14:50:22 [INFO] transceiver.py:236 Starting clock generator
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETRXGAIN
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.96.20:5700/1) Ignore CMD SETSLOT
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.96.20:5700/1) Recv RFMUTE cmd
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.96.20:5700) Ignore CMD SETSLOT
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.96.20:5700) Recv RFMUTE cmd
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.96.20:5700) Recv POWEROFF cmd
2024-10-25 14:50:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.96.20:5700) Stopping transceiver...
2024-10-25 14:50:22 [INFO] transceiver.py:239 Stopping clock generator
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.96.20:5700/2) Ignore CMD SETSLOT
2024-10-25 14:50:22 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.96.20:5700/3) Ignore CMD SETSLOT